http://www.coreboot.org/api.php?action=feedcontributions&user=Juri&feedformat=atom 2013-05-18T21:54:57Z User contributions MediaWiki 1.20.5 http://www.coreboot.org/News 2010-03-11T05:58:57Z

<p>Juri: /* 2010/03/05 Asus P2B LS now supported */</p> <hr /> <div>= 2010 =<br /> <br /> == 2010/03/05 Asus P2B-LS now supported ==<br /> <br /> coreboot now supports the Asus P2B-LS board. Board support and additional 440BX chipset support was written by Keith Hui, with [[User:Uwe|Uwe Hermann]] doing review/testing. This proves that despite the great age of the board in question (it was released in 1998), an active Open Source community continues to provide support over a decade later.<br /> <br /> == 2010/01/17 Roda RK886EX (Rocky III+) now supported ==<br /> <br /> coreboot now has support for the first laptop, the [http://www.roda-computer.com/en/products/notebooks/rocky-iii-rk886ex.html Roda RK886EX (Rocky III+)], based on the Intel i945 / ICH7 chipset. The code was contributed by [http://www.coresystems.de/en/ coresystems GmbH], thanks! Read the [http://www.coreboot.org/pipermail/coreboot-announce/2010-January/000006.html full announcement] for details.<br /> <br /> = 2009 =<br /> <br /> == 2009/10/21 HP e-Vectra P2706T now supported ==<br /> <br /> coreboot now has initial support for the [[HP e-Vectra P2706T]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]]. System information and testing by [mailto:stawel@gmail.com Pawe? Stawicki], thanks!<br /> <br /> == 2009/10/13 MSI MS-6156 now supported ==<br /> <br /> coreboot now has initial support for the [[MSI MS-6156]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]].<br /> <br /> == 2009/10/13 TechNexion TIM-5690 now supported ==<br /> <br /> coreboot now has support for the [http://www.technexion.com/index.php/tim-5690 TechNexion TIM-5690] mainboard (AMD RS690/SB600 chipset). The code was contributed by [mailto:libra.li@technexion.com Libra Li] of TechNexion, thanks!<br /> <br /> == 2009/10/13 Kontron KT690/mITX now supported ==<br /> <br /> coreboot now has support for the [http://us.kontron.com/products/boards+and+mezzanines/embedded+motherboards/miniitx+motherboards/kt690mitx.html Kontron KT690/mITX] mainboard (AMD RS690/SB600 chipset). The code was contributed by [http://www.coresystems.de/en/ coresystems GmbH], thanks!<br /> <br /> == 2009/09/25 coreboot on the cover of the Linux Journal ==<br /> <br /> The [http://www.linuxjournal.com/issue/186 October 2009 Linux Journal] features the coreboot logo on the cover and contains the article [http://www.linuxjournal.com/article/10447 &quot;Coreboot at Your Service!&quot;] by Anton Borisov - Use coreboot to take control of your hardware.<br /> <br /> == 2009/09/02 flashrom 0.9.1 has been released ==<br /> <br /> [[Flashrom|flashrom 0.9.1]] has been released. See the [[Flashrom/0.9.1|release notes]] for details.<br /> <br /> == 2009/07/15 VIA EPIA-M700 now supported ==<br /> <br /> The One Laptop per Child, Association, Inc. has contributed initial support for the [[VIA EPIA-M700]] board (based on the VIA VX800 code submitted earlier), thanks a lot! The code is still being worked on and improved by the community.<br /> <br /> == 2009/07/05 Mitac 6513WU now supported ==<br /> <br /> coreboot now has initial support for the [[Mitac 6513WU]] mainboard. The code was contributed by [mailto:mgold@ncf.ca Michael Gold], thanks!<br /> <br /> == 2009/07/01 Intel EagleHeights now supported ==<br /> <br /> coreboot now has initial support for the '''Intel EagleHeights''' mainboard. The code was contributed by [mailto:thomas.jourdan@gmail.com Thomas Jourdan], thanks!<br /> <br /> == 2009/07/01 VIA EPIA-N now supported ==<br /> <br /> coreboot now has initial support for the [http://www.idotpc.com/TheStore/pc/viewCategories.asp?idCategory=56 VIA EPIA-N] mainboard. The code was contributed by [mailto:bothlyn@blueyonder.co.uk Jon Harrison], thanks!<br /> <br /> == 2009/06/24 Soyo SY-6BA+ III now supported ==<br /> <br /> coreboot now has initial support for the [[Soyo SY-6BA Plus III|Soyo SY-6BA+ III]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks [mailto:ziltro@ziltro.com Andrew Morgan] for information and testing!<br /> <br /> == 2009/05/27 VIA VX800 now supported ==<br /> <br /> The One Laptop per Child, Association, Inc. has contributed support for the '''VIA VX800''' chipset family to the coreboot v2 tree.<br /> <br /> == 2009/05/04 flashrom 0.9.0 has been released ==<br /> <br /> After nine years of development and constant improvement, we have added support for every BIOS flash ROM technology present on x86 mainboards and every flash ROM chip we ever saw in the wild.<br /> <br /> Highlights of [[flashrom]] include:<br /> * Parallel, LPC, FWH and SPI flash interfaces.<br /> * 157 flash chip families and half a dozen variants of each family.<br /> * Flash chip package agnostic. DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, TSOP40 and more have all been verified to work.<br /> * 75 different chipsets, some with multiple flash controllers.<br /> * Special mainboard enabling code for dozens of nonstandard mainboards.<br /> * No physical access needed, root access is sufficient.<br /> * No bootable floppy disk, bootable CD-ROM or other media needed.<br /> * No keyboard or monitor needed. Simply reflash remotely via SSH.<br /> * No instant reboot needed. Reflash your ROM in a running system, verify it, be happy. The new firmware will be present next time you boot.<br /> * Crossflashing and hotflashing is possible as long as the flash chips are electrically and logically compatible (same protocol). Great for recovery.<br /> * Scriptability. Reflash a whole pool of identical machines at the same time from the command line. It is recommended to check flashrom output and error codes.<br /> * Speed. flashrom is much faster than vendor flash tools.<br /> * Supports Linux, FreeBSD, DragonFly BSD, Solaris, Mac OS X. Please refer to the README for build instructions.<br /> <br /> Thanks go to everyone who contributed to flashrom over the years and especially to Li-Ta Lo for starting this project.<br /> <br /> The release announcement can be found at http://www.coreboot.org/pipermail/coreboot/2009-May/047636.html.<br /> <br /> == 2009/04/22 HP ProLiant DL145 G3 now supported ==<br /> <br /> coreboot now has support for the [http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00816835&amp;lang=en&amp;cc=us&amp;taskId=101&amp;prodSeriesId=3219755&amp;prodTypeId=15351 HP ProLiant DL145 G3] mainboard. The code was contributed by [mailto:nuessle@uni-hd.de Mondrian Nuessle] (thanks!).<br /> <br /> == 2009/04/18 ASUS P2B-D now supported ==<br /> <br /> coreboot now has initial support for the [[ASUS P2B-D]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]].<br /> <br /> == 2009/04/18 VIA CX700, and VIA VT8454c mainboard now supported ==<br /> <br /> coreboot now has support for the '''VIA CX700''' chipset, and the '''VIA VT8454c''' mainboard. The code was developed by [http://www.coresystems.de/ coresystems GmbH].<br /> <br /> == 2009/04/06 TechNexion TIM-8690 now supported ==<br /> <br /> coreboot now has support for the [http://www.technexion.com/index.php/tim-8690 TIM-8690] mainboard (AMD RS690/SB600 chipset). The code was contributed by [mailto:daniel@dmhome.net Daniel Toussaint], thanks!<br /> <br /> == 2009/03/22 coreboot @ FSF LibrePlanet 2009 ==<br /> <br /> [[User:MJones|Marc Jones]] gave a coreboot [http://marcjonesconsulting.com/FSF%20talk.pdf presentation] at the [http://www.fsf.org/ Free Software Foundation] annual meeting, [http://www.fsf.org/associate/meetings/2009 Libre Planet 2009]. <br /> <br /> == 2009/01/10 coreboot and SeaBIOS starts Windows 7 ==<br /> <br /> [[User:Ruik|Rudolf Marek]] recorded [[Screenshots#coreboot_and_SeaBIOS_starting_Windows_7|a video of his ASUS M2V-MX SE with coreboot and SeaBIOS starting Windows 7]] on a 2GHz AMD Sempron CPU.<br /> <br /> == 2009/01/06 Ten years of coreboot ==<br /> <br /> Anton Borisov [http://www.h-online.com/open/The-Open-Source-BIOS-is-Ten-An-interview-with-the-coreboot-developers--/features/112353 interviewed the original developers] ([http://www.heise.de/open/Zehn-Jahre-LinuxBIOS-Coreboot--/artikel/121679 german version]) as the Open Source PC firmware celebrates '''ten years of activity'''!<br /> <br /> = 2008 =<br /> <br /> == 2008/12/27 coreboot at 25C3 in Berlin, Germany ==<br /> <br /> [[User:Stuge|Peter Stuge]] presented [http://events.ccc.de/congress/2008/Fahrplan/events/2970.en.html coreboot: Beyond The Final Frontier] at [http://events.ccc.de/congress/2008/ the 25th Chaos Communication Congress (25C3)].<br /> [[Screenshots#Chaos_Communication_Congress_2008_.2825C3.29:_coreboot:_Beyond_The_Final_Frontier|The video presentation is available]] and also [http://www.linux-magazin.de/news/25c3_coreboot_version_3_gibt_sich_die_ehre an article in German] about the talk.<br /> <br /> == 2008/12/15 ASUS P2B-DS now supported ==<br /> <br /> coreboot now has initial support for the [[ASUS P2B-DS]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]].<br /> <br /> == 2008/12/09 AMD Pistachio now supported ==<br /> <br /> coreboot now has support for the '''AMD Pistachio''' evaluation board. The code was contributed by AMD, thanks!<br /> <br /> == 2008/12/10 coreboot confirmed for SCALE 7x ==<br /> <br /> There will be a [http://scale7x.socallinuxexpo.org/dotorg/coreboot coreboot booth] at the [http://scale7x.socallinuxexpo.org/ Southern California Linux Expo] (SCALE 7x) on '''February 20-22, 2009'''.<br /> <br /> == 2008/12/05 NEC PowerMate 2000 now supported ==<br /> <br /> coreboot now has initial support for the [http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/ NEC PowerMate 2000] board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks [mailto:quentin.rameau@gmail.com Quentin RAMEAU] for providing the required information and for testing.<br /> <br /> == 2008/11/19 LiPPERT Cool RoadRunner-LX now supported ==<br /> <br /> coreboot now has support for the [http://www.lippert-at.com/index.php?id=408 LiPPERT Cool RoadRunner-LX] mainboard. The code was contributed by [mailto:support@LiPPERTEmbedded.de Jens Rottmann] from LiPPERT Embedded Computers GmbH, thanks!<br /> <br /> == 2008/10/30 LiPPERT Cool SpaceRunner-LX now supported ==<br /> <br /> coreboot now has support for the [http://www.lippert-at.com/index.php?id=478 LiPPERT Cool SpaceRunner-LX] mainboard. The code was contributed by [mailto:support@LiPPERTEmbedded.de Jens Rottmann] from LiPPERT Embedded Computers GmbH, thanks!<br /> <br /> == 2008/10/28 Intel 945, ICH7, Core Duo/Core 2 Duo, and Kontron 986LCD-M/mITX now supported ==<br /> <br /> coreboot now has support for the '''Intel i945/ICH7 Desktop/Mobile''' chipset, the '''Core Duo/Core 2 Duo''' processor, and the [http://de.kontron.com/products/boards+and+mezzanines/embedded+motherboards/miniitx+motherboards/986lcdmmitx.html Kontron 986LCD-M/mITX] mainboard. The code was developed by [http://www.coresystems.de/ coresystems GmbH].<br /> <br /> == 2008/10/27 MSI MS-6147 now supported ==<br /> <br /> coreboot now has initial support for the '''MSI MS-6147''' mainboard. The code was contributed by [mailto:mats.andersson@gisladisker.org Mats Erik Andersson], thanks!<br /> <br /> == 2008/10/19 coreboot confirmed for 25C3 in Berlin, Germany ==<br /> <br /> [[User:Stuge|Peter Stuge]] will present coreboot at [http://events.ccc.de/congress/2008/ the 25th Chaos Communication Congress (25C3)].<br /> <br /> [[Screenshots#Chaos_Communication_Congress_2008_.2825C3.29:_coreboot:_Beyond_The_Final_Frontier|The video presentation is available]] and also [http://www.linux-magazin.de/news/25c3_coreboot_version_3_gibt_sich_die_ehre an article in German] about the talk.<br /> <br /> == 2008/10/12 VIA pc2500e now supported ==<br /> <br /> coreboot now has initial support for the [[VIA pc2500e Build Tutorial|VIA pc2500e]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]].<br /> <br /> == 2008/11/06 coreboot at ELC Europe 2008 in Ede, The Netherlands ==<br /> <br /> [[User:Stuge|Peter Stuge]] is presenting coreboot at the [http://www.nluug.nl/events/nj08/ NLUUG Autumn Conference on Mobile Computing] and [http://www.embeddedlinuxconference.com/elc_europe08/ CE Linux Forum - Embedded Linux conference Europe 2008].<br /> <br /> == 2008/10/26 coreboot at FSCONS 2008 in Gothenburg, Sweden ==<br /> <br /> [[User:Stuge|Peter Stuge]] is presenting coreboot at the [http://fscons.org/ Free Society Conference and Nordic Summit 2008].<br /> <br /> == 2008/09/24 AMD RS690 / SB600 chipset and AMD dbm690t board now supported ==<br /> <br /> coreboot now has initial support for the '''AMD RS690 / SB600''' chipset, as well as the [http://www.amd.com/us-en/assets/content_type/DownloadableAssets/42655A_S1DBM680T_PB.pdf AMD dbm690t] (Herring) board using that chipset. The code was contributed by AMD, thanks!<br /> <br /> == 2008/09/24 Intel EP80579 (Tolapai) now supported ==<br /> <br /> coreboot now has initial support for the '''Intel EP80579 (Tolapai)''' chipset. The code was contributed by [[User:Eswierk|Ed Swierk]], thanks!<br /> <br /> == 2008/09/24 coreboot interview at LinuxTag 2008 is now available as podcast ==<br /> <br /> [[User:Hailfinger|Carl-Daniel Hailfinger]] gave an [http://www.linuxpodcast.de/?id=240 interview about coreboot and flashrom] at LinuxTag 2008 in Berlin. It was broadcast live on [http://www.radiotux.de/ RadioTux] and is now available as [http://www.linuxpodcast.de/?id=240 podcast]. The interview is in German. Thanks to Sirko Kemter for organizing the interview, Thomas Steinbrecher for interviewing and Ingo Ebel for cutting it and putting it online.<br /> <br /> == 2008/09/23 ASUS M2V-MX SE now supported ==<br /> <br /> coreboot now has initial support for the [[ASUS M2V-MX SE Build Tutorial|ASUS M2V-MX SE]] mainboard. The code was contributed by [[User:Ruik|Rudolf Marek]], thanks!<br /> <br /> == 2008/09/13 coreboot talk at OpenBSD Slackathon in Stockholm ==<br /> <br /> [[User:Stuge|Peter Stuge]] presented coreboot at the [http://slackathon.se/2008/ Slackathon 2008] OpenBSD meeting.<br /> <br /> == 2008/09/10 Jetway J7F2/J7F4 now supported ==<br /> <br /> coreboot now has initial support for the [[Jetway J7F2 Build Tutorial|Jetway J7F2/J7F4]] mainboards. The code was contributed by [[User:Hawke|Alex Mauer]], thanks!<br /> <br /> == 2008/09/05 VIA VT8237S now supported ==<br /> <br /> coreboot now has initial support for the '''VIA VT8237S''' southbridge. The code was contributed by [[User:Ruik|Rudolf Marek]], thanks!<br /> <br /> == 2008/08/04 ASI MB-5BLGP / Neoware Eon 4000s now supported ==<br /> <br /> coreboot now has initial support for the '''ASI MB-5BLGP (Neoware Eon 4000s)''' board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks [mailto:hanneshe@arcor.de Hannes Hegewald] for providing the required information and for testing.<br /> <br /> == 2008/07/01 New logo announced ==<br /> <br /> The coreboot hare is the new project logo. Check it out over on the [[Logo]] page.<br /> <br /> == 2008/07/01 coreboot booth at OpenExpo in Zürich ==<br /> <br /> coreboot will be exhibiting at [http://www.openexpo.ch/ OpenExpo 2008] on '''September 24-25 2008''' in '''Zürich/Winterthur'''.<br /> <br /> We are also [[News#2008.2F04.2F19_coreboot_is_a_Hackontest_candidate|a Hackontest candidate]], the Hackontest is organized in connection with the Expo.<br /> <br /> == 2008/06/27 A-Trend ATC-6240 now supported ==<br /> <br /> coreboot now has initial support for the [http://active-hardware.com/english/reviews/mainboard/atc6240.htm A-Trend ATC-6240] board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks [mailto:eagle__eye@maktoob.com shadow] for providing the required information.<br /> <br /> == 2008/05/28 coreboot booth at LinuxTag in Berlin ==<br /> <br /> There will be a [[LinuxTag 2008|coreboot booth at LinuxTag 2008]] on '''May 28-31 2008''' in '''Berlin'''.<br /> <br /> == 2008/05/19 VIA EPIA-CN now supported ==<br /> <br /> coreboot now has initial support for the [http://www.coreboot.org/VIA_EPIA-CN_Build_Tutorial VIA EPIA-CN] board. The code was contributed by [mailto:aaron.lwe@gmail.com Aaron Lwe] of VIA, with various interim patches and testing also by [mailto:corey_osgood@verizon.net Corey Osgood], [mailto:urbez@linuxupc.upc.edu Urbez Santana Roma], [[User:Bari|Bari Ari]], and [mailto:remenic@gmail.com Richard Stellingwerff], thanks a lot! The code contribution also contained various VIA CN700 improvements which should make porting further VIA C7 + CN700 + VT8237R boards easier.<br /> <br /> == 2008/05/16 Thomson IP1000 now supported ==<br /> <br /> coreboot now has initial support for the [http://www.settoplinux.org/index.php Thomson IP1000] board. The code was contributed by [[User:Linux junkie|Joseph Smith]]. Linux has never been able to run on this board until now.<br /> <br /> == 2008/04/24 IEI PCISA-LX-800-R10 now supported ==<br /> <br /> Thanks to the contributions from [[User:Nikola|Nikolay Petukhov]] we now have support for the [[IEI LX 800 Build Tutorial|IEI PCISA-LX-800-R10]] half-size mainboard in our tree.<br /> <br /> == 2008/04/21 coreboot participating in Google Summer of Code 2008 ==<br /> <br /> The coreboot project (with [http://www.coresystems.de coresystems GmbH] as mentoring organization) is taking part in the [http://code.google.com/soc/ Google Summer of Code&amp;trade; 2008] (GSoC). This year, the project has been assigned two slots/students who will work on the following projects:<br /> <br /> * [http://code.google.com/soc/2008/coresystems/appinfo.html?csaid=ED0729A9DB64B39B All Virtual All The Time (AVATT)]<br /> : ''This project aims to integrate into the coreboot BIOS a payload consisting of a minimalist KVM-aware Linux kernel along with an initrd image that contains the tools needed for creating and starting guest virtual machines installed on top of it. The resulting system could host any x86(or x86-64) OS that can run over KVM (almost any major OS does), and there is a great challenge to make it as small as possible, so that it can fit in a 2MB flash image.''<br /> * [http://code.google.com/soc/2008/coresystems/appinfo.html?csaid=5B0D5443ED6193C7 SCSI booting in coreboot]<br /> : ''Currently coreboot can not boot from an arbitrary SCSI controller. There are two solutions for the problem: (1) Use Linux and Kexec. This requires to keep the SCSI driver in the flash chip. (2) Use x86emu/vm86/ADLO and the int13 method. This would allow to use the PCI option rom available on all modern SCSI controllers. So we obviously need a solution based on the latter. This could as well be implemented as a Linux program, as an intermediate payload, or as a shared library. At this point of time, I would like to implemente it as a daemon program. The program needs to catch the int13 interrupt vector that the SCSI option rom installs and make it available to arbitrary (firmware/payload) code trying to load something from disk.''<br /> <br /> == 2008/04/19 coreboot is a Hackontest candidate ==<br /> <br /> [[User:Hailfinger|Carl-Daniel Hailfinger]] has registered coreboot at [http://www.hackontest.org/ Hackontest].<br /> <br /> : ''Hackontest is a 24 hour programming competition between teams of three open source software projects.<br /> <br /> : The event takes place at OpenExpo on September 24/25, 2008 in Zurich, Switzerland.''<br /> <br /> [[Image:HackontestBanner_468x60-01.jpg]]<br /> <br /> [http://www.hackontest.org/index.php?action=Root-projectDetail(36) Click here to request features and vote for them.]<br /> <br /> == 2008/04/19 PC Engines ALIX.2C3 now supported ==<br /> <br /> Thanks to [[User:Ward|Ward Vandewege]] coreboot v3 now supports the PC Engines [http://pcengines.ch/alix2c3.htm ALIX.2C3] mainboard.<br /> <br /> == 2008/04/04 Silicon Mechanics to ship servers with coreboot preinstalled ==<br /> <br /> Chris Watson at [http://siliconmechanics.com Silicon Mechanics] says:<br /> <br /> :''We will commit to offering coreboot preinstallation on the [http://www.siliconmechanics.com/i7045/opteron-server.php Rackform nServ A236] with a specific set of hardware and software. In the future, we may expand the program to additional platforms based on customer interest. We will include a message about coreboot support on the platform page in the next few days with instructions to contact sales for additional information.''<br /> <br /> If you want to buy such a machine, please contact Art Mann ([mailto:artm@siliconmechanics.com artm@siliconmechanics.com]) at Silicon Mechanics.<br /> <br /> The A236 is a nice 1U server with 4 drive bays and a dual Opteron board (Supermicro H8DMR), which [http://www.coreboot.org/Supported_Motherboards is supported in coreboot v2].<br /> <br /> == 2008/04/03 coreboot Symposium in Denver ==<br /> <br /> There was a coreboot symposium in Denver, April 3 – 5, 2008 held during the High Performance Computer Science Week (HPCSW) [http://www.hpcsw.org LinuxBIOS Summit].<br /> <br /> More information is available on the [[Coreboot Symposium 2008]] page.<br /> <br /> == 2008/03/29 TeleVideo TC7020 now supported ==<br /> <br /> coreboot now has initial support for the [[TeleVideo TC7020 Build Tutorial|TeleVideo TC7020]] thin client. The code was contributed by [mailto:tokyo246@gmail.com Kenji Noguchi], thanks!<br /> <br /> == 2008/03/17 MSI MS-6119 now supported ==<br /> <br /> coreboot now has initial support for the [http://global.msi.com.tw/index.php?func=proddesc&amp;prod_no=332&amp;maincat_no=1 MSI MS-6119] board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks [mailto:mechno@gmail.com Maarten van Eeuwijk] for information and testing.<br /> <br /> == 2008/03/17 Intel 3100 chipset and Intel devkit (Mt. Arvon) board now supported ==<br /> <br /> coreboot now has initial support for the [http://www.intel.com/design/intarch/devkits/pm3100.htm Intel &quot;Mt. Arvon&quot;] development board, as well as the [http://www.intel.com/design/chipsets/embedded/3100.htm Intel 3100] chipset. The code was contributed by [[User:Eswierk|Ed Swierk]].<br /> <br /> == 2008/03/09 RCA RM4100 now supported ==<br /> <br /> coreboot now has initial support for the [http://www.settoplinux.org RCA RM4100] board. The code was contributed by [[User:Linux junkie|Joseph Smith]]. This also includes support for the Intel 830M (82830) northbridge.<br /> <br /> == 2008/03/07 ASUS A8V-E Deluxe now supported ==<br /> <br /> coreboot now has [[ASUS A8V-E Deluxe Build Tutorial|initial support]] for the [http://www.asus.com.tw/products.aspx?l1=3&amp;l2=15&amp;l3=143&amp;l4=0&amp;model=376&amp;modelmenu=1 ASUS A8V-E Deluxe] board. The testing so far was done by [[User:Uwe|Uwe Hermann]], re-using code written by [mailto:r.marek@assembler.cz Rudolf Marek] for the ASUS A8V-E SE (thanks!), which is very similar.<br /> <br /> == 2008/02/20 MSI MS-7135 (K8N Neo3) now supported ==<br /> <br /> coreboot now has initial support for the [http://global.msi.com.tw/index.php?func=proddesc&amp;prod_no=170&amp;maincat_no=1 MSI MS-7135 (K8N Neo3)] board. The code was contributed by [[User:Jakllsch|Jonathan A. Kollasch]].<br /> <br /> == 2008/01/27 Abit BE6-II V2.0 now supported ==<br /> <br /> coreboot now supports the [http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=BE6-II+V2.0&amp;fMTYPE=Slot+1 Abit BE6-II V2.0] board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks Sergei Antonov for information and testing.<br /> <br /> == 2008/01/12 LinuxBIOS is now called coreboot ==<br /> <br /> As Ron Minnich, the founder of the LinuxBIOS project [http://www.coreboot.org/pipermail/coreboot/2008-January/029133.html explains in his announcement] the LinuxBIOS project has now been renamed to '''coreboot'''. Read the [http://www.coreboot.org/pipermail/coreboot/2008-January/029133.html whole announcement] for more details and the reasons behind the renaming.<br /> <br /> = 2007 =<br /> <br /> == 2007/11/26 ASUS MEW-AM now supported ==<br /> <br /> LinuxBIOS now [[ASUS MEW-AM Build Tutorial|supports]] the [ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/ ASUS MEW-AM] board. The code was contributed by [[User:Uwe|Uwe Hermann]].<br /> <br /> == 2007/11/13 Advantech PCM-5820 now supported ==<br /> <br /> LinuxBIOS now [[Advantech PCM-5820 Build Tutorial|supports]] the [http://taiwan.advantech.com.tw/products/Model_Detail.asp?model_id=1-1TGZL8&amp;BU=ACG&amp;PD= Advantech PCM-5820] half-size board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks to [[User:Erwan|Erwan Velu]] for help and testing.<br /> <br /> == 2007/11/13 Lightning talk at FSCONS 2007 in Gothenburg on 2007/12/08 ==<br /> <br /> [mailto:peter@stuge.se Peter Stuge] is presenting [http://fscons.org/node/138 a LinuxBIOS lightning talk] at [http://fscons.org/ FSCONS 2007] on December 8.<br /> <br /> == 2007/11/03 ASUS A8V-E SE now supported ==<br /> <br /> Thanks to the great contribution from [mailto:r.marek@assembler.cz Rudolf Marek] we now have support for the [http://www.asus.com.tw/products.aspx?l1=3&amp;l2=15&amp;l3=143&amp;l4=0&amp;model=576&amp;modelmenu=1 ASUS A8V-E SE] mainboard.<br /> <br /> == 2007/10/31 Various Intel 440BX boards now supported ==<br /> <br /> We now have initial support for various Intel 440BX / 82371EB based mainboards of the Pentium II/III era, namely the ASUS P2B-F, ASUS P3B-F, A-Trend ATC-6220, AZZA PT-6IBD, Biostar M6TBA, Compaq Deskpro EN SFF P600, and GIGABYTE GA-6BXC. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks to todthgie, idwer_, and zxy_64-2 on [[IRC]] for helping with some of the boards.<br /> <br /> == 2007/10/30 SiS761GX/SiS966 chipset and GIGABYTE GA-2761GXDK board now supported ==<br /> <br /> Thanks to the great contributions from Morgan Tsai of SiS we now have support for both the SiS761GX/SiS966 chipset and the GIGABYTE [http://www.rssfeedbus.com/index.php?showtopic=1515 GA-2761GXDK] mainboard, which uses that chipset.<br /> <br /> == 2007/10/30 VIA K8T890 / VT8237R now supported ==<br /> <br /> Thanks to the great contribution from [mailto:r.marek@assembler.cz Rudolf Marek] we now have support for the VIA K8T890 / VT8237R chipset. A mainboard which uses this chipset will soon be added.<br /> <br /> == 2007/10/26 AXUS TC320 now supported ==<br /> <br /> LinuxBIOS now [[AXUS TC320 Build Tutorial|supports]] the '''AXUS TC320''' (Geode GX1 based) thin client. The code was contributed by [[User:Jbe|Jürgen Beisert]].<br /> <br /> == 2007/10/10 BCOM WinNET100 (IGEL-316) now supported ==<br /> <br /> LinuxBIOS now [[BCOM WINNET100 Build Tutorial|supports]] the '''BCOM WinNET100''' mainboard, as found in (e.g.) the '''IGEL-316''' (Geode GX1 based) thin client. The code was contributed by [[User:Jbe|Jürgen Beisert]].<br /> <br /> == 2007/09/22 MSI MS-7260 now supported ==<br /> <br /> LinuxBIOS now [[MSI MS-7260 Build Tutorial|supports]] the MSI [http://global.msi.com.tw/index.php?func=proddesc&amp;prod_no=255&amp;maincat_no=1&amp;cat2_no=171 MS-7260 (K9N Neo)] mainboard. The code was added by [[User:Uwe|Uwe Hermann]], but most of the hard work (K8 + MCP55 support) was done by others.<br /> <br /> == 2007/09/13 MSI MS-6178 now supported ==<br /> <br /> Thanks to [[User:Uwe|Uwe Hermann]] we now have preliminary support for the MSI [http://www.msi-technology.de/produkte/main_idx_view.php?Prod_id=27 MS-6178] mainboard.<br /> <br /> == 2007/09/08 PC Engines ALIX1.C now supported ==<br /> <br /> Thanks to [[User:Rminnich|Ron Minnich]] we now have preliminary support for the PC Engines [http://pcengines.ch/alix1c.htm ALIX1.C] mainboard.<br /> <br /> == 2007/06/14 Intel 810 chipset and ASUS MEW-VM now supported ==<br /> <br /> Thanks to the great contributions from [mailto:corey_osgood@verizon.net Corey Osgood] we now have preliminary support for both the Intel 810 chipset (82810 northbridge) and the ASUS MEW-VM mainboard, which uses that northbridge.<br /> <br /> == 2007/06/13 AMD DB800 (Salsa) now supported ==<br /> <br /> LinuxBIOS now supports the AMD [http://www.amd.com/us-en/ConnectivitySolutions/ProductInformation/0,,50_2330_9863_13022%5E13060,00.html DB800] (a.k.a Salsa) Geode LX reference/evaluation mainboard. The code was contributed by [mailto:marc.jones@amd.com Marc Jones] of AMD.<br /> <br /> == 2007/06/07 IEI JUKI-511P and ROCKY-512 now supported ==<br /> <br /> Thanks to the contributions from [mailto:nikolaypetukhov@gmail.com Nikolay Petukhov] we now have support for the IEI JUKI-511P and the IEI ROCKY-512 half-size mainboards in our tree!<br /> <br /> == 2007/05/24 ASUS A8N-E now supported ==<br /> <br /> Thanks to the nice work of [mailto:pdegler@rumms.uni-mannheim.de Philipp Degler] we now have support for the ASUS A8N-E mainboard in our tree!<br /> <br /> == 2007/05/23 LinuxBIOS booth at LinuxTag in Berlin, 29/5-2/6 ==<br /> <br /> In one corner of Messe Berlin hall 12 (booth 12-80) we will be showing a couple of different systems all using LinuxBIOS to boot. There is a boot time competition in the booth (nice T-shirts to win!) and on Saturday 2/6 the developers will be presenting a [[LinuxTag 2007 Workshop|workshop]] where visitors are walked through the steps required to make their own EPIA/-M/-MII board run LinuxBIOS!<br /> <br /> Video of an [http://video.google.com/videoplay?docid=3820348270731247338&amp;hl=en interview] at the LinuxBIOS booth.<br /> <br /> == 2007/05/05 DIGITAL-LOGIC MSM800SEV now supported ==<br /> <br /> The [http://www.digitallogic.ch/english/products/datasheets/ms_pc104_detail.asp?id=MSM800SEV DIGITAL-LOGIC MSM800SEV] mainboard is now supported by LinuxBIOS. The code was written by [[User:Rminnich|Ron Minnich]], based on the recent AMD Geode LX framework contributed by AMD.<br /> <br /> == 2007/05/04 AMD Norwich support and generally improved AMD Geode LX support ==<br /> <br /> LinuxBIOS now supports the AMD Norwich reference/evaluation mainboard. This is ''the'' AMD Geode LX reference platform, and it's now well-supported by LinuxBIOS. Additionally the AMD Geode LX code in general was heavily improved and should simplify further ports of Geode LX systems a lot. The code was written and contributed by several AMD engineers, foremost [mailto:jordan.crouse@amd.com Jordan Crouse] and [mailto:marc.jones@amd.com Marc Jones] of AMD.<br /> <br /> == 2007/03/14 LinuxBIOS participating in Google Summer of Code 2007 ==<br /> <br /> The LinuxBIOS project (with [http://www.coresystems.de coresystems GmbH] as mentoring organization) is taking part in the [http://code.google.com/soc/ Google Summer of Code&amp;trade; 2007] (GSoC). There is a [[GSoC|list of project ideas]] for students to work on (but feel free to suggest further ideas [[Mailinglist|on the LinuxBIOS mailing list]]).<br /> <br /> Students who are interested in working on a LinuxBIOS-related GSoC project must apply until &lt;strike&gt;'''March 24, 2007'''&lt;/strike&gt; [http://groups.google.com/group/google-summer-of-code-announce/browse_thread/thread/72f227109321bba5 Monday, March 27, 2007]!<br /> <br /> '''Update:''' LinuxBIOS ended up with [http://code.google.com/soc/coresystems/about.html seven student projects] for GSoC 2007!<br /> <br /> == 2007/02/24 LinuxBIOS talk at FOSDEM 2007 ==<br /> <br /> [[User:Rminnich|Ron Minnich]] gave [http://www.fosdem.org/2007/schedule/events/linuxbios a talk about LinuxBIOS] on February 24, 2007 at [http://www.fosdem.org/2007/ FOSDEM 2007].<br /> <br /> A [http://ftp.belnet.be/mirrors/FOSDEM/2007/FOSDEM2007-LinuxBios.ogg video recording of the talk] (Ogg, 234 MB) is available.<br /> <br /> == 2007/02/09 MSI K9ND Master Series (MS-9282) supported in LinuxBIOS ==<br /> <br /> LinuxBIOS now supports the MSI [http://cweb.msi.com.tw/program/products/server/svr/pro_svr_detail.php?UID=632 K9SD Master Series (MS-9282)] mainboards. The code was contributed by [mailto:bxshi@msik.com.cn bxshi] of MSI, based on code for the NVIDIA MCP55 by [mailto:yinghailu@gmail.com Yinghai Lu] of AMD.<br /> <br /> = 2006 =<br /> <br /> == 2006/11/02 MSI K9SD Master-S2R (MS-9185) supported in LinuxBIOS ==<br /> <br /> LinuxBIOS now supports the MSI [http://www.msiserver.de/de/Produkte/Server_Mainboards/K9SD_Master_S2R_MS_9185.aspx K9SD Master-S2R (MS-9185)] mainboard. The code was contributed by [mailto:bxshi@msik.com.cn bxshi] of MSI.<br /> <br /> == 2006/10/05 AMD Rev F supported in LinuxBIOS ==<br /> <br /> The AMD dual core support code is in public tree now. It includes<br /> * AMD Rev F AMD64 on Socket F/Socket AM2<br /> <br /> --yhlu<br /> <br /> == 2006/10/01 LinuxBIOS Symposium 2006 in Hamburg ==<br /> <br /> The LinuxBIOS Symposium 2006 took place in the old warehouse complex Speicherstadt in Hamburg, Germany.<br /> See the page [[LinuxBIOS Symposium 2006]] for more details, slides, photos, etc...<br /> <br /> --Stefan<br /> <br /> <br /> = 2005 =<br /> <br /> == 2005/06/02 AMD dual core supported in LinuxBIOS ==<br /> <br /> The AMD dual core support code is in public tree now. It includes<br /> * AMD D0/E0 Opteron new mem mapping support <br /> * AMD E Opteron dual core support <br /> * AMD E Opteron mem hole support <br /> * AMD K8 Four Ranks DIMM support --- Quad Ranks.<br /> <br /> --yhlu<br /> <br /> == 2005/05/11 Nvidia CK804 (NForce4) supported in LinuxBIOS ==<br /> <br /> The Nvidia CK804 support code is in public tree now. It includes<br /> * Nvidia CK804 support<br /> * smbus bus number support (to handle multi sumbus and mux)<br /> * superio smsc47 support <br /> * Tyan S2895/S2891/S2892 support <br /> * flash_rom Ck804 support<br /> <br /> --yhlu<br /> <br /> == 2005/04/22 How Many People Are Using LinuxBIOS? Would you believe 1,000,000? ==<br /> <br /> This question comes up to us all the time. Last week, I got an amazing answer. First, let<br /> me mention that I tell skeptical people at vendors all the time, when <br /> asked this question: &quot;A lot more than just the <br /> cluster community. The real use is in the embedded world&quot;. Well, again, last week, <br /> I found out just how real that use is. <br /> <br /> The system in question is the STPC Consumer. Evidently, this chipset is used in <br /> an internet terminal sold in India. It runs LinuxBIOS and Linux. <br /> <br /> There are at least one MILLION (1,000,000) of these things in use. I realize that is not much compared to the size of some markets, but had you told me six years ago that <br /> one million systems would be using LinuxBIOS in 2005, I don't think I would have believed you.<br /> <br /> --Ron<br /> <br /> == 2005/03/01 LinuxBIOS Wiki up and running ==<br /> <br /> After a week of testing and playing around, LinuxBIOS has a brand new Wiki now.<br /> <br /> --Stefan<br /> <br /> == 2005/02/28 LinuxBIOS slashdotted again ==<br /> <br /> After Richard Stallman's call for support of free BIOS LinuxBIOS was slashdotted this weekend.</div>

Juri http://www.coreboot.org/News 2010-03-11T05:01:32Z

<p>Juri: </p> <hr /> <div>= 2010 =<br /> <br /> == 2010/03/05 Asus P2B LS now supported ==<br /> <br /> coreboot now supports the Asus P2B-LS board. Board support and additional 440BX chipset support was written by Keith Hui, with [[User:Uwe|Uwe Hermann]] doing review/testing. This proves that despite the great age of the board in question (it was released in 1998), an active Open Source community continues to provide support over a decade later.<br /> <br /> == 2010/01/17 Roda RK886EX (Rocky III+) now supported ==<br /> <br /> coreboot now has support for the first laptop, the [http://www.roda-computer.com/en/products/notebooks/rocky-iii-rk886ex.html Roda RK886EX (Rocky III+)], based on the Intel i945 / ICH7 chipset. The code was contributed by [http://www.coresystems.de/en/ coresystems GmbH], thanks! Read the [http://www.coreboot.org/pipermail/coreboot-announce/2010-January/000006.html full announcement] for details.<br /> <br /> = 2009 =<br /> <br /> == 2009/10/21 HP e-Vectra P2706T now supported ==<br /> <br /> coreboot now has initial support for the [[HP e-Vectra P2706T]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]]. System information and testing by [mailto:stawel@gmail.com Pawe? Stawicki], thanks!<br /> <br /> == 2009/10/13 MSI MS-6156 now supported ==<br /> <br /> coreboot now has initial support for the [[MSI MS-6156]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]].<br /> <br /> == 2009/10/13 TechNexion TIM-5690 now supported ==<br /> <br /> coreboot now has support for the [http://www.technexion.com/index.php/tim-5690 TechNexion TIM-5690] mainboard (AMD RS690/SB600 chipset). The code was contributed by [mailto:libra.li@technexion.com Libra Li] of TechNexion, thanks!<br /> <br /> == 2009/10/13 Kontron KT690/mITX now supported ==<br /> <br /> coreboot now has support for the [http://us.kontron.com/products/boards+and+mezzanines/embedded+motherboards/miniitx+motherboards/kt690mitx.html Kontron KT690/mITX] mainboard (AMD RS690/SB600 chipset). The code was contributed by [http://www.coresystems.de/en/ coresystems GmbH], thanks!<br /> <br /> == 2009/09/25 coreboot on the cover of the Linux Journal ==<br /> <br /> The [http://www.linuxjournal.com/issue/186 October 2009 Linux Journal] features the coreboot logo on the cover and contains the article [http://www.linuxjournal.com/article/10447 &quot;Coreboot at Your Service!&quot;] by Anton Borisov - Use coreboot to take control of your hardware.<br /> <br /> == 2009/09/02 flashrom 0.9.1 has been released ==<br /> <br /> [[Flashrom|flashrom 0.9.1]] has been released. See the [[Flashrom/0.9.1|release notes]] for details.<br /> <br /> == 2009/07/15 VIA EPIA-M700 now supported ==<br /> <br /> The One Laptop per Child, Association, Inc. has contributed initial support for the [[VIA EPIA-M700]] board (based on the VIA VX800 code submitted earlier), thanks a lot! The code is still being worked on and improved by the community.<br /> <br /> == 2009/07/05 Mitac 6513WU now supported ==<br /> <br /> coreboot now has initial support for the [[Mitac 6513WU]] mainboard. The code was contributed by [mailto:mgold@ncf.ca Michael Gold], thanks!<br /> <br /> == 2009/07/01 Intel EagleHeights now supported ==<br /> <br /> coreboot now has initial support for the '''Intel EagleHeights''' mainboard. The code was contributed by [mailto:thomas.jourdan@gmail.com Thomas Jourdan], thanks!<br /> <br /> == 2009/07/01 VIA EPIA-N now supported ==<br /> <br /> coreboot now has initial support for the [http://www.idotpc.com/TheStore/pc/viewCategories.asp?idCategory=56 VIA EPIA-N] mainboard. The code was contributed by [mailto:bothlyn@blueyonder.co.uk Jon Harrison], thanks!<br /> <br /> == 2009/06/24 Soyo SY-6BA+ III now supported ==<br /> <br /> coreboot now has initial support for the [[Soyo SY-6BA Plus III|Soyo SY-6BA+ III]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks [mailto:ziltro@ziltro.com Andrew Morgan] for information and testing!<br /> <br /> == 2009/05/27 VIA VX800 now supported ==<br /> <br /> The One Laptop per Child, Association, Inc. has contributed support for the '''VIA VX800''' chipset family to the coreboot v2 tree.<br /> <br /> == 2009/05/04 flashrom 0.9.0 has been released ==<br /> <br /> After nine years of development and constant improvement, we have added support for every BIOS flash ROM technology present on x86 mainboards and every flash ROM chip we ever saw in the wild.<br /> <br /> Highlights of [[flashrom]] include:<br /> * Parallel, LPC, FWH and SPI flash interfaces.<br /> * 157 flash chip families and half a dozen variants of each family.<br /> * Flash chip package agnostic. DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, TSOP40 and more have all been verified to work.<br /> * 75 different chipsets, some with multiple flash controllers.<br /> * Special mainboard enabling code for dozens of nonstandard mainboards.<br /> * No physical access needed, root access is sufficient.<br /> * No bootable floppy disk, bootable CD-ROM or other media needed.<br /> * No keyboard or monitor needed. Simply reflash remotely via SSH.<br /> * No instant reboot needed. Reflash your ROM in a running system, verify it, be happy. The new firmware will be present next time you boot.<br /> * Crossflashing and hotflashing is possible as long as the flash chips are electrically and logically compatible (same protocol). Great for recovery.<br /> * Scriptability. Reflash a whole pool of identical machines at the same time from the command line. It is recommended to check flashrom output and error codes.<br /> * Speed. flashrom is much faster than vendor flash tools.<br /> * Supports Linux, FreeBSD, DragonFly BSD, Solaris, Mac OS X. Please refer to the README for build instructions.<br /> <br /> Thanks go to everyone who contributed to flashrom over the years and especially to Li-Ta Lo for starting this project.<br /> <br /> The release announcement can be found at http://www.coreboot.org/pipermail/coreboot/2009-May/047636.html.<br /> <br /> == 2009/04/22 HP ProLiant DL145 G3 now supported ==<br /> <br /> coreboot now has support for the [http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00816835&amp;lang=en&amp;cc=us&amp;taskId=101&amp;prodSeriesId=3219755&amp;prodTypeId=15351 HP ProLiant DL145 G3] mainboard. The code was contributed by [mailto:nuessle@uni-hd.de Mondrian Nuessle] (thanks!).<br /> <br /> == 2009/04/18 ASUS P2B-D now supported ==<br /> <br /> coreboot now has initial support for the [[ASUS P2B-D]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]].<br /> <br /> == 2009/04/18 VIA CX700, and VIA VT8454c mainboard now supported ==<br /> <br /> coreboot now has support for the '''VIA CX700''' chipset, and the '''VIA VT8454c''' mainboard. The code was developed by [http://www.coresystems.de/ coresystems GmbH].<br /> <br /> == 2009/04/06 TechNexion TIM-8690 now supported ==<br /> <br /> coreboot now has support for the [http://www.technexion.com/index.php/tim-8690 TIM-8690] mainboard (AMD RS690/SB600 chipset). The code was contributed by [mailto:daniel@dmhome.net Daniel Toussaint], thanks!<br /> <br /> == 2009/03/22 coreboot @ FSF LibrePlanet 2009 ==<br /> <br /> [[User:MJones|Marc Jones]] gave a coreboot [http://marcjonesconsulting.com/FSF%20talk.pdf presentation] at the [http://www.fsf.org/ Free Software Foundation] annual meeting, [http://www.fsf.org/associate/meetings/2009 Libre Planet 2009]. <br /> <br /> == 2009/01/10 coreboot and SeaBIOS starts Windows 7 ==<br /> <br /> [[User:Ruik|Rudolf Marek]] recorded [[Screenshots#coreboot_and_SeaBIOS_starting_Windows_7|a video of his ASUS M2V-MX SE with coreboot and SeaBIOS starting Windows 7]] on a 2GHz AMD Sempron CPU.<br /> <br /> == 2009/01/06 Ten years of coreboot ==<br /> <br /> Anton Borisov [http://www.h-online.com/open/The-Open-Source-BIOS-is-Ten-An-interview-with-the-coreboot-developers--/features/112353 interviewed the original developers] ([http://www.heise.de/open/Zehn-Jahre-LinuxBIOS-Coreboot--/artikel/121679 german version]) as the Open Source PC firmware celebrates '''ten years of activity'''!<br /> <br /> = 2008 =<br /> <br /> == 2008/12/27 coreboot at 25C3 in Berlin, Germany ==<br /> <br /> [[User:Stuge|Peter Stuge]] presented [http://events.ccc.de/congress/2008/Fahrplan/events/2970.en.html coreboot: Beyond The Final Frontier] at [http://events.ccc.de/congress/2008/ the 25th Chaos Communication Congress (25C3)].<br /> [[Screenshots#Chaos_Communication_Congress_2008_.2825C3.29:_coreboot:_Beyond_The_Final_Frontier|The video presentation is available]] and also [http://www.linux-magazin.de/news/25c3_coreboot_version_3_gibt_sich_die_ehre an article in German] about the talk.<br /> <br /> == 2008/12/15 ASUS P2B-DS now supported ==<br /> <br /> coreboot now has initial support for the [[ASUS P2B-DS]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]].<br /> <br /> == 2008/12/09 AMD Pistachio now supported ==<br /> <br /> coreboot now has support for the '''AMD Pistachio''' evaluation board. The code was contributed by AMD, thanks!<br /> <br /> == 2008/12/10 coreboot confirmed for SCALE 7x ==<br /> <br /> There will be a [http://scale7x.socallinuxexpo.org/dotorg/coreboot coreboot booth] at the [http://scale7x.socallinuxexpo.org/ Southern California Linux Expo] (SCALE 7x) on '''February 20-22, 2009'''.<br /> <br /> == 2008/12/05 NEC PowerMate 2000 now supported ==<br /> <br /> coreboot now has initial support for the [http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/ NEC PowerMate 2000] board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks [mailto:quentin.rameau@gmail.com Quentin RAMEAU] for providing the required information and for testing.<br /> <br /> == 2008/11/19 LiPPERT Cool RoadRunner-LX now supported ==<br /> <br /> coreboot now has support for the [http://www.lippert-at.com/index.php?id=408 LiPPERT Cool RoadRunner-LX] mainboard. The code was contributed by [mailto:support@LiPPERTEmbedded.de Jens Rottmann] from LiPPERT Embedded Computers GmbH, thanks!<br /> <br /> == 2008/10/30 LiPPERT Cool SpaceRunner-LX now supported ==<br /> <br /> coreboot now has support for the [http://www.lippert-at.com/index.php?id=478 LiPPERT Cool SpaceRunner-LX] mainboard. The code was contributed by [mailto:support@LiPPERTEmbedded.de Jens Rottmann] from LiPPERT Embedded Computers GmbH, thanks!<br /> <br /> == 2008/10/28 Intel 945, ICH7, Core Duo/Core 2 Duo, and Kontron 986LCD-M/mITX now supported ==<br /> <br /> coreboot now has support for the '''Intel i945/ICH7 Desktop/Mobile''' chipset, the '''Core Duo/Core 2 Duo''' processor, and the [http://de.kontron.com/products/boards+and+mezzanines/embedded+motherboards/miniitx+motherboards/986lcdmmitx.html Kontron 986LCD-M/mITX] mainboard. The code was developed by [http://www.coresystems.de/ coresystems GmbH].<br /> <br /> == 2008/10/27 MSI MS-6147 now supported ==<br /> <br /> coreboot now has initial support for the '''MSI MS-6147''' mainboard. The code was contributed by [mailto:mats.andersson@gisladisker.org Mats Erik Andersson], thanks!<br /> <br /> == 2008/10/19 coreboot confirmed for 25C3 in Berlin, Germany ==<br /> <br /> [[User:Stuge|Peter Stuge]] will present coreboot at [http://events.ccc.de/congress/2008/ the 25th Chaos Communication Congress (25C3)].<br /> <br /> [[Screenshots#Chaos_Communication_Congress_2008_.2825C3.29:_coreboot:_Beyond_The_Final_Frontier|The video presentation is available]] and also [http://www.linux-magazin.de/news/25c3_coreboot_version_3_gibt_sich_die_ehre an article in German] about the talk.<br /> <br /> == 2008/10/12 VIA pc2500e now supported ==<br /> <br /> coreboot now has initial support for the [[VIA pc2500e Build Tutorial|VIA pc2500e]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]].<br /> <br /> == 2008/11/06 coreboot at ELC Europe 2008 in Ede, The Netherlands ==<br /> <br /> [[User:Stuge|Peter Stuge]] is presenting coreboot at the [http://www.nluug.nl/events/nj08/ NLUUG Autumn Conference on Mobile Computing] and [http://www.embeddedlinuxconference.com/elc_europe08/ CE Linux Forum - Embedded Linux conference Europe 2008].<br /> <br /> == 2008/10/26 coreboot at FSCONS 2008 in Gothenburg, Sweden ==<br /> <br /> [[User:Stuge|Peter Stuge]] is presenting coreboot at the [http://fscons.org/ Free Society Conference and Nordic Summit 2008].<br /> <br /> == 2008/09/24 AMD RS690 / SB600 chipset and AMD dbm690t board now supported ==<br /> <br /> coreboot now has initial support for the '''AMD RS690 / SB600''' chipset, as well as the [http://www.amd.com/us-en/assets/content_type/DownloadableAssets/42655A_S1DBM680T_PB.pdf AMD dbm690t] (Herring) board using that chipset. The code was contributed by AMD, thanks!<br /> <br /> == 2008/09/24 Intel EP80579 (Tolapai) now supported ==<br /> <br /> coreboot now has initial support for the '''Intel EP80579 (Tolapai)''' chipset. The code was contributed by [[User:Eswierk|Ed Swierk]], thanks!<br /> <br /> == 2008/09/24 coreboot interview at LinuxTag 2008 is now available as podcast ==<br /> <br /> [[User:Hailfinger|Carl-Daniel Hailfinger]] gave an [http://www.linuxpodcast.de/?id=240 interview about coreboot and flashrom] at LinuxTag 2008 in Berlin. It was broadcast live on [http://www.radiotux.de/ RadioTux] and is now available as [http://www.linuxpodcast.de/?id=240 podcast]. The interview is in German. Thanks to Sirko Kemter for organizing the interview, Thomas Steinbrecher for interviewing and Ingo Ebel for cutting it and putting it online.<br /> <br /> == 2008/09/23 ASUS M2V-MX SE now supported ==<br /> <br /> coreboot now has initial support for the [[ASUS M2V-MX SE Build Tutorial|ASUS M2V-MX SE]] mainboard. The code was contributed by [[User:Ruik|Rudolf Marek]], thanks!<br /> <br /> == 2008/09/13 coreboot talk at OpenBSD Slackathon in Stockholm ==<br /> <br /> [[User:Stuge|Peter Stuge]] presented coreboot at the [http://slackathon.se/2008/ Slackathon 2008] OpenBSD meeting.<br /> <br /> == 2008/09/10 Jetway J7F2/J7F4 now supported ==<br /> <br /> coreboot now has initial support for the [[Jetway J7F2 Build Tutorial|Jetway J7F2/J7F4]] mainboards. The code was contributed by [[User:Hawke|Alex Mauer]], thanks!<br /> <br /> == 2008/09/05 VIA VT8237S now supported ==<br /> <br /> coreboot now has initial support for the '''VIA VT8237S''' southbridge. The code was contributed by [[User:Ruik|Rudolf Marek]], thanks!<br /> <br /> == 2008/08/04 ASI MB-5BLGP / Neoware Eon 4000s now supported ==<br /> <br /> coreboot now has initial support for the '''ASI MB-5BLGP (Neoware Eon 4000s)''' board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks [mailto:hanneshe@arcor.de Hannes Hegewald] for providing the required information and for testing.<br /> <br /> == 2008/07/01 New logo announced ==<br /> <br /> The coreboot hare is the new project logo. Check it out over on the [[Logo]] page.<br /> <br /> == 2008/07/01 coreboot booth at OpenExpo in Zürich ==<br /> <br /> coreboot will be exhibiting at [http://www.openexpo.ch/ OpenExpo 2008] on '''September 24-25 2008''' in '''Zürich/Winterthur'''.<br /> <br /> We are also [[News#2008.2F04.2F19_coreboot_is_a_Hackontest_candidate|a Hackontest candidate]], the Hackontest is organized in connection with the Expo.<br /> <br /> == 2008/06/27 A-Trend ATC-6240 now supported ==<br /> <br /> coreboot now has initial support for the [http://active-hardware.com/english/reviews/mainboard/atc6240.htm A-Trend ATC-6240] board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks [mailto:eagle__eye@maktoob.com shadow] for providing the required information.<br /> <br /> == 2008/05/28 coreboot booth at LinuxTag in Berlin ==<br /> <br /> There will be a [[LinuxTag 2008|coreboot booth at LinuxTag 2008]] on '''May 28-31 2008''' in '''Berlin'''.<br /> <br /> == 2008/05/19 VIA EPIA-CN now supported ==<br /> <br /> coreboot now has initial support for the [http://www.coreboot.org/VIA_EPIA-CN_Build_Tutorial VIA EPIA-CN] board. The code was contributed by [mailto:aaron.lwe@gmail.com Aaron Lwe] of VIA, with various interim patches and testing also by [mailto:corey_osgood@verizon.net Corey Osgood], [mailto:urbez@linuxupc.upc.edu Urbez Santana Roma], [[User:Bari|Bari Ari]], and [mailto:remenic@gmail.com Richard Stellingwerff], thanks a lot! The code contribution also contained various VIA CN700 improvements which should make porting further VIA C7 + CN700 + VT8237R boards easier.<br /> <br /> == 2008/05/16 Thomson IP1000 now supported ==<br /> <br /> coreboot now has initial support for the [http://www.settoplinux.org/index.php Thomson IP1000] board. The code was contributed by [[User:Linux junkie|Joseph Smith]]. Linux has never been able to run on this board until now.<br /> <br /> == 2008/04/24 IEI PCISA-LX-800-R10 now supported ==<br /> <br /> Thanks to the contributions from [[User:Nikola|Nikolay Petukhov]] we now have support for the [[IEI LX 800 Build Tutorial|IEI PCISA-LX-800-R10]] half-size mainboard in our tree.<br /> <br /> == 2008/04/21 coreboot participating in Google Summer of Code 2008 ==<br /> <br /> The coreboot project (with [http://www.coresystems.de coresystems GmbH] as mentoring organization) is taking part in the [http://code.google.com/soc/ Google Summer of Code&amp;trade; 2008] (GSoC). This year, the project has been assigned two slots/students who will work on the following projects:<br /> <br /> * [http://code.google.com/soc/2008/coresystems/appinfo.html?csaid=ED0729A9DB64B39B All Virtual All The Time (AVATT)]<br /> : ''This project aims to integrate into the coreboot BIOS a payload consisting of a minimalist KVM-aware Linux kernel along with an initrd image that contains the tools needed for creating and starting guest virtual machines installed on top of it. The resulting system could host any x86(or x86-64) OS that can run over KVM (almost any major OS does), and there is a great challenge to make it as small as possible, so that it can fit in a 2MB flash image.''<br /> * [http://code.google.com/soc/2008/coresystems/appinfo.html?csaid=5B0D5443ED6193C7 SCSI booting in coreboot]<br /> : ''Currently coreboot can not boot from an arbitrary SCSI controller. There are two solutions for the problem: (1) Use Linux and Kexec. This requires to keep the SCSI driver in the flash chip. (2) Use x86emu/vm86/ADLO and the int13 method. This would allow to use the PCI option rom available on all modern SCSI controllers. So we obviously need a solution based on the latter. This could as well be implemented as a Linux program, as an intermediate payload, or as a shared library. At this point of time, I would like to implemente it as a daemon program. The program needs to catch the int13 interrupt vector that the SCSI option rom installs and make it available to arbitrary (firmware/payload) code trying to load something from disk.''<br /> <br /> == 2008/04/19 coreboot is a Hackontest candidate ==<br /> <br /> [[User:Hailfinger|Carl-Daniel Hailfinger]] has registered coreboot at [http://www.hackontest.org/ Hackontest].<br /> <br /> : ''Hackontest is a 24 hour programming competition between teams of three open source software projects.<br /> <br /> : The event takes place at OpenExpo on September 24/25, 2008 in Zurich, Switzerland.''<br /> <br /> [[Image:HackontestBanner_468x60-01.jpg]]<br /> <br /> [http://www.hackontest.org/index.php?action=Root-projectDetail(36) Click here to request features and vote for them.]<br /> <br /> == 2008/04/19 PC Engines ALIX.2C3 now supported ==<br /> <br /> Thanks to [[User:Ward|Ward Vandewege]] coreboot v3 now supports the PC Engines [http://pcengines.ch/alix2c3.htm ALIX.2C3] mainboard.<br /> <br /> == 2008/04/04 Silicon Mechanics to ship servers with coreboot preinstalled ==<br /> <br /> Chris Watson at [http://siliconmechanics.com Silicon Mechanics] says:<br /> <br /> :''We will commit to offering coreboot preinstallation on the [http://www.siliconmechanics.com/i7045/opteron-server.php Rackform nServ A236] with a specific set of hardware and software. In the future, we may expand the program to additional platforms based on customer interest. We will include a message about coreboot support on the platform page in the next few days with instructions to contact sales for additional information.''<br /> <br /> If you want to buy such a machine, please contact Art Mann ([mailto:artm@siliconmechanics.com artm@siliconmechanics.com]) at Silicon Mechanics.<br /> <br /> The A236 is a nice 1U server with 4 drive bays and a dual Opteron board (Supermicro H8DMR), which [http://www.coreboot.org/Supported_Motherboards is supported in coreboot v2].<br /> <br /> == 2008/04/03 coreboot Symposium in Denver ==<br /> <br /> There was a coreboot symposium in Denver, April 3 – 5, 2008 held during the High Performance Computer Science Week (HPCSW) [http://www.hpcsw.org LinuxBIOS Summit].<br /> <br /> More information is available on the [[Coreboot Symposium 2008]] page.<br /> <br /> == 2008/03/29 TeleVideo TC7020 now supported ==<br /> <br /> coreboot now has initial support for the [[TeleVideo TC7020 Build Tutorial|TeleVideo TC7020]] thin client. The code was contributed by [mailto:tokyo246@gmail.com Kenji Noguchi], thanks!<br /> <br /> == 2008/03/17 MSI MS-6119 now supported ==<br /> <br /> coreboot now has initial support for the [http://global.msi.com.tw/index.php?func=proddesc&amp;prod_no=332&amp;maincat_no=1 MSI MS-6119] board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks [mailto:mechno@gmail.com Maarten van Eeuwijk] for information and testing.<br /> <br /> == 2008/03/17 Intel 3100 chipset and Intel devkit (Mt. Arvon) board now supported ==<br /> <br /> coreboot now has initial support for the [http://www.intel.com/design/intarch/devkits/pm3100.htm Intel &quot;Mt. Arvon&quot;] development board, as well as the [http://www.intel.com/design/chipsets/embedded/3100.htm Intel 3100] chipset. The code was contributed by [[User:Eswierk|Ed Swierk]].<br /> <br /> == 2008/03/09 RCA RM4100 now supported ==<br /> <br /> coreboot now has initial support for the [http://www.settoplinux.org RCA RM4100] board. The code was contributed by [[User:Linux junkie|Joseph Smith]]. This also includes support for the Intel 830M (82830) northbridge.<br /> <br /> == 2008/03/07 ASUS A8V-E Deluxe now supported ==<br /> <br /> coreboot now has [[ASUS A8V-E Deluxe Build Tutorial|initial support]] for the [http://www.asus.com.tw/products.aspx?l1=3&amp;l2=15&amp;l3=143&amp;l4=0&amp;model=376&amp;modelmenu=1 ASUS A8V-E Deluxe] board. The testing so far was done by [[User:Uwe|Uwe Hermann]], re-using code written by [mailto:r.marek@assembler.cz Rudolf Marek] for the ASUS A8V-E SE (thanks!), which is very similar.<br /> <br /> == 2008/02/20 MSI MS-7135 (K8N Neo3) now supported ==<br /> <br /> coreboot now has initial support for the [http://global.msi.com.tw/index.php?func=proddesc&amp;prod_no=170&amp;maincat_no=1 MSI MS-7135 (K8N Neo3)] board. The code was contributed by [[User:Jakllsch|Jonathan A. Kollasch]].<br /> <br /> == 2008/01/27 Abit BE6-II V2.0 now supported ==<br /> <br /> coreboot now supports the [http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=BE6-II+V2.0&amp;fMTYPE=Slot+1 Abit BE6-II V2.0] board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks Sergei Antonov for information and testing.<br /> <br /> == 2008/01/12 LinuxBIOS is now called coreboot ==<br /> <br /> As Ron Minnich, the founder of the LinuxBIOS project [http://www.coreboot.org/pipermail/coreboot/2008-January/029133.html explains in his announcement] the LinuxBIOS project has now been renamed to '''coreboot'''. Read the [http://www.coreboot.org/pipermail/coreboot/2008-January/029133.html whole announcement] for more details and the reasons behind the renaming.<br /> <br /> = 2007 =<br /> <br /> == 2007/11/26 ASUS MEW-AM now supported ==<br /> <br /> LinuxBIOS now [[ASUS MEW-AM Build Tutorial|supports]] the [ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/ ASUS MEW-AM] board. The code was contributed by [[User:Uwe|Uwe Hermann]].<br /> <br /> == 2007/11/13 Advantech PCM-5820 now supported ==<br /> <br /> LinuxBIOS now [[Advantech PCM-5820 Build Tutorial|supports]] the [http://taiwan.advantech.com.tw/products/Model_Detail.asp?model_id=1-1TGZL8&amp;BU=ACG&amp;PD= Advantech PCM-5820] half-size board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks to [[User:Erwan|Erwan Velu]] for help and testing.<br /> <br /> == 2007/11/13 Lightning talk at FSCONS 2007 in Gothenburg on 2007/12/08 ==<br /> <br /> [mailto:peter@stuge.se Peter Stuge] is presenting [http://fscons.org/node/138 a LinuxBIOS lightning talk] at [http://fscons.org/ FSCONS 2007] on December 8.<br /> <br /> == 2007/11/03 ASUS A8V-E SE now supported ==<br /> <br /> Thanks to the great contribution from [mailto:r.marek@assembler.cz Rudolf Marek] we now have support for the [http://www.asus.com.tw/products.aspx?l1=3&amp;l2=15&amp;l3=143&amp;l4=0&amp;model=576&amp;modelmenu=1 ASUS A8V-E SE] mainboard.<br /> <br /> == 2007/10/31 Various Intel 440BX boards now supported ==<br /> <br /> We now have initial support for various Intel 440BX / 82371EB based mainboards of the Pentium II/III era, namely the ASUS P2B-F, ASUS P3B-F, A-Trend ATC-6220, AZZA PT-6IBD, Biostar M6TBA, Compaq Deskpro EN SFF P600, and GIGABYTE GA-6BXC. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks to todthgie, idwer_, and zxy_64-2 on [[IRC]] for helping with some of the boards.<br /> <br /> == 2007/10/30 SiS761GX/SiS966 chipset and GIGABYTE GA-2761GXDK board now supported ==<br /> <br /> Thanks to the great contributions from Morgan Tsai of SiS we now have support for both the SiS761GX/SiS966 chipset and the GIGABYTE [http://www.rssfeedbus.com/index.php?showtopic=1515 GA-2761GXDK] mainboard, which uses that chipset.<br /> <br /> == 2007/10/30 VIA K8T890 / VT8237R now supported ==<br /> <br /> Thanks to the great contribution from [mailto:r.marek@assembler.cz Rudolf Marek] we now have support for the VIA K8T890 / VT8237R chipset. A mainboard which uses this chipset will soon be added.<br /> <br /> == 2007/10/26 AXUS TC320 now supported ==<br /> <br /> LinuxBIOS now [[AXUS TC320 Build Tutorial|supports]] the '''AXUS TC320''' (Geode GX1 based) thin client. The code was contributed by [[User:Jbe|Jürgen Beisert]].<br /> <br /> == 2007/10/10 BCOM WinNET100 (IGEL-316) now supported ==<br /> <br /> LinuxBIOS now [[BCOM WINNET100 Build Tutorial|supports]] the '''BCOM WinNET100''' mainboard, as found in (e.g.) the '''IGEL-316''' (Geode GX1 based) thin client. The code was contributed by [[User:Jbe|Jürgen Beisert]].<br /> <br /> == 2007/09/22 MSI MS-7260 now supported ==<br /> <br /> LinuxBIOS now [[MSI MS-7260 Build Tutorial|supports]] the MSI [http://global.msi.com.tw/index.php?func=proddesc&amp;prod_no=255&amp;maincat_no=1&amp;cat2_no=171 MS-7260 (K9N Neo)] mainboard. The code was added by [[User:Uwe|Uwe Hermann]], but most of the hard work (K8 + MCP55 support) was done by others.<br /> <br /> == 2007/09/13 MSI MS-6178 now supported ==<br /> <br /> Thanks to [[User:Uwe|Uwe Hermann]] we now have preliminary support for the MSI [http://www.msi-technology.de/produkte/main_idx_view.php?Prod_id=27 MS-6178] mainboard.<br /> <br /> == 2007/09/08 PC Engines ALIX1.C now supported ==<br /> <br /> Thanks to [[User:Rminnich|Ron Minnich]] we now have preliminary support for the PC Engines [http://pcengines.ch/alix1c.htm ALIX1.C] mainboard.<br /> <br /> == 2007/06/14 Intel 810 chipset and ASUS MEW-VM now supported ==<br /> <br /> Thanks to the great contributions from [mailto:corey_osgood@verizon.net Corey Osgood] we now have preliminary support for both the Intel 810 chipset (82810 northbridge) and the ASUS MEW-VM mainboard, which uses that northbridge.<br /> <br /> == 2007/06/13 AMD DB800 (Salsa) now supported ==<br /> <br /> LinuxBIOS now supports the AMD [http://www.amd.com/us-en/ConnectivitySolutions/ProductInformation/0,,50_2330_9863_13022%5E13060,00.html DB800] (a.k.a Salsa) Geode LX reference/evaluation mainboard. The code was contributed by [mailto:marc.jones@amd.com Marc Jones] of AMD.<br /> <br /> == 2007/06/07 IEI JUKI-511P and ROCKY-512 now supported ==<br /> <br /> Thanks to the contributions from [mailto:nikolaypetukhov@gmail.com Nikolay Petukhov] we now have support for the IEI JUKI-511P and the IEI ROCKY-512 half-size mainboards in our tree!<br /> <br /> == 2007/05/24 ASUS A8N-E now supported ==<br /> <br /> Thanks to the nice work of [mailto:pdegler@rumms.uni-mannheim.de Philipp Degler] we now have support for the ASUS A8N-E mainboard in our tree!<br /> <br /> == 2007/05/23 LinuxBIOS booth at LinuxTag in Berlin, 29/5-2/6 ==<br /> <br /> In one corner of Messe Berlin hall 12 (booth 12-80) we will be showing a couple of different systems all using LinuxBIOS to boot. There is a boot time competition in the booth (nice T-shirts to win!) and on Saturday 2/6 the developers will be presenting a [[LinuxTag 2007 Workshop|workshop]] where visitors are walked through the steps required to make their own EPIA/-M/-MII board run LinuxBIOS!<br /> <br /> Video of an [http://video.google.com/videoplay?docid=3820348270731247338&amp;hl=en interview] at the LinuxBIOS booth.<br /> <br /> == 2007/05/05 DIGITAL-LOGIC MSM800SEV now supported ==<br /> <br /> The [http://www.digitallogic.ch/english/products/datasheets/ms_pc104_detail.asp?id=MSM800SEV DIGITAL-LOGIC MSM800SEV] mainboard is now supported by LinuxBIOS. The code was written by [[User:Rminnich|Ron Minnich]], based on the recent AMD Geode LX framework contributed by AMD.<br /> <br /> == 2007/05/04 AMD Norwich support and generally improved AMD Geode LX support ==<br /> <br /> LinuxBIOS now supports the AMD Norwich reference/evaluation mainboard. This is ''the'' AMD Geode LX reference platform, and it's now well-supported by LinuxBIOS. Additionally the AMD Geode LX code in general was heavily improved and should simplify further ports of Geode LX systems a lot. The code was written and contributed by several AMD engineers, foremost [mailto:jordan.crouse@amd.com Jordan Crouse] and [mailto:marc.jones@amd.com Marc Jones] of AMD.<br /> <br /> == 2007/03/14 LinuxBIOS participating in Google Summer of Code 2007 ==<br /> <br /> The LinuxBIOS project (with [http://www.coresystems.de coresystems GmbH] as mentoring organization) is taking part in the [http://code.google.com/soc/ Google Summer of Code&amp;trade; 2007] (GSoC). There is a [[GSoC|list of project ideas]] for students to work on (but feel free to suggest further ideas [[Mailinglist|on the LinuxBIOS mailing list]]).<br /> <br /> Students who are interested in working on a LinuxBIOS-related GSoC project must apply until &lt;strike&gt;'''March 24, 2007'''&lt;/strike&gt; [http://groups.google.com/group/google-summer-of-code-announce/browse_thread/thread/72f227109321bba5 Monday, March 27, 2007]!<br /> <br /> '''Update:''' LinuxBIOS ended up with [http://code.google.com/soc/coresystems/about.html seven student projects] for GSoC 2007!<br /> <br /> == 2007/02/24 LinuxBIOS talk at FOSDEM 2007 ==<br /> <br /> [[User:Rminnich|Ron Minnich]] gave [http://www.fosdem.org/2007/schedule/events/linuxbios a talk about LinuxBIOS] on February 24, 2007 at [http://www.fosdem.org/2007/ FOSDEM 2007].<br /> <br /> A [http://ftp.belnet.be/mirrors/FOSDEM/2007/FOSDEM2007-LinuxBios.ogg video recording of the talk] (Ogg, 234 MB) is available.<br /> <br /> == 2007/02/09 MSI K9ND Master Series (MS-9282) supported in LinuxBIOS ==<br /> <br /> LinuxBIOS now supports the MSI [http://cweb.msi.com.tw/program/products/server/svr/pro_svr_detail.php?UID=632 K9SD Master Series (MS-9282)] mainboards. The code was contributed by [mailto:bxshi@msik.com.cn bxshi] of MSI, based on code for the NVIDIA MCP55 by [mailto:yinghailu@gmail.com Yinghai Lu] of AMD.<br /> <br /> = 2006 =<br /> <br /> == 2006/11/02 MSI K9SD Master-S2R (MS-9185) supported in LinuxBIOS ==<br /> <br /> LinuxBIOS now supports the MSI [http://www.msiserver.de/de/Produkte/Server_Mainboards/K9SD_Master_S2R_MS_9185.aspx K9SD Master-S2R (MS-9185)] mainboard. The code was contributed by [mailto:bxshi@msik.com.cn bxshi] of MSI.<br /> <br /> == 2006/10/05 AMD Rev F supported in LinuxBIOS ==<br /> <br /> The AMD dual core support code is in public tree now. It includes<br /> * AMD Rev F AMD64 on Socket F/Socket AM2<br /> <br /> --yhlu<br /> <br /> == 2006/10/01 LinuxBIOS Symposium 2006 in Hamburg ==<br /> <br /> The LinuxBIOS Symposium 2006 took place in the old warehouse complex Speicherstadt in Hamburg, Germany.<br /> See the page [[LinuxBIOS Symposium 2006]] for more details, slides, photos, etc...<br /> <br /> --Stefan<br /> <br /> <br /> = 2005 =<br /> <br /> == 2005/06/02 AMD dual core supported in LinuxBIOS ==<br /> <br /> The AMD dual core support code is in public tree now. It includes<br /> * AMD D0/E0 Opteron new mem mapping support <br /> * AMD E Opteron dual core support <br /> * AMD E Opteron mem hole support <br /> * AMD K8 Four Ranks DIMM support --- Quad Ranks.<br /> <br /> --yhlu<br /> <br /> == 2005/05/11 Nvidia CK804 (NForce4) supported in LinuxBIOS ==<br /> <br /> The Nvidia CK804 support code is in public tree now. It includes<br /> * Nvidia CK804 support<br /> * smbus bus number support (to handle multi sumbus and mux)<br /> * superio smsc47 support <br /> * Tyan S2895/S2891/S2892 support <br /> * flash_rom Ck804 support<br /> <br /> --yhlu<br /> <br /> == 2005/04/22 How Many People Are Using LinuxBIOS? Would you believe 1,000,000? ==<br /> <br /> This question comes up to us all the time. Last week, I got an amazing answer. First, let<br /> me mention that I tell skeptical people at vendors all the time, when <br /> asked this question: &quot;A lot more than just the <br /> cluster community. The real use is in the embedded world&quot;. Well, again, last week, <br /> I found out just how real that use is. <br /> <br /> The system in question is the STPC Consumer. Evidently, this chipset is used in <br /> an internet terminal sold in India. It runs LinuxBIOS and Linux. <br /> <br /> There are at least one MILLION (1,000,000) of these things in use. I realize that is not much compared to the size of some markets, but had you told me six years ago that <br /> one million systems would be using LinuxBIOS in 2005, I don't think I would have believed you.<br /> <br /> --Ron<br /> <br /> == 2005/03/01 LinuxBIOS Wiki up and running ==<br /> <br /> After a week of testing and playing around, LinuxBIOS has a brand new Wiki now.<br /> <br /> --Stefan<br /> <br /> == 2005/02/28 LinuxBIOS slashdotted again ==<br /> <br /> After Richard Stallman's call for support of free BIOS LinuxBIOS was slashdotted this weekend.</div>

Juri http://www.coreboot.org/News 2010-03-11T00:31:21Z

<p>Juri: /* 2010/03/05 Asus P2B LS now supported */</p> <hr /> <div>= 2010 =<br /> <br /> == 2010/03/05 Asus P2B LS now supported ==<br /> <br /> coreboot now supports the Asus P2B-LS board. Board support and additional 440BX chipset support was written by Keith Hui, with Uwe Hermann doing review/testing. This proves that despite the great age of the board in question (it was released in 1998), an active Open Source community continues to provide support over a decade later.<br /> <br /> == 2010/01/17 Roda RK886EX (Rocky III+) now supported ==<br /> <br /> coreboot now has support for the first laptop, the [http://www.roda-computer.com/en/products/notebooks/rocky-iii-rk886ex.html Roda RK886EX (Rocky III+)], based on the Intel i945 / ICH7 chipset. The code was contributed by [http://www.coresystems.de/en/ coresystems GmbH], thanks! Read the [http://www.coreboot.org/pipermail/coreboot-announce/2010-January/000006.html full announcement] for details.<br /> <br /> = 2009 =<br /> <br /> == 2009/10/21 HP e-Vectra P2706T now supported ==<br /> <br /> coreboot now has initial support for the [[HP e-Vectra P2706T]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]]. System information and testing by [mailto:stawel@gmail.com Pawe? Stawicki], thanks!<br /> <br /> == 2009/10/13 MSI MS-6156 now supported ==<br /> <br /> coreboot now has initial support for the [[MSI MS-6156]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]].<br /> <br /> == 2009/10/13 TechNexion TIM-5690 now supported ==<br /> <br /> coreboot now has support for the [http://www.technexion.com/index.php/tim-5690 TechNexion TIM-5690] mainboard (AMD RS690/SB600 chipset). The code was contributed by [mailto:libra.li@technexion.com Libra Li] of TechNexion, thanks!<br /> <br /> == 2009/10/13 Kontron KT690/mITX now supported ==<br /> <br /> coreboot now has support for the [http://us.kontron.com/products/boards+and+mezzanines/embedded+motherboards/miniitx+motherboards/kt690mitx.html Kontron KT690/mITX] mainboard (AMD RS690/SB600 chipset). The code was contributed by [http://www.coresystems.de/en/ coresystems GmbH], thanks!<br /> <br /> == 2009/09/25 coreboot on the cover of the Linux Journal ==<br /> <br /> The [http://www.linuxjournal.com/issue/186 October 2009 Linux Journal] features the coreboot logo on the cover and contains the article [http://www.linuxjournal.com/article/10447 &quot;Coreboot at Your Service!&quot;] by Anton Borisov - Use coreboot to take control of your hardware.<br /> <br /> == 2009/09/02 flashrom 0.9.1 has been released ==<br /> <br /> [[Flashrom|flashrom 0.9.1]] has been released. See the [[Flashrom/0.9.1|release notes]] for details.<br /> <br /> == 2009/07/15 VIA EPIA-M700 now supported ==<br /> <br /> The One Laptop per Child, Association, Inc. has contributed initial support for the [[VIA EPIA-M700]] board (based on the VIA VX800 code submitted earlier), thanks a lot! The code is still being worked on and improved by the community.<br /> <br /> == 2009/07/05 Mitac 6513WU now supported ==<br /> <br /> coreboot now has initial support for the [[Mitac 6513WU]] mainboard. The code was contributed by [mailto:mgold@ncf.ca Michael Gold], thanks!<br /> <br /> == 2009/07/01 Intel EagleHeights now supported ==<br /> <br /> coreboot now has initial support for the '''Intel EagleHeights''' mainboard. The code was contributed by [mailto:thomas.jourdan@gmail.com Thomas Jourdan], thanks!<br /> <br /> == 2009/07/01 VIA EPIA-N now supported ==<br /> <br /> coreboot now has initial support for the [http://www.idotpc.com/TheStore/pc/viewCategories.asp?idCategory=56 VIA EPIA-N] mainboard. The code was contributed by [mailto:bothlyn@blueyonder.co.uk Jon Harrison], thanks!<br /> <br /> == 2009/06/24 Soyo SY-6BA+ III now supported ==<br /> <br /> coreboot now has initial support for the [[Soyo SY-6BA Plus III|Soyo SY-6BA+ III]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks [mailto:ziltro@ziltro.com Andrew Morgan] for information and testing!<br /> <br /> == 2009/05/27 VIA VX800 now supported ==<br /> <br /> The One Laptop per Child, Association, Inc. has contributed support for the '''VIA VX800''' chipset family to the coreboot v2 tree.<br /> <br /> == 2009/05/04 flashrom 0.9.0 has been released ==<br /> <br /> After nine years of development and constant improvement, we have added support for every BIOS flash ROM technology present on x86 mainboards and every flash ROM chip we ever saw in the wild.<br /> <br /> Highlights of [[flashrom]] include:<br /> * Parallel, LPC, FWH and SPI flash interfaces.<br /> * 157 flash chip families and half a dozen variants of each family.<br /> * Flash chip package agnostic. DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, TSOP40 and more have all been verified to work.<br /> * 75 different chipsets, some with multiple flash controllers.<br /> * Special mainboard enabling code for dozens of nonstandard mainboards.<br /> * No physical access needed, root access is sufficient.<br /> * No bootable floppy disk, bootable CD-ROM or other media needed.<br /> * No keyboard or monitor needed. Simply reflash remotely via SSH.<br /> * No instant reboot needed. Reflash your ROM in a running system, verify it, be happy. The new firmware will be present next time you boot.<br /> * Crossflashing and hotflashing is possible as long as the flash chips are electrically and logically compatible (same protocol). Great for recovery.<br /> * Scriptability. Reflash a whole pool of identical machines at the same time from the command line. It is recommended to check flashrom output and error codes.<br /> * Speed. flashrom is much faster than vendor flash tools.<br /> * Supports Linux, FreeBSD, DragonFly BSD, Solaris, Mac OS X. Please refer to the README for build instructions.<br /> <br /> Thanks go to everyone who contributed to flashrom over the years and especially to Li-Ta Lo for starting this project.<br /> <br /> The release announcement can be found at http://www.coreboot.org/pipermail/coreboot/2009-May/047636.html.<br /> <br /> == 2009/04/22 HP ProLiant DL145 G3 now supported ==<br /> <br /> coreboot now has support for the [http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00816835&amp;lang=en&amp;cc=us&amp;taskId=101&amp;prodSeriesId=3219755&amp;prodTypeId=15351 HP ProLiant DL145 G3] mainboard. The code was contributed by [mailto:nuessle@uni-hd.de Mondrian Nuessle] (thanks!).<br /> <br /> == 2009/04/18 ASUS P2B-D now supported ==<br /> <br /> coreboot now has initial support for the [[ASUS P2B-D]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]].<br /> <br /> == 2009/04/18 VIA CX700, and VIA VT8454c mainboard now supported ==<br /> <br /> coreboot now has support for the '''VIA CX700''' chipset, and the '''VIA VT8454c''' mainboard. The code was developed by [http://www.coresystems.de/ coresystems GmbH].<br /> <br /> == 2009/04/06 TechNexion TIM-8690 now supported ==<br /> <br /> coreboot now has support for the [http://www.technexion.com/index.php/tim-8690 TIM-8690] mainboard (AMD RS690/SB600 chipset). The code was contributed by [mailto:daniel@dmhome.net Daniel Toussaint], thanks!<br /> <br /> == 2009/03/22 coreboot @ FSF LibrePlanet 2009 ==<br /> <br /> [[User:MJones|Marc Jones]] gave a coreboot [http://marcjonesconsulting.com/FSF%20talk.pdf presentation] at the [http://www.fsf.org/ Free Software Foundation] annual meeting, [http://www.fsf.org/associate/meetings/2009 Libre Planet 2009]. <br /> <br /> == 2009/01/10 coreboot and SeaBIOS starts Windows 7 ==<br /> <br /> [[User:Ruik|Rudolf Marek]] recorded [[Screenshots#coreboot_and_SeaBIOS_starting_Windows_7|a video of his ASUS M2V-MX SE with coreboot and SeaBIOS starting Windows 7]] on a 2GHz AMD Sempron CPU.<br /> <br /> == 2009/01/06 Ten years of coreboot ==<br /> <br /> Anton Borisov [http://www.h-online.com/open/The-Open-Source-BIOS-is-Ten-An-interview-with-the-coreboot-developers--/features/112353 interviewed the original developers] ([http://www.heise.de/open/Zehn-Jahre-LinuxBIOS-Coreboot--/artikel/121679 german version]) as the Open Source PC firmware celebrates '''ten years of activity'''!<br /> <br /> = 2008 =<br /> <br /> == 2008/12/27 coreboot at 25C3 in Berlin, Germany ==<br /> <br /> [[User:Stuge|Peter Stuge]] presented [http://events.ccc.de/congress/2008/Fahrplan/events/2970.en.html coreboot: Beyond The Final Frontier] at [http://events.ccc.de/congress/2008/ the 25th Chaos Communication Congress (25C3)].<br /> [[Screenshots#Chaos_Communication_Congress_2008_.2825C3.29:_coreboot:_Beyond_The_Final_Frontier|The video presentation is available]] and also [http://www.linux-magazin.de/news/25c3_coreboot_version_3_gibt_sich_die_ehre an article in German] about the talk.<br /> <br /> == 2008/12/15 ASUS P2B-DS now supported ==<br /> <br /> coreboot now has initial support for the [[ASUS P2B-DS]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]].<br /> <br /> == 2008/12/09 AMD Pistachio now supported ==<br /> <br /> coreboot now has support for the '''AMD Pistachio''' evaluation board. The code was contributed by AMD, thanks!<br /> <br /> == 2008/12/10 coreboot confirmed for SCALE 7x ==<br /> <br /> There will be a [http://scale7x.socallinuxexpo.org/dotorg/coreboot coreboot booth] at the [http://scale7x.socallinuxexpo.org/ Southern California Linux Expo] (SCALE 7x) on '''February 20-22, 2009'''.<br /> <br /> == 2008/12/05 NEC PowerMate 2000 now supported ==<br /> <br /> coreboot now has initial support for the [http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/ NEC PowerMate 2000] board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks [mailto:quentin.rameau@gmail.com Quentin RAMEAU] for providing the required information and for testing.<br /> <br /> == 2008/11/19 LiPPERT Cool RoadRunner-LX now supported ==<br /> <br /> coreboot now has support for the [http://www.lippert-at.com/index.php?id=408 LiPPERT Cool RoadRunner-LX] mainboard. The code was contributed by [mailto:support@LiPPERTEmbedded.de Jens Rottmann] from LiPPERT Embedded Computers GmbH, thanks!<br /> <br /> == 2008/10/30 LiPPERT Cool SpaceRunner-LX now supported ==<br /> <br /> coreboot now has support for the [http://www.lippert-at.com/index.php?id=478 LiPPERT Cool SpaceRunner-LX] mainboard. The code was contributed by [mailto:support@LiPPERTEmbedded.de Jens Rottmann] from LiPPERT Embedded Computers GmbH, thanks!<br /> <br /> == 2008/10/28 Intel 945, ICH7, Core Duo/Core 2 Duo, and Kontron 986LCD-M/mITX now supported ==<br /> <br /> coreboot now has support for the '''Intel i945/ICH7 Desktop/Mobile''' chipset, the '''Core Duo/Core 2 Duo''' processor, and the [http://de.kontron.com/products/boards+and+mezzanines/embedded+motherboards/miniitx+motherboards/986lcdmmitx.html Kontron 986LCD-M/mITX] mainboard. The code was developed by [http://www.coresystems.de/ coresystems GmbH].<br /> <br /> == 2008/10/27 MSI MS-6147 now supported ==<br /> <br /> coreboot now has initial support for the '''MSI MS-6147''' mainboard. The code was contributed by [mailto:mats.andersson@gisladisker.org Mats Erik Andersson], thanks!<br /> <br /> == 2008/10/19 coreboot confirmed for 25C3 in Berlin, Germany ==<br /> <br /> [[User:Stuge|Peter Stuge]] will present coreboot at [http://events.ccc.de/congress/2008/ the 25th Chaos Communication Congress (25C3)].<br /> <br /> [[Screenshots#Chaos_Communication_Congress_2008_.2825C3.29:_coreboot:_Beyond_The_Final_Frontier|The video presentation is available]] and also [http://www.linux-magazin.de/news/25c3_coreboot_version_3_gibt_sich_die_ehre an article in German] about the talk.<br /> <br /> == 2008/10/12 VIA pc2500e now supported ==<br /> <br /> coreboot now has initial support for the [[VIA pc2500e Build Tutorial|VIA pc2500e]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]].<br /> <br /> == 2008/11/06 coreboot at ELC Europe 2008 in Ede, The Netherlands ==<br /> <br /> [[User:Stuge|Peter Stuge]] is presenting coreboot at the [http://www.nluug.nl/events/nj08/ NLUUG Autumn Conference on Mobile Computing] and [http://www.embeddedlinuxconference.com/elc_europe08/ CE Linux Forum - Embedded Linux conference Europe 2008].<br /> <br /> == 2008/10/26 coreboot at FSCONS 2008 in Gothenburg, Sweden ==<br /> <br /> [[User:Stuge|Peter Stuge]] is presenting coreboot at the [http://fscons.org/ Free Society Conference and Nordic Summit 2008].<br /> <br /> == 2008/09/24 AMD RS690 / SB600 chipset and AMD dbm690t board now supported ==<br /> <br /> coreboot now has initial support for the '''AMD RS690 / SB600''' chipset, as well as the [http://www.amd.com/us-en/assets/content_type/DownloadableAssets/42655A_S1DBM680T_PB.pdf AMD dbm690t] (Herring) board using that chipset. The code was contributed by AMD, thanks!<br /> <br /> == 2008/09/24 Intel EP80579 (Tolapai) now supported ==<br /> <br /> coreboot now has initial support for the '''Intel EP80579 (Tolapai)''' chipset. The code was contributed by [[User:Eswierk|Ed Swierk]], thanks!<br /> <br /> == 2008/09/24 coreboot interview at LinuxTag 2008 is now available as podcast ==<br /> <br /> [[User:Hailfinger|Carl-Daniel Hailfinger]] gave an [http://www.linuxpodcast.de/?id=240 interview about coreboot and flashrom] at LinuxTag 2008 in Berlin. It was broadcast live on [http://www.radiotux.de/ RadioTux] and is now available as [http://www.linuxpodcast.de/?id=240 podcast]. The interview is in German. Thanks to Sirko Kemter for organizing the interview, Thomas Steinbrecher for interviewing and Ingo Ebel for cutting it and putting it online.<br /> <br /> == 2008/09/23 ASUS M2V-MX SE now supported ==<br /> <br /> coreboot now has initial support for the [[ASUS M2V-MX SE Build Tutorial|ASUS M2V-MX SE]] mainboard. The code was contributed by [[User:Ruik|Rudolf Marek]], thanks!<br /> <br /> == 2008/09/13 coreboot talk at OpenBSD Slackathon in Stockholm ==<br /> <br /> [[User:Stuge|Peter Stuge]] presented coreboot at the [http://slackathon.se/2008/ Slackathon 2008] OpenBSD meeting.<br /> <br /> == 2008/09/10 Jetway J7F2/J7F4 now supported ==<br /> <br /> coreboot now has initial support for the [[Jetway J7F2 Build Tutorial|Jetway J7F2/J7F4]] mainboards. The code was contributed by [[User:Hawke|Alex Mauer]], thanks!<br /> <br /> == 2008/09/05 VIA VT8237S now supported ==<br /> <br /> coreboot now has initial support for the '''VIA VT8237S''' southbridge. The code was contributed by [[User:Ruik|Rudolf Marek]], thanks!<br /> <br /> == 2008/08/04 ASI MB-5BLGP / Neoware Eon 4000s now supported ==<br /> <br /> coreboot now has initial support for the '''ASI MB-5BLGP (Neoware Eon 4000s)''' board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks [mailto:hanneshe@arcor.de Hannes Hegewald] for providing the required information and for testing.<br /> <br /> == 2008/07/01 New logo announced ==<br /> <br /> The coreboot hare is the new project logo. Check it out over on the [[Logo]] page.<br /> <br /> == 2008/07/01 coreboot booth at OpenExpo in Zürich ==<br /> <br /> coreboot will be exhibiting at [http://www.openexpo.ch/ OpenExpo 2008] on '''September 24-25 2008''' in '''Zürich/Winterthur'''.<br /> <br /> We are also [[News#2008.2F04.2F19_coreboot_is_a_Hackontest_candidate|a Hackontest candidate]], the Hackontest is organized in connection with the Expo.<br /> <br /> == 2008/06/27 A-Trend ATC-6240 now supported ==<br /> <br /> coreboot now has initial support for the [http://active-hardware.com/english/reviews/mainboard/atc6240.htm A-Trend ATC-6240] board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks [mailto:eagle__eye@maktoob.com shadow] for providing the required information.<br /> <br /> == 2008/05/28 coreboot booth at LinuxTag in Berlin ==<br /> <br /> There will be a [[LinuxTag 2008|coreboot booth at LinuxTag 2008]] on '''May 28-31 2008''' in '''Berlin'''.<br /> <br /> == 2008/05/19 VIA EPIA-CN now supported ==<br /> <br /> coreboot now has initial support for the [http://www.coreboot.org/VIA_EPIA-CN_Build_Tutorial VIA EPIA-CN] board. The code was contributed by [mailto:aaron.lwe@gmail.com Aaron Lwe] of VIA, with various interim patches and testing also by [mailto:corey_osgood@verizon.net Corey Osgood], [mailto:urbez@linuxupc.upc.edu Urbez Santana Roma], [[User:Bari|Bari Ari]], and [mailto:remenic@gmail.com Richard Stellingwerff], thanks a lot! The code contribution also contained various VIA CN700 improvements which should make porting further VIA C7 + CN700 + VT8237R boards easier.<br /> <br /> == 2008/05/16 Thomson IP1000 now supported ==<br /> <br /> coreboot now has initial support for the [http://www.settoplinux.org/index.php Thomson IP1000] board. The code was contributed by [[User:Linux junkie|Joseph Smith]]. Linux has never been able to run on this board until now.<br /> <br /> == 2008/04/24 IEI PCISA-LX-800-R10 now supported ==<br /> <br /> Thanks to the contributions from [[User:Nikola|Nikolay Petukhov]] we now have support for the [[IEI LX 800 Build Tutorial|IEI PCISA-LX-800-R10]] half-size mainboard in our tree.<br /> <br /> == 2008/04/21 coreboot participating in Google Summer of Code 2008 ==<br /> <br /> The coreboot project (with [http://www.coresystems.de coresystems GmbH] as mentoring organization) is taking part in the [http://code.google.com/soc/ Google Summer of Code&amp;trade; 2008] (GSoC). This year, the project has been assigned two slots/students who will work on the following projects:<br /> <br /> * [http://code.google.com/soc/2008/coresystems/appinfo.html?csaid=ED0729A9DB64B39B All Virtual All The Time (AVATT)]<br /> : ''This project aims to integrate into the coreboot BIOS a payload consisting of a minimalist KVM-aware Linux kernel along with an initrd image that contains the tools needed for creating and starting guest virtual machines installed on top of it. The resulting system could host any x86(or x86-64) OS that can run over KVM (almost any major OS does), and there is a great challenge to make it as small as possible, so that it can fit in a 2MB flash image.''<br /> * [http://code.google.com/soc/2008/coresystems/appinfo.html?csaid=5B0D5443ED6193C7 SCSI booting in coreboot]<br /> : ''Currently coreboot can not boot from an arbitrary SCSI controller. There are two solutions for the problem: (1) Use Linux and Kexec. This requires to keep the SCSI driver in the flash chip. (2) Use x86emu/vm86/ADLO and the int13 method. This would allow to use the PCI option rom available on all modern SCSI controllers. So we obviously need a solution based on the latter. This could as well be implemented as a Linux program, as an intermediate payload, or as a shared library. At this point of time, I would like to implemente it as a daemon program. The program needs to catch the int13 interrupt vector that the SCSI option rom installs and make it available to arbitrary (firmware/payload) code trying to load something from disk.''<br /> <br /> == 2008/04/19 coreboot is a Hackontest candidate ==<br /> <br /> [[User:Hailfinger|Carl-Daniel Hailfinger]] has registered coreboot at [http://www.hackontest.org/ Hackontest].<br /> <br /> : ''Hackontest is a 24 hour programming competition between teams of three open source software projects.<br /> <br /> : The event takes place at OpenExpo on September 24/25, 2008 in Zurich, Switzerland.''<br /> <br /> [[Image:HackontestBanner_468x60-01.jpg]]<br /> <br /> [http://www.hackontest.org/index.php?action=Root-projectDetail(36) Click here to request features and vote for them.]<br /> <br /> == 2008/04/19 PC Engines ALIX.2C3 now supported ==<br /> <br /> Thanks to [[User:Ward|Ward Vandewege]] coreboot v3 now supports the PC Engines [http://pcengines.ch/alix2c3.htm ALIX.2C3] mainboard.<br /> <br /> == 2008/04/04 Silicon Mechanics to ship servers with coreboot preinstalled ==<br /> <br /> Chris Watson at [http://siliconmechanics.com Silicon Mechanics] says:<br /> <br /> :''We will commit to offering coreboot preinstallation on the [http://www.siliconmechanics.com/i7045/opteron-server.php Rackform nServ A236] with a specific set of hardware and software. In the future, we may expand the program to additional platforms based on customer interest. We will include a message about coreboot support on the platform page in the next few days with instructions to contact sales for additional information.''<br /> <br /> If you want to buy such a machine, please contact Art Mann ([mailto:artm@siliconmechanics.com artm@siliconmechanics.com]) at Silicon Mechanics.<br /> <br /> The A236 is a nice 1U server with 4 drive bays and a dual Opteron board (Supermicro H8DMR), which [http://www.coreboot.org/Supported_Motherboards is supported in coreboot v2].<br /> <br /> == 2008/04/03 coreboot Symposium in Denver ==<br /> <br /> There was a coreboot symposium in Denver, April 3 – 5, 2008 held during the High Performance Computer Science Week (HPCSW) [http://www.hpcsw.org LinuxBIOS Summit].<br /> <br /> More information is available on the [[Coreboot Symposium 2008]] page.<br /> <br /> == 2008/03/29 TeleVideo TC7020 now supported ==<br /> <br /> coreboot now has initial support for the [[TeleVideo TC7020 Build Tutorial|TeleVideo TC7020]] thin client. The code was contributed by [mailto:tokyo246@gmail.com Kenji Noguchi], thanks!<br /> <br /> == 2008/03/17 MSI MS-6119 now supported ==<br /> <br /> coreboot now has initial support for the [http://global.msi.com.tw/index.php?func=proddesc&amp;prod_no=332&amp;maincat_no=1 MSI MS-6119] board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks [mailto:mechno@gmail.com Maarten van Eeuwijk] for information and testing.<br /> <br /> == 2008/03/17 Intel 3100 chipset and Intel devkit (Mt. Arvon) board now supported ==<br /> <br /> coreboot now has initial support for the [http://www.intel.com/design/intarch/devkits/pm3100.htm Intel &quot;Mt. Arvon&quot;] development board, as well as the [http://www.intel.com/design/chipsets/embedded/3100.htm Intel 3100] chipset. The code was contributed by [[User:Eswierk|Ed Swierk]].<br /> <br /> == 2008/03/09 RCA RM4100 now supported ==<br /> <br /> coreboot now has initial support for the [http://www.settoplinux.org RCA RM4100] board. The code was contributed by [[User:Linux junkie|Joseph Smith]]. This also includes support for the Intel 830M (82830) northbridge.<br /> <br /> == 2008/03/07 ASUS A8V-E Deluxe now supported ==<br /> <br /> coreboot now has [[ASUS A8V-E Deluxe Build Tutorial|initial support]] for the [http://www.asus.com.tw/products.aspx?l1=3&amp;l2=15&amp;l3=143&amp;l4=0&amp;model=376&amp;modelmenu=1 ASUS A8V-E Deluxe] board. The testing so far was done by [[User:Uwe|Uwe Hermann]], re-using code written by [mailto:r.marek@assembler.cz Rudolf Marek] for the ASUS A8V-E SE (thanks!), which is very similar.<br /> <br /> == 2008/02/20 MSI MS-7135 (K8N Neo3) now supported ==<br /> <br /> coreboot now has initial support for the [http://global.msi.com.tw/index.php?func=proddesc&amp;prod_no=170&amp;maincat_no=1 MSI MS-7135 (K8N Neo3)] board. The code was contributed by [[User:Jakllsch|Jonathan A. Kollasch]].<br /> <br /> == 2008/01/27 Abit BE6-II V2.0 now supported ==<br /> <br /> coreboot now supports the [http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=BE6-II+V2.0&amp;fMTYPE=Slot+1 Abit BE6-II V2.0] board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks Sergei Antonov for information and testing.<br /> <br /> == 2008/01/12 LinuxBIOS is now called coreboot ==<br /> <br /> As Ron Minnich, the founder of the LinuxBIOS project [http://www.coreboot.org/pipermail/coreboot/2008-January/029133.html explains in his announcement] the LinuxBIOS project has now been renamed to '''coreboot'''. Read the [http://www.coreboot.org/pipermail/coreboot/2008-January/029133.html whole announcement] for more details and the reasons behind the renaming.<br /> <br /> = 2007 =<br /> <br /> == 2007/11/26 ASUS MEW-AM now supported ==<br /> <br /> LinuxBIOS now [[ASUS MEW-AM Build Tutorial|supports]] the [ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/ ASUS MEW-AM] board. The code was contributed by [[User:Uwe|Uwe Hermann]].<br /> <br /> == 2007/11/13 Advantech PCM-5820 now supported ==<br /> <br /> LinuxBIOS now [[Advantech PCM-5820 Build Tutorial|supports]] the [http://taiwan.advantech.com.tw/products/Model_Detail.asp?model_id=1-1TGZL8&amp;BU=ACG&amp;PD= Advantech PCM-5820] half-size board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks to [[User:Erwan|Erwan Velu]] for help and testing.<br /> <br /> == 2007/11/13 Lightning talk at FSCONS 2007 in Gothenburg on 2007/12/08 ==<br /> <br /> [mailto:peter@stuge.se Peter Stuge] is presenting [http://fscons.org/node/138 a LinuxBIOS lightning talk] at [http://fscons.org/ FSCONS 2007] on December 8.<br /> <br /> == 2007/11/03 ASUS A8V-E SE now supported ==<br /> <br /> Thanks to the great contribution from [mailto:r.marek@assembler.cz Rudolf Marek] we now have support for the [http://www.asus.com.tw/products.aspx?l1=3&amp;l2=15&amp;l3=143&amp;l4=0&amp;model=576&amp;modelmenu=1 ASUS A8V-E SE] mainboard.<br /> <br /> == 2007/10/31 Various Intel 440BX boards now supported ==<br /> <br /> We now have initial support for various Intel 440BX / 82371EB based mainboards of the Pentium II/III era, namely the ASUS P2B-F, ASUS P3B-F, A-Trend ATC-6220, AZZA PT-6IBD, Biostar M6TBA, Compaq Deskpro EN SFF P600, and GIGABYTE GA-6BXC. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks to todthgie, idwer_, and zxy_64-2 on [[IRC]] for helping with some of the boards.<br /> <br /> == 2007/10/30 SiS761GX/SiS966 chipset and GIGABYTE GA-2761GXDK board now supported ==<br /> <br /> Thanks to the great contributions from Morgan Tsai of SiS we now have support for both the SiS761GX/SiS966 chipset and the GIGABYTE [http://www.rssfeedbus.com/index.php?showtopic=1515 GA-2761GXDK] mainboard, which uses that chipset.<br /> <br /> == 2007/10/30 VIA K8T890 / VT8237R now supported ==<br /> <br /> Thanks to the great contribution from [mailto:r.marek@assembler.cz Rudolf Marek] we now have support for the VIA K8T890 / VT8237R chipset. A mainboard which uses this chipset will soon be added.<br /> <br /> == 2007/10/26 AXUS TC320 now supported ==<br /> <br /> LinuxBIOS now [[AXUS TC320 Build Tutorial|supports]] the '''AXUS TC320''' (Geode GX1 based) thin client. The code was contributed by [[User:Jbe|Jürgen Beisert]].<br /> <br /> == 2007/10/10 BCOM WinNET100 (IGEL-316) now supported ==<br /> <br /> LinuxBIOS now [[BCOM WINNET100 Build Tutorial|supports]] the '''BCOM WinNET100''' mainboard, as found in (e.g.) the '''IGEL-316''' (Geode GX1 based) thin client. The code was contributed by [[User:Jbe|Jürgen Beisert]].<br /> <br /> == 2007/09/22 MSI MS-7260 now supported ==<br /> <br /> LinuxBIOS now [[MSI MS-7260 Build Tutorial|supports]] the MSI [http://global.msi.com.tw/index.php?func=proddesc&amp;prod_no=255&amp;maincat_no=1&amp;cat2_no=171 MS-7260 (K9N Neo)] mainboard. The code was added by [[User:Uwe|Uwe Hermann]], but most of the hard work (K8 + MCP55 support) was done by others.<br /> <br /> == 2007/09/13 MSI MS-6178 now supported ==<br /> <br /> Thanks to [[User:Uwe|Uwe Hermann]] we now have preliminary support for the MSI [http://www.msi-technology.de/produkte/main_idx_view.php?Prod_id=27 MS-6178] mainboard.<br /> <br /> == 2007/09/08 PC Engines ALIX1.C now supported ==<br /> <br /> Thanks to [[User:Rminnich|Ron Minnich]] we now have preliminary support for the PC Engines [http://pcengines.ch/alix1c.htm ALIX1.C] mainboard.<br /> <br /> == 2007/06/14 Intel 810 chipset and ASUS MEW-VM now supported ==<br /> <br /> Thanks to the great contributions from [mailto:corey_osgood@verizon.net Corey Osgood] we now have preliminary support for both the Intel 810 chipset (82810 northbridge) and the ASUS MEW-VM mainboard, which uses that northbridge.<br /> <br /> == 2007/06/13 AMD DB800 (Salsa) now supported ==<br /> <br /> LinuxBIOS now supports the AMD [http://www.amd.com/us-en/ConnectivitySolutions/ProductInformation/0,,50_2330_9863_13022%5E13060,00.html DB800] (a.k.a Salsa) Geode LX reference/evaluation mainboard. The code was contributed by [mailto:marc.jones@amd.com Marc Jones] of AMD.<br /> <br /> == 2007/06/07 IEI JUKI-511P and ROCKY-512 now supported ==<br /> <br /> Thanks to the contributions from [mailto:nikolaypetukhov@gmail.com Nikolay Petukhov] we now have support for the IEI JUKI-511P and the IEI ROCKY-512 half-size mainboards in our tree!<br /> <br /> == 2007/05/24 ASUS A8N-E now supported ==<br /> <br /> Thanks to the nice work of [mailto:pdegler@rumms.uni-mannheim.de Philipp Degler] we now have support for the ASUS A8N-E mainboard in our tree!<br /> <br /> == 2007/05/23 LinuxBIOS booth at LinuxTag in Berlin, 29/5-2/6 ==<br /> <br /> In one corner of Messe Berlin hall 12 (booth 12-80) we will be showing a couple of different systems all using LinuxBIOS to boot. There is a boot time competition in the booth (nice T-shirts to win!) and on Saturday 2/6 the developers will be presenting a [[LinuxTag 2007 Workshop|workshop]] where visitors are walked through the steps required to make their own EPIA/-M/-MII board run LinuxBIOS!<br /> <br /> Video of an [http://video.google.com/videoplay?docid=3820348270731247338&amp;hl=en interview] at the LinuxBIOS booth.<br /> <br /> == 2007/05/05 DIGITAL-LOGIC MSM800SEV now supported ==<br /> <br /> The [http://www.digitallogic.ch/english/products/datasheets/ms_pc104_detail.asp?id=MSM800SEV DIGITAL-LOGIC MSM800SEV] mainboard is now supported by LinuxBIOS. The code was written by [[User:Rminnich|Ron Minnich]], based on the recent AMD Geode LX framework contributed by AMD.<br /> <br /> == 2007/05/04 AMD Norwich support and generally improved AMD Geode LX support ==<br /> <br /> LinuxBIOS now supports the AMD Norwich reference/evaluation mainboard. This is ''the'' AMD Geode LX reference platform, and it's now well-supported by LinuxBIOS. Additionally the AMD Geode LX code in general was heavily improved and should simplify further ports of Geode LX systems a lot. The code was written and contributed by several AMD engineers, foremost [mailto:jordan.crouse@amd.com Jordan Crouse] and [mailto:marc.jones@amd.com Marc Jones] of AMD.<br /> <br /> == 2007/03/14 LinuxBIOS participating in Google Summer of Code 2007 ==<br /> <br /> The LinuxBIOS project (with [http://www.coresystems.de coresystems GmbH] as mentoring organization) is taking part in the [http://code.google.com/soc/ Google Summer of Code&amp;trade; 2007] (GSoC). There is a [[GSoC|list of project ideas]] for students to work on (but feel free to suggest further ideas [[Mailinglist|on the LinuxBIOS mailing list]]).<br /> <br /> Students who are interested in working on a LinuxBIOS-related GSoC project must apply until &lt;strike&gt;'''March 24, 2007'''&lt;/strike&gt; [http://groups.google.com/group/google-summer-of-code-announce/browse_thread/thread/72f227109321bba5 Monday, March 27, 2007]!<br /> <br /> '''Update:''' LinuxBIOS ended up with [http://code.google.com/soc/coresystems/about.html seven student projects] for GSoC 2007!<br /> <br /> == 2007/02/24 LinuxBIOS talk at FOSDEM 2007 ==<br /> <br /> [[User:Rminnich|Ron Minnich]] gave [http://www.fosdem.org/2007/schedule/events/linuxbios a talk about LinuxBIOS] on February 24, 2007 at [http://www.fosdem.org/2007/ FOSDEM 2007].<br /> <br /> A [http://ftp.belnet.be/mirrors/FOSDEM/2007/FOSDEM2007-LinuxBios.ogg video recording of the talk] (Ogg, 234 MB) is available.<br /> <br /> == 2007/02/09 MSI K9ND Master Series (MS-9282) supported in LinuxBIOS ==<br /> <br /> LinuxBIOS now supports the MSI [http://cweb.msi.com.tw/program/products/server/svr/pro_svr_detail.php?UID=632 K9SD Master Series (MS-9282)] mainboards. The code was contributed by [mailto:bxshi@msik.com.cn bxshi] of MSI, based on code for the NVIDIA MCP55 by [mailto:yinghailu@gmail.com Yinghai Lu] of AMD.<br /> <br /> = 2006 =<br /> <br /> == 2006/11/02 MSI K9SD Master-S2R (MS-9185) supported in LinuxBIOS ==<br /> <br /> LinuxBIOS now supports the MSI [http://www.msiserver.de/de/Produkte/Server_Mainboards/K9SD_Master_S2R_MS_9185.aspx K9SD Master-S2R (MS-9185)] mainboard. The code was contributed by [mailto:bxshi@msik.com.cn bxshi] of MSI.<br /> <br /> == 2006/10/05 AMD Rev F supported in LinuxBIOS ==<br /> <br /> The AMD dual core support code is in public tree now. It includes<br /> * AMD Rev F AMD64 on Socket F/Socket AM2<br /> <br /> --yhlu<br /> <br /> == 2006/10/01 LinuxBIOS Symposium 2006 in Hamburg ==<br /> <br /> The LinuxBIOS Symposium 2006 took place in the old warehouse complex Speicherstadt in Hamburg, Germany.<br /> See the page [[LinuxBIOS Symposium 2006]] for more details, slides, photos, etc...<br /> <br /> --Stefan<br /> <br /> <br /> = 2005 =<br /> <br /> == 2005/06/02 AMD dual core supported in LinuxBIOS ==<br /> <br /> The AMD dual core support code is in public tree now. It includes<br /> * AMD D0/E0 Opteron new mem mapping support <br /> * AMD E Opteron dual core support <br /> * AMD E Opteron mem hole support <br /> * AMD K8 Four Ranks DIMM support --- Quad Ranks.<br /> <br /> --yhlu<br /> <br /> == 2005/05/11 Nvidia CK804 (NForce4) supported in LinuxBIOS ==<br /> <br /> The Nvidia CK804 support code is in public tree now. It includes<br /> * Nvidia CK804 support<br /> * smbus bus number support (to handle multi sumbus and mux)<br /> * superio smsc47 support <br /> * Tyan S2895/S2891/S2892 support <br /> * flash_rom Ck804 support<br /> <br /> --yhlu<br /> <br /> == 2005/04/22 How Many People Are Using LinuxBIOS? Would you believe 1,000,000? ==<br /> <br /> This question comes up to us all the time. Last week, I got an amazing answer. First, let<br /> me mention that I tell skeptical people at vendors all the time, when <br /> asked this question: &quot;A lot more than just the <br /> cluster community. The real use is in the embedded world&quot;. Well, again, last week, <br /> I found out just how real that use is. <br /> <br /> The system in question is the STPC Consumer. Evidently, this chipset is used in <br /> an internet terminal sold in India. It runs LinuxBIOS and Linux. <br /> <br /> There are at least one MILLION (1,000,000) of these things in use. I realize that is not much compared to the size of some markets, but had you told me six years ago that <br /> one million systems would be using LinuxBIOS in 2005, I don't think I would have believed you.<br /> <br /> --Ron<br /> <br /> == 2005/03/01 LinuxBIOS Wiki up and running ==<br /> <br /> After a week of testing and playing around, LinuxBIOS has a brand new Wiki now.<br /> <br /> --Stefan<br /> <br /> == 2005/02/28 LinuxBIOS slashdotted again ==<br /> <br /> After Richard Stallman's call for support of free BIOS LinuxBIOS was slashdotted this weekend.</div>

Juri http://www.coreboot.org/News 2010-03-11T00:30:42Z

<p>Juri: /* 2010/01/17 Roda RK886EX (Rocky III+) now supported */</p> <hr /> <div>= 2010 =<br /> <br /> == 2010/03/05 Asus P2B LS now supported ==<br /> <br /> coreboot now supports the Asus P2B-LS board. Board support and additional 440BX chipset support was written by Keith Hui, with Uwe Hermann doing review/testing. This proves that despite the great age of the board in question (it was released in 1998), an active Open Source community continues to provide support.<br /> <br /> == 2010/01/17 Roda RK886EX (Rocky III+) now supported ==<br /> <br /> coreboot now has support for the first laptop, the [http://www.roda-computer.com/en/products/notebooks/rocky-iii-rk886ex.html Roda RK886EX (Rocky III+)], based on the Intel i945 / ICH7 chipset. The code was contributed by [http://www.coresystems.de/en/ coresystems GmbH], thanks! Read the [http://www.coreboot.org/pipermail/coreboot-announce/2010-January/000006.html full announcement] for details.<br /> <br /> = 2009 =<br /> <br /> == 2009/10/21 HP e-Vectra P2706T now supported ==<br /> <br /> coreboot now has initial support for the [[HP e-Vectra P2706T]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]]. System information and testing by [mailto:stawel@gmail.com Pawe? Stawicki], thanks!<br /> <br /> == 2009/10/13 MSI MS-6156 now supported ==<br /> <br /> coreboot now has initial support for the [[MSI MS-6156]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]].<br /> <br /> == 2009/10/13 TechNexion TIM-5690 now supported ==<br /> <br /> coreboot now has support for the [http://www.technexion.com/index.php/tim-5690 TechNexion TIM-5690] mainboard (AMD RS690/SB600 chipset). The code was contributed by [mailto:libra.li@technexion.com Libra Li] of TechNexion, thanks!<br /> <br /> == 2009/10/13 Kontron KT690/mITX now supported ==<br /> <br /> coreboot now has support for the [http://us.kontron.com/products/boards+and+mezzanines/embedded+motherboards/miniitx+motherboards/kt690mitx.html Kontron KT690/mITX] mainboard (AMD RS690/SB600 chipset). The code was contributed by [http://www.coresystems.de/en/ coresystems GmbH], thanks!<br /> <br /> == 2009/09/25 coreboot on the cover of the Linux Journal ==<br /> <br /> The [http://www.linuxjournal.com/issue/186 October 2009 Linux Journal] features the coreboot logo on the cover and contains the article [http://www.linuxjournal.com/article/10447 &quot;Coreboot at Your Service!&quot;] by Anton Borisov - Use coreboot to take control of your hardware.<br /> <br /> == 2009/09/02 flashrom 0.9.1 has been released ==<br /> <br /> [[Flashrom|flashrom 0.9.1]] has been released. See the [[Flashrom/0.9.1|release notes]] for details.<br /> <br /> == 2009/07/15 VIA EPIA-M700 now supported ==<br /> <br /> The One Laptop per Child, Association, Inc. has contributed initial support for the [[VIA EPIA-M700]] board (based on the VIA VX800 code submitted earlier), thanks a lot! The code is still being worked on and improved by the community.<br /> <br /> == 2009/07/05 Mitac 6513WU now supported ==<br /> <br /> coreboot now has initial support for the [[Mitac 6513WU]] mainboard. The code was contributed by [mailto:mgold@ncf.ca Michael Gold], thanks!<br /> <br /> == 2009/07/01 Intel EagleHeights now supported ==<br /> <br /> coreboot now has initial support for the '''Intel EagleHeights''' mainboard. The code was contributed by [mailto:thomas.jourdan@gmail.com Thomas Jourdan], thanks!<br /> <br /> == 2009/07/01 VIA EPIA-N now supported ==<br /> <br /> coreboot now has initial support for the [http://www.idotpc.com/TheStore/pc/viewCategories.asp?idCategory=56 VIA EPIA-N] mainboard. The code was contributed by [mailto:bothlyn@blueyonder.co.uk Jon Harrison], thanks!<br /> <br /> == 2009/06/24 Soyo SY-6BA+ III now supported ==<br /> <br /> coreboot now has initial support for the [[Soyo SY-6BA Plus III|Soyo SY-6BA+ III]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks [mailto:ziltro@ziltro.com Andrew Morgan] for information and testing!<br /> <br /> == 2009/05/27 VIA VX800 now supported ==<br /> <br /> The One Laptop per Child, Association, Inc. has contributed support for the '''VIA VX800''' chipset family to the coreboot v2 tree.<br /> <br /> == 2009/05/04 flashrom 0.9.0 has been released ==<br /> <br /> After nine years of development and constant improvement, we have added support for every BIOS flash ROM technology present on x86 mainboards and every flash ROM chip we ever saw in the wild.<br /> <br /> Highlights of [[flashrom]] include:<br /> * Parallel, LPC, FWH and SPI flash interfaces.<br /> * 157 flash chip families and half a dozen variants of each family.<br /> * Flash chip package agnostic. DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, TSOP40 and more have all been verified to work.<br /> * 75 different chipsets, some with multiple flash controllers.<br /> * Special mainboard enabling code for dozens of nonstandard mainboards.<br /> * No physical access needed, root access is sufficient.<br /> * No bootable floppy disk, bootable CD-ROM or other media needed.<br /> * No keyboard or monitor needed. Simply reflash remotely via SSH.<br /> * No instant reboot needed. Reflash your ROM in a running system, verify it, be happy. The new firmware will be present next time you boot.<br /> * Crossflashing and hotflashing is possible as long as the flash chips are electrically and logically compatible (same protocol). Great for recovery.<br /> * Scriptability. Reflash a whole pool of identical machines at the same time from the command line. It is recommended to check flashrom output and error codes.<br /> * Speed. flashrom is much faster than vendor flash tools.<br /> * Supports Linux, FreeBSD, DragonFly BSD, Solaris, Mac OS X. Please refer to the README for build instructions.<br /> <br /> Thanks go to everyone who contributed to flashrom over the years and especially to Li-Ta Lo for starting this project.<br /> <br /> The release announcement can be found at http://www.coreboot.org/pipermail/coreboot/2009-May/047636.html.<br /> <br /> == 2009/04/22 HP ProLiant DL145 G3 now supported ==<br /> <br /> coreboot now has support for the [http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00816835&amp;lang=en&amp;cc=us&amp;taskId=101&amp;prodSeriesId=3219755&amp;prodTypeId=15351 HP ProLiant DL145 G3] mainboard. The code was contributed by [mailto:nuessle@uni-hd.de Mondrian Nuessle] (thanks!).<br /> <br /> == 2009/04/18 ASUS P2B-D now supported ==<br /> <br /> coreboot now has initial support for the [[ASUS P2B-D]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]].<br /> <br /> == 2009/04/18 VIA CX700, and VIA VT8454c mainboard now supported ==<br /> <br /> coreboot now has support for the '''VIA CX700''' chipset, and the '''VIA VT8454c''' mainboard. The code was developed by [http://www.coresystems.de/ coresystems GmbH].<br /> <br /> == 2009/04/06 TechNexion TIM-8690 now supported ==<br /> <br /> coreboot now has support for the [http://www.technexion.com/index.php/tim-8690 TIM-8690] mainboard (AMD RS690/SB600 chipset). The code was contributed by [mailto:daniel@dmhome.net Daniel Toussaint], thanks!<br /> <br /> == 2009/03/22 coreboot @ FSF LibrePlanet 2009 ==<br /> <br /> [[User:MJones|Marc Jones]] gave a coreboot [http://marcjonesconsulting.com/FSF%20talk.pdf presentation] at the [http://www.fsf.org/ Free Software Foundation] annual meeting, [http://www.fsf.org/associate/meetings/2009 Libre Planet 2009]. <br /> <br /> == 2009/01/10 coreboot and SeaBIOS starts Windows 7 ==<br /> <br /> [[User:Ruik|Rudolf Marek]] recorded [[Screenshots#coreboot_and_SeaBIOS_starting_Windows_7|a video of his ASUS M2V-MX SE with coreboot and SeaBIOS starting Windows 7]] on a 2GHz AMD Sempron CPU.<br /> <br /> == 2009/01/06 Ten years of coreboot ==<br /> <br /> Anton Borisov [http://www.h-online.com/open/The-Open-Source-BIOS-is-Ten-An-interview-with-the-coreboot-developers--/features/112353 interviewed the original developers] ([http://www.heise.de/open/Zehn-Jahre-LinuxBIOS-Coreboot--/artikel/121679 german version]) as the Open Source PC firmware celebrates '''ten years of activity'''!<br /> <br /> = 2008 =<br /> <br /> == 2008/12/27 coreboot at 25C3 in Berlin, Germany ==<br /> <br /> [[User:Stuge|Peter Stuge]] presented [http://events.ccc.de/congress/2008/Fahrplan/events/2970.en.html coreboot: Beyond The Final Frontier] at [http://events.ccc.de/congress/2008/ the 25th Chaos Communication Congress (25C3)].<br /> [[Screenshots#Chaos_Communication_Congress_2008_.2825C3.29:_coreboot:_Beyond_The_Final_Frontier|The video presentation is available]] and also [http://www.linux-magazin.de/news/25c3_coreboot_version_3_gibt_sich_die_ehre an article in German] about the talk.<br /> <br /> == 2008/12/15 ASUS P2B-DS now supported ==<br /> <br /> coreboot now has initial support for the [[ASUS P2B-DS]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]].<br /> <br /> == 2008/12/09 AMD Pistachio now supported ==<br /> <br /> coreboot now has support for the '''AMD Pistachio''' evaluation board. The code was contributed by AMD, thanks!<br /> <br /> == 2008/12/10 coreboot confirmed for SCALE 7x ==<br /> <br /> There will be a [http://scale7x.socallinuxexpo.org/dotorg/coreboot coreboot booth] at the [http://scale7x.socallinuxexpo.org/ Southern California Linux Expo] (SCALE 7x) on '''February 20-22, 2009'''.<br /> <br /> == 2008/12/05 NEC PowerMate 2000 now supported ==<br /> <br /> coreboot now has initial support for the [http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/ NEC PowerMate 2000] board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks [mailto:quentin.rameau@gmail.com Quentin RAMEAU] for providing the required information and for testing.<br /> <br /> == 2008/11/19 LiPPERT Cool RoadRunner-LX now supported ==<br /> <br /> coreboot now has support for the [http://www.lippert-at.com/index.php?id=408 LiPPERT Cool RoadRunner-LX] mainboard. The code was contributed by [mailto:support@LiPPERTEmbedded.de Jens Rottmann] from LiPPERT Embedded Computers GmbH, thanks!<br /> <br /> == 2008/10/30 LiPPERT Cool SpaceRunner-LX now supported ==<br /> <br /> coreboot now has support for the [http://www.lippert-at.com/index.php?id=478 LiPPERT Cool SpaceRunner-LX] mainboard. The code was contributed by [mailto:support@LiPPERTEmbedded.de Jens Rottmann] from LiPPERT Embedded Computers GmbH, thanks!<br /> <br /> == 2008/10/28 Intel 945, ICH7, Core Duo/Core 2 Duo, and Kontron 986LCD-M/mITX now supported ==<br /> <br /> coreboot now has support for the '''Intel i945/ICH7 Desktop/Mobile''' chipset, the '''Core Duo/Core 2 Duo''' processor, and the [http://de.kontron.com/products/boards+and+mezzanines/embedded+motherboards/miniitx+motherboards/986lcdmmitx.html Kontron 986LCD-M/mITX] mainboard. The code was developed by [http://www.coresystems.de/ coresystems GmbH].<br /> <br /> == 2008/10/27 MSI MS-6147 now supported ==<br /> <br /> coreboot now has initial support for the '''MSI MS-6147''' mainboard. The code was contributed by [mailto:mats.andersson@gisladisker.org Mats Erik Andersson], thanks!<br /> <br /> == 2008/10/19 coreboot confirmed for 25C3 in Berlin, Germany ==<br /> <br /> [[User:Stuge|Peter Stuge]] will present coreboot at [http://events.ccc.de/congress/2008/ the 25th Chaos Communication Congress (25C3)].<br /> <br /> [[Screenshots#Chaos_Communication_Congress_2008_.2825C3.29:_coreboot:_Beyond_The_Final_Frontier|The video presentation is available]] and also [http://www.linux-magazin.de/news/25c3_coreboot_version_3_gibt_sich_die_ehre an article in German] about the talk.<br /> <br /> == 2008/10/12 VIA pc2500e now supported ==<br /> <br /> coreboot now has initial support for the [[VIA pc2500e Build Tutorial|VIA pc2500e]] mainboard. The code was contributed by [[User:Uwe|Uwe Hermann]].<br /> <br /> == 2008/11/06 coreboot at ELC Europe 2008 in Ede, The Netherlands ==<br /> <br /> [[User:Stuge|Peter Stuge]] is presenting coreboot at the [http://www.nluug.nl/events/nj08/ NLUUG Autumn Conference on Mobile Computing] and [http://www.embeddedlinuxconference.com/elc_europe08/ CE Linux Forum - Embedded Linux conference Europe 2008].<br /> <br /> == 2008/10/26 coreboot at FSCONS 2008 in Gothenburg, Sweden ==<br /> <br /> [[User:Stuge|Peter Stuge]] is presenting coreboot at the [http://fscons.org/ Free Society Conference and Nordic Summit 2008].<br /> <br /> == 2008/09/24 AMD RS690 / SB600 chipset and AMD dbm690t board now supported ==<br /> <br /> coreboot now has initial support for the '''AMD RS690 / SB600''' chipset, as well as the [http://www.amd.com/us-en/assets/content_type/DownloadableAssets/42655A_S1DBM680T_PB.pdf AMD dbm690t] (Herring) board using that chipset. The code was contributed by AMD, thanks!<br /> <br /> == 2008/09/24 Intel EP80579 (Tolapai) now supported ==<br /> <br /> coreboot now has initial support for the '''Intel EP80579 (Tolapai)''' chipset. The code was contributed by [[User:Eswierk|Ed Swierk]], thanks!<br /> <br /> == 2008/09/24 coreboot interview at LinuxTag 2008 is now available as podcast ==<br /> <br /> [[User:Hailfinger|Carl-Daniel Hailfinger]] gave an [http://www.linuxpodcast.de/?id=240 interview about coreboot and flashrom] at LinuxTag 2008 in Berlin. It was broadcast live on [http://www.radiotux.de/ RadioTux] and is now available as [http://www.linuxpodcast.de/?id=240 podcast]. The interview is in German. Thanks to Sirko Kemter for organizing the interview, Thomas Steinbrecher for interviewing and Ingo Ebel for cutting it and putting it online.<br /> <br /> == 2008/09/23 ASUS M2V-MX SE now supported ==<br /> <br /> coreboot now has initial support for the [[ASUS M2V-MX SE Build Tutorial|ASUS M2V-MX SE]] mainboard. The code was contributed by [[User:Ruik|Rudolf Marek]], thanks!<br /> <br /> == 2008/09/13 coreboot talk at OpenBSD Slackathon in Stockholm ==<br /> <br /> [[User:Stuge|Peter Stuge]] presented coreboot at the [http://slackathon.se/2008/ Slackathon 2008] OpenBSD meeting.<br /> <br /> == 2008/09/10 Jetway J7F2/J7F4 now supported ==<br /> <br /> coreboot now has initial support for the [[Jetway J7F2 Build Tutorial|Jetway J7F2/J7F4]] mainboards. The code was contributed by [[User:Hawke|Alex Mauer]], thanks!<br /> <br /> == 2008/09/05 VIA VT8237S now supported ==<br /> <br /> coreboot now has initial support for the '''VIA VT8237S''' southbridge. The code was contributed by [[User:Ruik|Rudolf Marek]], thanks!<br /> <br /> == 2008/08/04 ASI MB-5BLGP / Neoware Eon 4000s now supported ==<br /> <br /> coreboot now has initial support for the '''ASI MB-5BLGP (Neoware Eon 4000s)''' board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks [mailto:hanneshe@arcor.de Hannes Hegewald] for providing the required information and for testing.<br /> <br /> == 2008/07/01 New logo announced ==<br /> <br /> The coreboot hare is the new project logo. Check it out over on the [[Logo]] page.<br /> <br /> == 2008/07/01 coreboot booth at OpenExpo in Zürich ==<br /> <br /> coreboot will be exhibiting at [http://www.openexpo.ch/ OpenExpo 2008] on '''September 24-25 2008''' in '''Zürich/Winterthur'''.<br /> <br /> We are also [[News#2008.2F04.2F19_coreboot_is_a_Hackontest_candidate|a Hackontest candidate]], the Hackontest is organized in connection with the Expo.<br /> <br /> == 2008/06/27 A-Trend ATC-6240 now supported ==<br /> <br /> coreboot now has initial support for the [http://active-hardware.com/english/reviews/mainboard/atc6240.htm A-Trend ATC-6240] board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks [mailto:eagle__eye@maktoob.com shadow] for providing the required information.<br /> <br /> == 2008/05/28 coreboot booth at LinuxTag in Berlin ==<br /> <br /> There will be a [[LinuxTag 2008|coreboot booth at LinuxTag 2008]] on '''May 28-31 2008''' in '''Berlin'''.<br /> <br /> == 2008/05/19 VIA EPIA-CN now supported ==<br /> <br /> coreboot now has initial support for the [http://www.coreboot.org/VIA_EPIA-CN_Build_Tutorial VIA EPIA-CN] board. The code was contributed by [mailto:aaron.lwe@gmail.com Aaron Lwe] of VIA, with various interim patches and testing also by [mailto:corey_osgood@verizon.net Corey Osgood], [mailto:urbez@linuxupc.upc.edu Urbez Santana Roma], [[User:Bari|Bari Ari]], and [mailto:remenic@gmail.com Richard Stellingwerff], thanks a lot! The code contribution also contained various VIA CN700 improvements which should make porting further VIA C7 + CN700 + VT8237R boards easier.<br /> <br /> == 2008/05/16 Thomson IP1000 now supported ==<br /> <br /> coreboot now has initial support for the [http://www.settoplinux.org/index.php Thomson IP1000] board. The code was contributed by [[User:Linux junkie|Joseph Smith]]. Linux has never been able to run on this board until now.<br /> <br /> == 2008/04/24 IEI PCISA-LX-800-R10 now supported ==<br /> <br /> Thanks to the contributions from [[User:Nikola|Nikolay Petukhov]] we now have support for the [[IEI LX 800 Build Tutorial|IEI PCISA-LX-800-R10]] half-size mainboard in our tree.<br /> <br /> == 2008/04/21 coreboot participating in Google Summer of Code 2008 ==<br /> <br /> The coreboot project (with [http://www.coresystems.de coresystems GmbH] as mentoring organization) is taking part in the [http://code.google.com/soc/ Google Summer of Code&amp;trade; 2008] (GSoC). This year, the project has been assigned two slots/students who will work on the following projects:<br /> <br /> * [http://code.google.com/soc/2008/coresystems/appinfo.html?csaid=ED0729A9DB64B39B All Virtual All The Time (AVATT)]<br /> : ''This project aims to integrate into the coreboot BIOS a payload consisting of a minimalist KVM-aware Linux kernel along with an initrd image that contains the tools needed for creating and starting guest virtual machines installed on top of it. The resulting system could host any x86(or x86-64) OS that can run over KVM (almost any major OS does), and there is a great challenge to make it as small as possible, so that it can fit in a 2MB flash image.''<br /> * [http://code.google.com/soc/2008/coresystems/appinfo.html?csaid=5B0D5443ED6193C7 SCSI booting in coreboot]<br /> : ''Currently coreboot can not boot from an arbitrary SCSI controller. There are two solutions for the problem: (1) Use Linux and Kexec. This requires to keep the SCSI driver in the flash chip. (2) Use x86emu/vm86/ADLO and the int13 method. This would allow to use the PCI option rom available on all modern SCSI controllers. So we obviously need a solution based on the latter. This could as well be implemented as a Linux program, as an intermediate payload, or as a shared library. At this point of time, I would like to implemente it as a daemon program. The program needs to catch the int13 interrupt vector that the SCSI option rom installs and make it available to arbitrary (firmware/payload) code trying to load something from disk.''<br /> <br /> == 2008/04/19 coreboot is a Hackontest candidate ==<br /> <br /> [[User:Hailfinger|Carl-Daniel Hailfinger]] has registered coreboot at [http://www.hackontest.org/ Hackontest].<br /> <br /> : ''Hackontest is a 24 hour programming competition between teams of three open source software projects.<br /> <br /> : The event takes place at OpenExpo on September 24/25, 2008 in Zurich, Switzerland.''<br /> <br /> [[Image:HackontestBanner_468x60-01.jpg]]<br /> <br /> [http://www.hackontest.org/index.php?action=Root-projectDetail(36) Click here to request features and vote for them.]<br /> <br /> == 2008/04/19 PC Engines ALIX.2C3 now supported ==<br /> <br /> Thanks to [[User:Ward|Ward Vandewege]] coreboot v3 now supports the PC Engines [http://pcengines.ch/alix2c3.htm ALIX.2C3] mainboard.<br /> <br /> == 2008/04/04 Silicon Mechanics to ship servers with coreboot preinstalled ==<br /> <br /> Chris Watson at [http://siliconmechanics.com Silicon Mechanics] says:<br /> <br /> :''We will commit to offering coreboot preinstallation on the [http://www.siliconmechanics.com/i7045/opteron-server.php Rackform nServ A236] with a specific set of hardware and software. In the future, we may expand the program to additional platforms based on customer interest. We will include a message about coreboot support on the platform page in the next few days with instructions to contact sales for additional information.''<br /> <br /> If you want to buy such a machine, please contact Art Mann ([mailto:artm@siliconmechanics.com artm@siliconmechanics.com]) at Silicon Mechanics.<br /> <br /> The A236 is a nice 1U server with 4 drive bays and a dual Opteron board (Supermicro H8DMR), which [http://www.coreboot.org/Supported_Motherboards is supported in coreboot v2].<br /> <br /> == 2008/04/03 coreboot Symposium in Denver ==<br /> <br /> There was a coreboot symposium in Denver, April 3 – 5, 2008 held during the High Performance Computer Science Week (HPCSW) [http://www.hpcsw.org LinuxBIOS Summit].<br /> <br /> More information is available on the [[Coreboot Symposium 2008]] page.<br /> <br /> == 2008/03/29 TeleVideo TC7020 now supported ==<br /> <br /> coreboot now has initial support for the [[TeleVideo TC7020 Build Tutorial|TeleVideo TC7020]] thin client. The code was contributed by [mailto:tokyo246@gmail.com Kenji Noguchi], thanks!<br /> <br /> == 2008/03/17 MSI MS-6119 now supported ==<br /> <br /> coreboot now has initial support for the [http://global.msi.com.tw/index.php?func=proddesc&amp;prod_no=332&amp;maincat_no=1 MSI MS-6119] board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks [mailto:mechno@gmail.com Maarten van Eeuwijk] for information and testing.<br /> <br /> == 2008/03/17 Intel 3100 chipset and Intel devkit (Mt. Arvon) board now supported ==<br /> <br /> coreboot now has initial support for the [http://www.intel.com/design/intarch/devkits/pm3100.htm Intel &quot;Mt. Arvon&quot;] development board, as well as the [http://www.intel.com/design/chipsets/embedded/3100.htm Intel 3100] chipset. The code was contributed by [[User:Eswierk|Ed Swierk]].<br /> <br /> == 2008/03/09 RCA RM4100 now supported ==<br /> <br /> coreboot now has initial support for the [http://www.settoplinux.org RCA RM4100] board. The code was contributed by [[User:Linux junkie|Joseph Smith]]. This also includes support for the Intel 830M (82830) northbridge.<br /> <br /> == 2008/03/07 ASUS A8V-E Deluxe now supported ==<br /> <br /> coreboot now has [[ASUS A8V-E Deluxe Build Tutorial|initial support]] for the [http://www.asus.com.tw/products.aspx?l1=3&amp;l2=15&amp;l3=143&amp;l4=0&amp;model=376&amp;modelmenu=1 ASUS A8V-E Deluxe] board. The testing so far was done by [[User:Uwe|Uwe Hermann]], re-using code written by [mailto:r.marek@assembler.cz Rudolf Marek] for the ASUS A8V-E SE (thanks!), which is very similar.<br /> <br /> == 2008/02/20 MSI MS-7135 (K8N Neo3) now supported ==<br /> <br /> coreboot now has initial support for the [http://global.msi.com.tw/index.php?func=proddesc&amp;prod_no=170&amp;maincat_no=1 MSI MS-7135 (K8N Neo3)] board. The code was contributed by [[User:Jakllsch|Jonathan A. Kollasch]].<br /> <br /> == 2008/01/27 Abit BE6-II V2.0 now supported ==<br /> <br /> coreboot now supports the [http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=BE6-II+V2.0&amp;fMTYPE=Slot+1 Abit BE6-II V2.0] board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks Sergei Antonov for information and testing.<br /> <br /> == 2008/01/12 LinuxBIOS is now called coreboot ==<br /> <br /> As Ron Minnich, the founder of the LinuxBIOS project [http://www.coreboot.org/pipermail/coreboot/2008-January/029133.html explains in his announcement] the LinuxBIOS project has now been renamed to '''coreboot'''. Read the [http://www.coreboot.org/pipermail/coreboot/2008-January/029133.html whole announcement] for more details and the reasons behind the renaming.<br /> <br /> = 2007 =<br /> <br /> == 2007/11/26 ASUS MEW-AM now supported ==<br /> <br /> LinuxBIOS now [[ASUS MEW-AM Build Tutorial|supports]] the [ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/ ASUS MEW-AM] board. The code was contributed by [[User:Uwe|Uwe Hermann]].<br /> <br /> == 2007/11/13 Advantech PCM-5820 now supported ==<br /> <br /> LinuxBIOS now [[Advantech PCM-5820 Build Tutorial|supports]] the [http://taiwan.advantech.com.tw/products/Model_Detail.asp?model_id=1-1TGZL8&amp;BU=ACG&amp;PD= Advantech PCM-5820] half-size board. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks to [[User:Erwan|Erwan Velu]] for help and testing.<br /> <br /> == 2007/11/13 Lightning talk at FSCONS 2007 in Gothenburg on 2007/12/08 ==<br /> <br /> [mailto:peter@stuge.se Peter Stuge] is presenting [http://fscons.org/node/138 a LinuxBIOS lightning talk] at [http://fscons.org/ FSCONS 2007] on December 8.<br /> <br /> == 2007/11/03 ASUS A8V-E SE now supported ==<br /> <br /> Thanks to the great contribution from [mailto:r.marek@assembler.cz Rudolf Marek] we now have support for the [http://www.asus.com.tw/products.aspx?l1=3&amp;l2=15&amp;l3=143&amp;l4=0&amp;model=576&amp;modelmenu=1 ASUS A8V-E SE] mainboard.<br /> <br /> == 2007/10/31 Various Intel 440BX boards now supported ==<br /> <br /> We now have initial support for various Intel 440BX / 82371EB based mainboards of the Pentium II/III era, namely the ASUS P2B-F, ASUS P3B-F, A-Trend ATC-6220, AZZA PT-6IBD, Biostar M6TBA, Compaq Deskpro EN SFF P600, and GIGABYTE GA-6BXC. The code was contributed by [[User:Uwe|Uwe Hermann]]. Thanks to todthgie, idwer_, and zxy_64-2 on [[IRC]] for helping with some of the boards.<br /> <br /> == 2007/10/30 SiS761GX/SiS966 chipset and GIGABYTE GA-2761GXDK board now supported ==<br /> <br /> Thanks to the great contributions from Morgan Tsai of SiS we now have support for both the SiS761GX/SiS966 chipset and the GIGABYTE [http://www.rssfeedbus.com/index.php?showtopic=1515 GA-2761GXDK] mainboard, which uses that chipset.<br /> <br /> == 2007/10/30 VIA K8T890 / VT8237R now supported ==<br /> <br /> Thanks to the great contribution from [mailto:r.marek@assembler.cz Rudolf Marek] we now have support for the VIA K8T890 / VT8237R chipset. A mainboard which uses this chipset will soon be added.<br /> <br /> == 2007/10/26 AXUS TC320 now supported ==<br /> <br /> LinuxBIOS now [[AXUS TC320 Build Tutorial|supports]] the '''AXUS TC320''' (Geode GX1 based) thin client. The code was contributed by [[User:Jbe|Jürgen Beisert]].<br /> <br /> == 2007/10/10 BCOM WinNET100 (IGEL-316) now supported ==<br /> <br /> LinuxBIOS now [[BCOM WINNET100 Build Tutorial|supports]] the '''BCOM WinNET100''' mainboard, as found in (e.g.) the '''IGEL-316''' (Geode GX1 based) thin client. The code was contributed by [[User:Jbe|Jürgen Beisert]].<br /> <br /> == 2007/09/22 MSI MS-7260 now supported ==<br /> <br /> LinuxBIOS now [[MSI MS-7260 Build Tutorial|supports]] the MSI [http://global.msi.com.tw/index.php?func=proddesc&amp;prod_no=255&amp;maincat_no=1&amp;cat2_no=171 MS-7260 (K9N Neo)] mainboard. The code was added by [[User:Uwe|Uwe Hermann]], but most of the hard work (K8 + MCP55 support) was done by others.<br /> <br /> == 2007/09/13 MSI MS-6178 now supported ==<br /> <br /> Thanks to [[User:Uwe|Uwe Hermann]] we now have preliminary support for the MSI [http://www.msi-technology.de/produkte/main_idx_view.php?Prod_id=27 MS-6178] mainboard.<br /> <br /> == 2007/09/08 PC Engines ALIX1.C now supported ==<br /> <br /> Thanks to [[User:Rminnich|Ron Minnich]] we now have preliminary support for the PC Engines [http://pcengines.ch/alix1c.htm ALIX1.C] mainboard.<br /> <br /> == 2007/06/14 Intel 810 chipset and ASUS MEW-VM now supported ==<br /> <br /> Thanks to the great contributions from [mailto:corey_osgood@verizon.net Corey Osgood] we now have preliminary support for both the Intel 810 chipset (82810 northbridge) and the ASUS MEW-VM mainboard, which uses that northbridge.<br /> <br /> == 2007/06/13 AMD DB800 (Salsa) now supported ==<br /> <br /> LinuxBIOS now supports the AMD [http://www.amd.com/us-en/ConnectivitySolutions/ProductInformation/0,,50_2330_9863_13022%5E13060,00.html DB800] (a.k.a Salsa) Geode LX reference/evaluation mainboard. The code was contributed by [mailto:marc.jones@amd.com Marc Jones] of AMD.<br /> <br /> == 2007/06/07 IEI JUKI-511P and ROCKY-512 now supported ==<br /> <br /> Thanks to the contributions from [mailto:nikolaypetukhov@gmail.com Nikolay Petukhov] we now have support for the IEI JUKI-511P and the IEI ROCKY-512 half-size mainboards in our tree!<br /> <br /> == 2007/05/24 ASUS A8N-E now supported ==<br /> <br /> Thanks to the nice work of [mailto:pdegler@rumms.uni-mannheim.de Philipp Degler] we now have support for the ASUS A8N-E mainboard in our tree!<br /> <br /> == 2007/05/23 LinuxBIOS booth at LinuxTag in Berlin, 29/5-2/6 ==<br /> <br /> In one corner of Messe Berlin hall 12 (booth 12-80) we will be showing a couple of different systems all using LinuxBIOS to boot. There is a boot time competition in the booth (nice T-shirts to win!) and on Saturday 2/6 the developers will be presenting a [[LinuxTag 2007 Workshop|workshop]] where visitors are walked through the steps required to make their own EPIA/-M/-MII board run LinuxBIOS!<br /> <br /> Video of an [http://video.google.com/videoplay?docid=3820348270731247338&amp;hl=en interview] at the LinuxBIOS booth.<br /> <br /> == 2007/05/05 DIGITAL-LOGIC MSM800SEV now supported ==<br /> <br /> The [http://www.digitallogic.ch/english/products/datasheets/ms_pc104_detail.asp?id=MSM800SEV DIGITAL-LOGIC MSM800SEV] mainboard is now supported by LinuxBIOS. The code was written by [[User:Rminnich|Ron Minnich]], based on the recent AMD Geode LX framework contributed by AMD.<br /> <br /> == 2007/05/04 AMD Norwich support and generally improved AMD Geode LX support ==<br /> <br /> LinuxBIOS now supports the AMD Norwich reference/evaluation mainboard. This is ''the'' AMD Geode LX reference platform, and it's now well-supported by LinuxBIOS. Additionally the AMD Geode LX code in general was heavily improved and should simplify further ports of Geode LX systems a lot. The code was written and contributed by several AMD engineers, foremost [mailto:jordan.crouse@amd.com Jordan Crouse] and [mailto:marc.jones@amd.com Marc Jones] of AMD.<br /> <br /> == 2007/03/14 LinuxBIOS participating in Google Summer of Code 2007 ==<br /> <br /> The LinuxBIOS project (with [http://www.coresystems.de coresystems GmbH] as mentoring organization) is taking part in the [http://code.google.com/soc/ Google Summer of Code&amp;trade; 2007] (GSoC). There is a [[GSoC|list of project ideas]] for students to work on (but feel free to suggest further ideas [[Mailinglist|on the LinuxBIOS mailing list]]).<br /> <br /> Students who are interested in working on a LinuxBIOS-related GSoC project must apply until &lt;strike&gt;'''March 24, 2007'''&lt;/strike&gt; [http://groups.google.com/group/google-summer-of-code-announce/browse_thread/thread/72f227109321bba5 Monday, March 27, 2007]!<br /> <br /> '''Update:''' LinuxBIOS ended up with [http://code.google.com/soc/coresystems/about.html seven student projects] for GSoC 2007!<br /> <br /> == 2007/02/24 LinuxBIOS talk at FOSDEM 2007 ==<br /> <br /> [[User:Rminnich|Ron Minnich]] gave [http://www.fosdem.org/2007/schedule/events/linuxbios a talk about LinuxBIOS] on February 24, 2007 at [http://www.fosdem.org/2007/ FOSDEM 2007].<br /> <br /> A [http://ftp.belnet.be/mirrors/FOSDEM/2007/FOSDEM2007-LinuxBios.ogg video recording of the talk] (Ogg, 234 MB) is available.<br /> <br /> == 2007/02/09 MSI K9ND Master Series (MS-9282) supported in LinuxBIOS ==<br /> <br /> LinuxBIOS now supports the MSI [http://cweb.msi.com.tw/program/products/server/svr/pro_svr_detail.php?UID=632 K9SD Master Series (MS-9282)] mainboards. The code was contributed by [mailto:bxshi@msik.com.cn bxshi] of MSI, based on code for the NVIDIA MCP55 by [mailto:yinghailu@gmail.com Yinghai Lu] of AMD.<br /> <br /> = 2006 =<br /> <br /> == 2006/11/02 MSI K9SD Master-S2R (MS-9185) supported in LinuxBIOS ==<br /> <br /> LinuxBIOS now supports the MSI [http://www.msiserver.de/de/Produkte/Server_Mainboards/K9SD_Master_S2R_MS_9185.aspx K9SD Master-S2R (MS-9185)] mainboard. The code was contributed by [mailto:bxshi@msik.com.cn bxshi] of MSI.<br /> <br /> == 2006/10/05 AMD Rev F supported in LinuxBIOS ==<br /> <br /> The AMD dual core support code is in public tree now. It includes<br /> * AMD Rev F AMD64 on Socket F/Socket AM2<br /> <br /> --yhlu<br /> <br /> == 2006/10/01 LinuxBIOS Symposium 2006 in Hamburg ==<br /> <br /> The LinuxBIOS Symposium 2006 took place in the old warehouse complex Speicherstadt in Hamburg, Germany.<br /> See the page [[LinuxBIOS Symposium 2006]] for more details, slides, photos, etc...<br /> <br /> --Stefan<br /> <br /> <br /> = 2005 =<br /> <br /> == 2005/06/02 AMD dual core supported in LinuxBIOS ==<br /> <br /> The AMD dual core support code is in public tree now. It includes<br /> * AMD D0/E0 Opteron new mem mapping support <br /> * AMD E Opteron dual core support <br /> * AMD E Opteron mem hole support <br /> * AMD K8 Four Ranks DIMM support --- Quad Ranks.<br /> <br /> --yhlu<br /> <br /> == 2005/05/11 Nvidia CK804 (NForce4) supported in LinuxBIOS ==<br /> <br /> The Nvidia CK804 support code is in public tree now. It includes<br /> * Nvidia CK804 support<br /> * smbus bus number support (to handle multi sumbus and mux)<br /> * superio smsc47 support <br /> * Tyan S2895/S2891/S2892 support <br /> * flash_rom Ck804 support<br /> <br /> --yhlu<br /> <br /> == 2005/04/22 How Many People Are Using LinuxBIOS? Would you believe 1,000,000? ==<br /> <br /> This question comes up to us all the time. Last week, I got an amazing answer. First, let<br /> me mention that I tell skeptical people at vendors all the time, when <br /> asked this question: &quot;A lot more than just the <br /> cluster community. The real use is in the embedded world&quot;. Well, again, last week, <br /> I found out just how real that use is. <br /> <br /> The system in question is the STPC Consumer. Evidently, this chipset is used in <br /> an internet terminal sold in India. It runs LinuxBIOS and Linux. <br /> <br /> There are at least one MILLION (1,000,000) of these things in use. I realize that is not much compared to the size of some markets, but had you told me six years ago that <br /> one million systems would be using LinuxBIOS in 2005, I don't think I would have believed you.<br /> <br /> --Ron<br /> <br /> == 2005/03/01 LinuxBIOS Wiki up and running ==<br /> <br /> After a week of testing and playing around, LinuxBIOS has a brand new Wiki now.<br /> <br /> --Stefan<br /> <br /> == 2005/02/28 LinuxBIOS slashdotted again ==<br /> <br /> After Richard Stallman's call for support of free BIOS LinuxBIOS was slashdotted this weekend.</div>

Juri http://www.coreboot.org/Laptop 2010-02-07T06:37:28Z

<p>Juri: /* Laptop Survey */</p> <hr /> <div>== Recent Progress of coreboot on Laptops ==<br /> <br /> * coreboot now supports the Roda RK886EX (Rocky III+) Laptop, based on Intel 82945GM/ICH7.<br /> * VIA has recently released open documentation for the VX700 and VX800 chipsets at the [http://linux.via.com.tw/support/downloadFiles.action VIA Download Portal]. <br /> <br /> <br /> == Embedded Controllers ==<br /> <br /> The remaining issue with supporting netbooks may be open firmware support for the Embedded Controller (EC).<br /> These ECs used to support keyboard scan, lid open/closed, battery charging, power management, etc.<br /> <br /> coreboot should work with the &quot;stock&quot; EC firmware. This may still be a challenge because &quot;we don't know what we don't know&quot;. Behavior at runtime is fairly standardized, but we don't know what we need to do for initialization - do we need to set up registers, put in tables, kick things, or will it all Just Work (TM)?<br /> <br /> === Renesas M3885/M3886 ===<br /> <br /> These ECs are supported by coreboot. There are several versions, with flash and with mask roms. Only the flash versions are update-able. These ECs are Family 740 based. A development environment including compiler and simulator is available from Renesas.<br /> <br /> === ENE KB3310/KB3910/KB3920 ===<br /> <br /> Very common ECs in netbooks are the KB3310, KB3910 and KB3920 from [http://www.ene.com.tw/en/index.asp ENE Technology]. The ENE ECs are 8051 based.<br /> <br /> The Quanta IL1 reference design seems to use ENE3310 controller. The q1d25i.rom was examined. The EC code is on 0xFFF00000 on One Mini A110. Its 64KB big HOLE0.ROM. <br /> <br /> More discussion and info on the ENE EC's: <br /> <br /> * ENE [http://wiki.laptop.org/images/a/ab/KB3700-ds-01.pdf KB3700 datasheet].<br /> * [http://forum.eeeuser.com/viewtopic.php?pid=99076 eeeUser Discussion] <br /> * [http://code.google.com/p/eeetune/wiki/KBMemoryMap Memory map of ENE KB3310]<br /> * [https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/ 8051 simulator]<br /> * [http://dev.laptop.org/git?p=projects/olpcflash;a=blob;f=olpcflash.c;hb=HEAD OpenEC Firmware] <br /> * [http://wiki.laptop.org/go/OpenEC OpenEC Project]<br /> * [http://www.cagnulein.com/tmp/eee.c-20080812 Example code] that makes use of the KB3310's &quot;Index IO&quot; access functions.<br /> <br /> === Renesas H8 ===<br /> <br /> Some ECs are H8 based.<br /> <br /> * [http://www.gnuh8.org/ port of the GNU compiler suite to the H8]<br /> * [http://wunderkis.de/h8-gcc/h8tools.tar.gz H8 bootloader]<br /> * [http://h8300-hms.sourceforge.net/ sourceforge project for H8/300]<br /> <br /> == Laptop Survey ==<br /> <br /> This page attempts to list chipsets, Super I/Os, flash chips, and especially [[embedded controller]]s used in various laptops.<br /> <br /> {| border=&quot;0&quot; style=&quot;font-size: smaller&quot;<br /> |- bgcolor=&quot;#6699dd&quot;<br /> ! align=&quot;left&quot; | Vendor<br /> ! align=&quot;left&quot; | Model<br /> ! align=&quot;left&quot; | CPU<br /> ! align=&quot;left&quot; | Chipset (NB/SB)<br /> ! align=&quot;left&quot; | Super&amp;nbsp;I/O<br /> ! align=&quot;left&quot; | [[Embedded controller|EC]]<br /> ! align=&quot;left&quot; | Flash Chip<br /> ! align=&quot;left&quot; | Flash Size<br /> ! align=&quot;left&quot; | Flash S.<br /> ! align=&quot;left&quot; | Flash T.<br /> ! align=&quot;left&quot; | Owner<br /> <br /> |- bgcolor=&quot;#dddddd&quot;<br /> | ASUS || S96F/Z96F || Intel&amp;nbsp;Core&amp;trade;2 Duo T7400 || Intel&amp;nbsp;i945/ICH7 || ITE IT8510E || in Super I/O || ? || ? || ? || ? || [http://www.flashrom.org/pipermail/flashrom/2010-January/001986.html macavity]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Dell || [[Dell Latitude CPi A366XT|Latitude CPi A366XT]] || PII, 360 MHz || Intel 440BX || SMSC&amp;nbsp;FDC37N958FR || in Super I/O || AMD AM29F040B || 512KB || yes || PLCC || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Dell || [[Dell Latitude C610|Latitude C610]] || PIII, 1.2 GHz || Intel i830 || SMSC&amp;nbsp;LPC47N252 || in Super I/O || SST SST49LF004A || 512KB || no || PLCC || [mailto:coreboot@miradou.com CybFr]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Fujitsu-S. || Lifebook S-4572 || PIII, 750 MHz || Intel 82440MX || SMSC FDC37N769 || ? || Fujitsu&amp;nbsp;MBM29F400T&lt;sup&gt;1&lt;/sup&gt; || ? || no || TSOP(?) || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Fujitsu-S. || Lifebook S7110 || Intel&amp;nbsp;Core&amp;trade;2 Duo T7200 || Intel&amp;nbsp;i945/ICH7 || SMSC&amp;nbsp;LPC47N217 || Fujitsu MB90378 || Spansion S25FL008A&lt;sup&gt;2&lt;/sup&gt; || 1024 kB || no || SO8 / SPI || twice11<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Gericom || Webboy 340S2 || PIII || SiS630 || NSC PC87393VJG || NSC PC87570 || Winbond&amp;nbsp;29C020 || 256 kB || yes || PLCC || [http://thread.gmane.org/gmane.linux.bios/13081 NS]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Gateway || [[Gateway W730-K8X | W730-K8X]] || Socket 754 || ?? || ?? || ?? || SST 39VF040 || ?? || yes || PLCC || [[User:Juri|Juri]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Gateway || [[Gateway 6020GZ|6020GZ]] || Celeron M 1.4Ghz || Intel 855GME || ?? || ?? || ?? || ?? || no || ?? || [[User:Juri|Juri]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Highscreen || XD 14-C1700 || Intel&amp;nbsp;Celeron&amp;nbsp;1.7&amp;nbsp;GHz || SiS650 || NSC&amp;nbsp;PC87391(?) || ? || EON EN29F040(A) || 512 kB || yes || PLCC || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | HP || Omnibook XE3(L) || PIII, 750 MHz || Intel&amp;nbsp;82371MB/PIIX4M || SMSC&amp;nbsp;FDC37N869 || NSC&amp;nbsp;PC87570 || SST 28SF040A || 512 kB || no || PLCC || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | IBM || Thinkpad T30 || Intel P4 Mobile, 1.8 GHz || Intel&amp;nbsp;i845/ICH3-M || NSC&amp;nbsp;PC87392 || Renesas H8S&amp;nbsp;64F3169ATE10 || ST&amp;nbsp;M50FW080N5 || 1024 kB || no || TSOP40 / FWH || edgecase<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | One || [http://www.a110wiki.de A110] || VIA&amp;nbsp;C7-M&amp;nbsp;ULV&amp;nbsp;1.0&amp;nbsp;GHz || VIA VX800 || none || ENE KB3310 || ? || ? || no || ? || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Panasonic || Toughbook&amp;nbsp;CF-25 || P166MMX || FW82439TX&amp;nbsp;(430TX)/FW82371AB || NSC PC87336VJG || Renesas&amp;nbsp;3886 || SST SST29EE020 || 256 kB || no || ? || [[User:Miernik|Miernik]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Roda || Rocky III+ RK886EX || Intel&amp;reg;&amp;nbsp;Core 2 Duo Mobile T5500 || Intel 945 / ICH7 || SMSC&amp;reg;&amp;nbsp;LPC47N227 || Renesas&amp;nbsp;M38859 || ? || ? || ? || ? || ?<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Roda || Rocky II+ RT686 || Intel&amp;nbsp;Pentium III || Intel 430BX / FW82371EB || SMSC&amp;reg;&amp;nbsp;FDC37N769 || Renesas&amp;nbsp;M38867M8A || SST SST29LE020 || 256KB || yes || PLCC/parallel || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Sony || Vaio&amp;nbsp;Picturebook&amp;nbsp;PCG-C1XD || P2 400 || 443ZX || ? || ? || ST M29W004BT || 512 kB || no || || [[User:Miernik|Miernik]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Sony || Vaio&amp;nbsp;Picturebook&amp;nbsp;PCG-C1X || P266MMX || 430TX || ? || ? || ? || ? || ? || ? || [[User:Miernik|Miernik]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Toshiba || Libretto&amp;nbsp;50M PA1243CM || P133 || custom FPGA || ? || ? || ? || ? || ? || ? || [[User:Miernik|Miernik]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Toshiba || Satellite&amp;nbsp;A80-117 || Intel&amp;nbsp;Celeron || Intel&amp;nbsp;915GM/ICH6 || SMSC&amp;nbsp;LPC47N217 || ENE KB910 || ? || 1024 kB || no || TSOP (?) || [[User:Uwe|UH]]<br /> <br /> |}<br /> <br /> &lt;small&gt;<br /> &lt;sup&gt;1&lt;/sup&gt; According to the vendor BIOS update tool.&lt;br /&gt;<br /> &lt;sup&gt;2&lt;/sup&gt; Nice thing: EC/Flash is not shared, so you can erase the whole flash during system operation (this was tested).&lt;br /&gt;<br /> &lt;/small&gt;<br /> <br /> Further Links:<br /> <br /> * [http://tuxmobil.org/mylaptops.html Tuxmobil Laptop Survey]<br /> * [http://mcelrath.org/laptops.html Laptops/Notebooks with Linux Preinstalled]<br /> * [http://www.fsf.org/campaigns/free-bios.html The Free Software Foundation's Campaign for Free BIOS]<br /> <br /> == Mailinglist Discussion ==<br /> <br /> A few earlier coreboot discussions on laptops are linked here, you might get useful information out of them: <br /> <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-February/010985.html Any update on coreboot for laptops] <br /> *[http://comments.gmane.org/gmane.linux.bios/13081 Notebook 340s2 (sis630) 256k Flash] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-February/010972.html yet another reason to use coreboot in laptops I guess] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-April/011429.html coreboot laptop hunt wiki page] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-March/011140.html HP Pavillion ZV5000 (Laptop)] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-July/011942.html SA1100] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2003-September/004954.html Laptop with Sis 650 chipset] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2006-September/015551.html coreboot on Laptops]<br /> <br /> <br /> == Who really makes your laptop? ==<br /> <br /> There are several various brands of laptops, but there are only a few actual laptop makers.<br /> <br /> Name brand companies like Hewlet Packard, Compaq, IBM, Dell, Gateway, Sony, Micron, Toshiba and others; including Alienware and Voodoo do not make their own laptops. The exceptions are Asus and Apple, and even Apple doesn't make all of their laptops.<br /> <br /> Original Design Manufacturers (ODM) make the laptops for Original Equipment Manufacturers (OEM). They in turn, add their preloaded hard drives and sell them to consumers. This is why a laptop is a bit more complicated to support with coreboot. The OEM's may not even have all the specifications for the laptop since the ODM has done all the design and assembly.<br /> <br /> Some Laptop ODMs are:<br /> <br /> * [http://www.quantatw.com Quanta] makes laptops for Sony, Dell, and IBM <br /> * [http://www.inventec.com/ Inventec] and [http://www.arima.com.tw/ Arima] make the Compaq line<br /> * [http://www.compal.com/ Compal] also makes IBM and Dell lines, as well as Hewlett Packard<br /> * [http://www.clevo.com.tw/ Clevo] makes the popular Alienware and Voodoo gaming laptops<br /> <br /> Further Links:<br /> <br /> * [http://www.laptopworldwide.com/laptops.html Makers of Laptops]<br /> * [http://tuxmobil.org/laptop_oem.html Laptop and NoteBook Manufacturer - OEM/ODM Relation Matrix]<br /> * [http://tuxmobil.org/reseller.html Where to Buy a Preinstalled Linux Laptop, Notebook, Mobile Phone or PDA? - Vendor Overview]<br /> <br /> <br /> == Random Product Links ==<br /> <br /> VIA has a list of many netbooks at [http://via.com.tw/en/products/notebook/notebook.jsp VIA Partner Mobility Devices]. <br /> <br /> VIA also has information on other mobile platforms at [http://via.com.tw/en/products/notebook/index.jsp VIA Mobility Platform]. <br /> <br /> The [http://www.a110wiki.de/wiki/Main_Page Quanta IL1] vx800 based reference design covers similar models/clones such as: <br /> <br /> *[http://www.one.de/shop/one-notebooks-one-mini-notebooks-c-213_214.html One Mini A110/A115/A120/A140/A150/A470] <br /> *[http://preview.tinyurl.com/5zbzl6 Airis Kira 100/350/740] <br /> *[http://www.norhtec.com/products/gecko/index.html Norhtec Gecko] <br /> *[http://www.pioneercomputers.com.au/products/configure.asp?c1=3&amp;c2=12&amp;id=2458 Pioneer DreamBook Light IL1] <br /> *[http://www.ctlcorp.com/v4/p-697-ctl-il1a-89-netbook-with-windows-xp-home.aspx CTL IL1] More [http://www.a110wiki.de/wiki/CTL_IL1 CTL IL1 info] with tear-down pics. <br /> *[http://www.aci-asia.com/html/Ethos_7.html ACi Ethos 7] <br /> *[http://www.ilikeblue.net/products/umpc.htm BDSI Deep Blue H1]<br /> <br /> Other vx800 based netbooks: <br /> <br /> *[http://www.everex.com/products/cloudbook_max/cloudbook_max.htm Everex CloudBook MAX] <br /> *[http://www.fic.com.tw/product/ce2a1.aspx FIC CE2A1]<br /> <br /> There are still a few netbook designs currently on the market that use the VIA vx700 chipset. <br /> <br /> *[http://www.sylvaniacomputers.com/products.php?p=g Sylvania G] <br /> *[http://www.everex.com/products/cloudbook/cloudbook.htm Everex Cloudbook] <br /> *[http://www.fic.com.tw/product/ce260.aspx FIC CE260] <br /> *[http://www.fic.com.tw/product/ce268.aspx FIC CE268]<br /> <br /> There are also several AMD 690/600 laptops still available that may be candidates as well: <br /> <br /> *[http://reviews.cnet.com/laptops/acer-extensa-4420-5963/4505-3121_7-33361062.html Acer Extensa 4420] <br /> *[http://www.raondigital.com EVERUN NOTE]<br /> <br /> Intel Atom with i945 chipset netbooks: <br /> <br /> *[http://en.wikipedia.org/wiki/Aspire_One Acer Aspire One] <br /> *[http://en.wikipedia.org/wiki/MSI_Wind_PC MSI Wind] <br /> *[http://en.wikipedia.org/wiki/ASUS_Eee_PC ASUS eeePC]</div>

Juri http://www.coreboot.org/Laptop 2010-02-07T05:30:21Z

<p>Juri: /* Laptop Survey */</p> <hr /> <div>== Recent Progress of coreboot on Laptops ==<br /> <br /> * coreboot now supports the Roda RK886EX (Rocky III+) Laptop, based on Intel 82945GM/ICH7.<br /> * VIA has recently released open documentation for the VX700 and VX800 chipsets at the [http://linux.via.com.tw/support/downloadFiles.action VIA Download Portal]. <br /> <br /> <br /> == Embedded Controllers ==<br /> <br /> The remaining issue with supporting netbooks may be open firmware support for the Embedded Controller (EC).<br /> These ECs used to support keyboard scan, lid open/closed, battery charging, power management, etc.<br /> <br /> coreboot should work with the &quot;stock&quot; EC firmware. This may still be a challenge because &quot;we don't know what we don't know&quot;. Behavior at runtime is fairly standardized, but we don't know what we need to do for initialization - do we need to set up registers, put in tables, kick things, or will it all Just Work (TM)?<br /> <br /> === Renesas M3885/M3886 ===<br /> <br /> These ECs are supported by coreboot. There are several versions, with flash and with mask roms. Only the flash versions are update-able. These ECs are Family 740 based. A development environment including compiler and simulator is available from Renesas.<br /> <br /> === ENE KB3310/KB3910/KB3920 ===<br /> <br /> Very common ECs in netbooks are the KB3310, KB3910 and KB3920 from [http://www.ene.com.tw/en/index.asp ENE Technology]. The ENE ECs are 8051 based.<br /> <br /> The Quanta IL1 reference design seems to use ENE3310 controller. The q1d25i.rom was examined. The EC code is on 0xFFF00000 on One Mini A110. Its 64KB big HOLE0.ROM. <br /> <br /> More discussion and info on the ENE EC's: <br /> <br /> * ENE [http://wiki.laptop.org/images/a/ab/KB3700-ds-01.pdf KB3700 datasheet].<br /> * [http://forum.eeeuser.com/viewtopic.php?pid=99076 eeeUser Discussion] <br /> * [http://code.google.com/p/eeetune/wiki/KBMemoryMap Memory map of ENE KB3310]<br /> * [https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/ 8051 simulator]<br /> * [http://dev.laptop.org/git?p=projects/olpcflash;a=blob;f=olpcflash.c;hb=HEAD OpenEC Firmware] <br /> * [http://wiki.laptop.org/go/OpenEC OpenEC Project]<br /> * [http://www.cagnulein.com/tmp/eee.c-20080812 Example code] that makes use of the KB3310's &quot;Index IO&quot; access functions.<br /> <br /> === Renesas H8 ===<br /> <br /> Some ECs are H8 based.<br /> <br /> * [http://www.gnuh8.org/ port of the GNU compiler suite to the H8]<br /> * [http://wunderkis.de/h8-gcc/h8tools.tar.gz H8 bootloader]<br /> * [http://h8300-hms.sourceforge.net/ sourceforge project for H8/300]<br /> <br /> == Laptop Survey ==<br /> <br /> This page attempts to list chipsets, Super I/Os, flash chips, and especially [[embedded controller]]s used in various laptops.<br /> <br /> {| border=&quot;0&quot; style=&quot;font-size: smaller&quot;<br /> |- bgcolor=&quot;#6699dd&quot;<br /> ! align=&quot;left&quot; | Vendor<br /> ! align=&quot;left&quot; | Model<br /> ! align=&quot;left&quot; | CPU<br /> ! align=&quot;left&quot; | Chipset (NB/SB)<br /> ! align=&quot;left&quot; | Super&amp;nbsp;I/O<br /> ! align=&quot;left&quot; | [[Embedded controller|EC]]<br /> ! align=&quot;left&quot; | Flash Chip<br /> ! align=&quot;left&quot; | Flash Size<br /> ! align=&quot;left&quot; | Flash S.<br /> ! align=&quot;left&quot; | Flash T.<br /> ! align=&quot;left&quot; | Owner<br /> <br /> |- bgcolor=&quot;#dddddd&quot;<br /> | ASUS || S96F/Z96F || Intel&amp;nbsp;Core&amp;trade;2 Duo T7400 || Intel&amp;nbsp;i945/ICH7 || ITE IT8510E || in Super I/O || ? || ? || ? || ? || [http://www.flashrom.org/pipermail/flashrom/2010-January/001986.html macavity]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Dell || [[Dell Latitude CPi A366XT|Latitude CPi A366XT]] || PII, 360 MHz || Intel 440BX || SMSC&amp;nbsp;FDC37N958FR || in Super I/O || AMD AM29F040B || 512KB || yes || PLCC || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Dell || [[Dell Latitude C610|Latitude C610]] || PIII, 1.2 GHz || Intel i830 || SMSC&amp;nbsp;LPC47N252 || in Super I/O || SST SST49LF004A || 512KB || no || PLCC || [mailto:coreboot@miradou.com CybFr]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Fujitsu-S. || Lifebook S-4572 || PIII, 750 MHz || Intel 82440MX || SMSC FDC37N769 || ? || Fujitsu&amp;nbsp;MBM29F400T&lt;sup&gt;1&lt;/sup&gt; || ? || no || TSOP(?) || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Fujitsu-S. || Lifebook S7110 || Intel&amp;nbsp;Core&amp;trade;2 Duo T7200 || Intel&amp;nbsp;i945/ICH7 || SMSC&amp;nbsp;LPC47N217 || Fujitsu MB90378 || Spansion S25FL008A&lt;sup&gt;2&lt;/sup&gt; || 1024 kB || no || SO8 / SPI || twice11<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Gericom || Webboy 340S2 || PIII || SiS630 || NSC PC87393VJG || NSC PC87570 || Winbond&amp;nbsp;29C020 || 256 kB || yes || PLCC || [http://thread.gmane.org/gmane.linux.bios/13081 NS]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Gateway || [[Gateway W730-K8X | W730-K8X]] || Socket 754 || ?? || ?? || ?? || SST 39VF040 || ?? || ?? || PLCC || [[User:Juri|Juri]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Gateway || [[Gateway 6020GZ|6020GZ]] || Celeron M || Intel 855GME || ?? || ?? || ?? || ?? || ?? || ?? || [[User:Juri|Juri]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Highscreen || XD 14-C1700 || Intel&amp;nbsp;Celeron&amp;nbsp;1.7&amp;nbsp;GHz || SiS650 || NSC&amp;nbsp;PC87391(?) || ? || EON EN29F040(A) || 512 kB || yes || PLCC || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | HP || Omnibook XE3(L) || PIII, 750 MHz || Intel&amp;nbsp;82371MB/PIIX4M || SMSC&amp;nbsp;FDC37N869 || NSC&amp;nbsp;PC87570 || SST 28SF040A || 512 kB || no || PLCC || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | IBM || Thinkpad T30 || Intel P4 Mobile, 1.8 GHz || Intel&amp;nbsp;i845/ICH3-M || NSC&amp;nbsp;PC87392 || Renesas H8S&amp;nbsp;64F3169ATE10 || ST&amp;nbsp;M50FW080N5 || 1024 kB || no || TSOP40 / FWH || edgecase<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | One || [http://www.a110wiki.de A110] || VIA&amp;nbsp;C7-M&amp;nbsp;ULV&amp;nbsp;1.0&amp;nbsp;GHz || VIA VX800 || none || ENE KB3310 || ? || ? || no || ? || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Panasonic || Toughbook&amp;nbsp;CF-25 || P166MMX || FW82439TX&amp;nbsp;(430TX)/FW82371AB || NSC PC87336VJG || Renesas&amp;nbsp;3886 || SST SST29EE020 || 256 kB || no || ? || [[User:Miernik|Miernik]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Roda || Rocky III+ RK886EX || Intel&amp;reg;&amp;nbsp;Core 2 Duo Mobile T5500 || Intel 945 / ICH7 || SMSC&amp;reg;&amp;nbsp;LPC47N227 || Renesas&amp;nbsp;M38859 || ? || ? || ? || ? || ?<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Roda || Rocky II+ RT686 || Intel&amp;nbsp;Pentium III || Intel 430BX / FW82371EB || SMSC&amp;reg;&amp;nbsp;FDC37N769 || Renesas&amp;nbsp;M38867M8A || SST SST29LE020 || 256KB || yes || PLCC/parallel || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Sony || Vaio&amp;nbsp;Picturebook&amp;nbsp;PCG-C1XD || P2 400 || 443ZX || ? || ? || ST M29W004BT || 512 kB || no || || [[User:Miernik|Miernik]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Sony || Vaio&amp;nbsp;Picturebook&amp;nbsp;PCG-C1X || P266MMX || 430TX || ? || ? || ? || ? || ? || ? || [[User:Miernik|Miernik]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Toshiba || Libretto&amp;nbsp;50M PA1243CM || P133 || custom FPGA || ? || ? || ? || ? || ? || ? || [[User:Miernik|Miernik]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Toshiba || Satellite&amp;nbsp;A80-117 || Intel&amp;nbsp;Celeron || Intel&amp;nbsp;915GM/ICH6 || SMSC&amp;nbsp;LPC47N217 || ENE KB910 || ? || 1024 kB || no || TSOP (?) || [[User:Uwe|UH]]<br /> <br /> |}<br /> <br /> &lt;small&gt;<br /> &lt;sup&gt;1&lt;/sup&gt; According to the vendor BIOS update tool.&lt;br /&gt;<br /> &lt;sup&gt;2&lt;/sup&gt; Nice thing: EC/Flash is not shared, so you can erase the whole flash during system operation (this was tested).&lt;br /&gt;<br /> &lt;/small&gt;<br /> <br /> Further Links:<br /> <br /> * [http://tuxmobil.org/mylaptops.html Tuxmobil Laptop Survey]<br /> * [http://mcelrath.org/laptops.html Laptops/Notebooks with Linux Preinstalled]<br /> * [http://www.fsf.org/campaigns/free-bios.html The Free Software Foundation's Campaign for Free BIOS]<br /> <br /> == Mailinglist Discussion ==<br /> <br /> A few earlier coreboot discussions on laptops are linked here, you might get useful information out of them: <br /> <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-February/010985.html Any update on coreboot for laptops] <br /> *[http://comments.gmane.org/gmane.linux.bios/13081 Notebook 340s2 (sis630) 256k Flash] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-February/010972.html yet another reason to use coreboot in laptops I guess] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-April/011429.html coreboot laptop hunt wiki page] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-March/011140.html HP Pavillion ZV5000 (Laptop)] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-July/011942.html SA1100] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2003-September/004954.html Laptop with Sis 650 chipset] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2006-September/015551.html coreboot on Laptops]<br /> <br /> <br /> == Who really makes your laptop? ==<br /> <br /> There are several various brands of laptops, but there are only a few actual laptop makers.<br /> <br /> Name brand companies like Hewlet Packard, Compaq, IBM, Dell, Gateway, Sony, Micron, Toshiba and others; including Alienware and Voodoo do not make their own laptops. The exceptions are Asus and Apple, and even Apple doesn't make all of their laptops.<br /> <br /> Original Design Manufacturers (ODM) make the laptops for Original Equipment Manufacturers (OEM). They in turn, add their preloaded hard drives and sell them to consumers. This is why a laptop is a bit more complicated to support with coreboot. The OEM's may not even have all the specifications for the laptop since the ODM has done all the design and assembly.<br /> <br /> Some Laptop ODMs are:<br /> <br /> * [http://www.quantatw.com Quanta] makes laptops for Sony, Dell, and IBM <br /> * [http://www.inventec.com/ Inventec] and [http://www.arima.com.tw/ Arima] make the Compaq line<br /> * [http://www.compal.com/ Compal] also makes IBM and Dell lines, as well as Hewlett Packard<br /> * [http://www.clevo.com.tw/ Clevo] makes the popular Alienware and Voodoo gaming laptops<br /> <br /> Further Links:<br /> <br /> * [http://www.laptopworldwide.com/laptops.html Makers of Laptops]<br /> * [http://tuxmobil.org/laptop_oem.html Laptop and NoteBook Manufacturer - OEM/ODM Relation Matrix]<br /> * [http://tuxmobil.org/reseller.html Where to Buy a Preinstalled Linux Laptop, Notebook, Mobile Phone or PDA? - Vendor Overview]<br /> <br /> <br /> == Random Product Links ==<br /> <br /> VIA has a list of many netbooks at [http://via.com.tw/en/products/notebook/notebook.jsp VIA Partner Mobility Devices]. <br /> <br /> VIA also has information on other mobile platforms at [http://via.com.tw/en/products/notebook/index.jsp VIA Mobility Platform]. <br /> <br /> The [http://www.a110wiki.de/wiki/Main_Page Quanta IL1] vx800 based reference design covers similar models/clones such as: <br /> <br /> *[http://www.one.de/shop/one-notebooks-one-mini-notebooks-c-213_214.html One Mini A110/A115/A120/A140/A150/A470] <br /> *[http://preview.tinyurl.com/5zbzl6 Airis Kira 100/350/740] <br /> *[http://www.norhtec.com/products/gecko/index.html Norhtec Gecko] <br /> *[http://www.pioneercomputers.com.au/products/configure.asp?c1=3&amp;c2=12&amp;id=2458 Pioneer DreamBook Light IL1] <br /> *[http://www.ctlcorp.com/v4/p-697-ctl-il1a-89-netbook-with-windows-xp-home.aspx CTL IL1] More [http://www.a110wiki.de/wiki/CTL_IL1 CTL IL1 info] with tear-down pics. <br /> *[http://www.aci-asia.com/html/Ethos_7.html ACi Ethos 7] <br /> *[http://www.ilikeblue.net/products/umpc.htm BDSI Deep Blue H1]<br /> <br /> Other vx800 based netbooks: <br /> <br /> *[http://www.everex.com/products/cloudbook_max/cloudbook_max.htm Everex CloudBook MAX] <br /> *[http://www.fic.com.tw/product/ce2a1.aspx FIC CE2A1]<br /> <br /> There are still a few netbook designs currently on the market that use the VIA vx700 chipset. <br /> <br /> *[http://www.sylvaniacomputers.com/products.php?p=g Sylvania G] <br /> *[http://www.everex.com/products/cloudbook/cloudbook.htm Everex Cloudbook] <br /> *[http://www.fic.com.tw/product/ce260.aspx FIC CE260] <br /> *[http://www.fic.com.tw/product/ce268.aspx FIC CE268]<br /> <br /> There are also several AMD 690/600 laptops still available that may be candidates as well: <br /> <br /> *[http://reviews.cnet.com/laptops/acer-extensa-4420-5963/4505-3121_7-33361062.html Acer Extensa 4420] <br /> *[http://www.raondigital.com EVERUN NOTE]<br /> <br /> Intel Atom with i945 chipset netbooks: <br /> <br /> *[http://en.wikipedia.org/wiki/Aspire_One Acer Aspire One] <br /> *[http://en.wikipedia.org/wiki/MSI_Wind_PC MSI Wind] <br /> *[http://en.wikipedia.org/wiki/ASUS_Eee_PC ASUS eeePC]</div>

Juri http://www.coreboot.org/File:Gateway-w730-k8x-board-back-lowermiddle.jpg 2010-02-07T05:22:45Z

<p>Juri: </p> <hr /> <div></div>

Juri http://www.coreboot.org/File:Dsci0064.jpg 2010-02-07T05:20:55Z

<p>Juri: </p> <hr /> <div></div>

Juri http://www.coreboot.org/Gateway_W730-K8X 2010-02-07T05:20:03Z

<p>Juri: /* Photos */</p> <hr /> <div>[[File:gateway W730-K8X bottom.jpg|thumb|The Gateway W730-K8X]]<br /> <br /> The '''Gateway W730-K8X''' is an older AMD based laptop, possibly manufactured for gateway by arima.<br /> <br /> == Hardware ==<br /> <br /> '''Overview:'''<br /> <br /> * '''Northbridge:''' Unknown<br /> * '''Southbridge:''' Unknown<br /> * '''Super I/O:''' Unknown<br /> ** <br /> * '''Audio/video controller:''' <br /> * '''PCMCIA controller:''' <br /> * '''ROM/BIOS chip:''' Socketed<br /> * '''Ethernet:'''<br /> <br /> == Photos ==<br /> <br /> &lt;gallery&gt;<br /> Image:gateway-w730-k8x-board-front.jpg|&lt;small&gt;Motherboard Front&lt;/small&gt;<br /> Image:gateway-w730-k8x-board-back.jpg|&lt;small&gt;Motherboard Back&lt;/small&gt;<br /> Image:gateway-w730-k8x-board-back-lowerright.jpg|&lt;small&gt;Motherboard Back Lower-Right Section&lt;/small&gt;<br /> Image:gateway-w730-k8x-board-back-lowermiddle.jpg|&lt;small&gt;Motherboard Back Lower-Middle Section&lt;/small&gt;<br /> &lt;/gallery&gt;<br /> <br /> {{PD-self}}</div>

Juri http://www.coreboot.org/File:Gateway-w730-k8x-board-back-lowerright.jpg 2010-02-07T05:09:50Z

<p>Juri: </p> <hr /> <div></div>

Juri http://www.coreboot.org/Gateway_W730-K8X 2010-02-07T05:06:38Z

<p>Juri: </p> <hr /> <div>[[File:gateway W730-K8X bottom.jpg|thumb|The Gateway W730-K8X]]<br /> <br /> The '''Gateway W730-K8X''' is an older AMD based laptop, possibly manufactured for gateway by arima.<br /> <br /> == Hardware ==<br /> <br /> '''Overview:'''<br /> <br /> * '''Northbridge:''' Unknown<br /> * '''Southbridge:''' Unknown<br /> * '''Super I/O:''' Unknown<br /> ** <br /> * '''Audio/video controller:''' <br /> * '''PCMCIA controller:''' <br /> * '''ROM/BIOS chip:''' Socketed<br /> * '''Ethernet:'''<br /> <br /> == Photos ==<br /> <br /> &lt;gallery&gt;<br /> Image:gateway-w730-k8x-board-front.jpg|&lt;small&gt;Motherboard Front&lt;/small&gt;<br /> Image:gateway-w730-k8x-board-back.jpg|&lt;small&gt;Motherboard Back&lt;/small&gt;<br /> Image:gateway-w730-k8x-board-back-lowerright.jpg|&lt;small&gt;Motherboard Back Lower-Right Section&lt;/small&gt;<br /> &lt;/gallery&gt;<br /> <br /> {{PD-self}}</div>

Juri http://www.coreboot.org/Gateway_W730-K8X 2010-02-07T04:58:39Z

<p>Juri: /* Photos */</p> <hr /> <div>[[File:gateway W730-K8X bottom.jpg|thumb|The Gateway W730-K8X]]<br /> <br /> The '''Gateway W730-K8X''' is an older AMD based laptop, possibly manufactured for gateway by arima.<br /> <br /> == Hardware ==<br /> <br /> '''Overview:'''<br /> <br /> * '''Northbridge:''' Unknown<br /> * '''Southbridge:''' Unknown<br /> * '''Super I/O:''' Unknown<br /> ** <br /> * '''Audio/video controller:''' <br /> * '''PCMCIA controller:''' <br /> * '''ROM/BIOS chip:''' Socketed<br /> * '''Ethernet:'''<br /> <br /> == Photos ==<br /> <br /> &lt;gallery&gt;<br /> Image:gateway-w730-k8x-board-front.jpg|&lt;small&gt;Motherboard Front&lt;/small&gt;<br /> Image:gateway-w730-k8x-board-back.jpg|&lt;small&gt;Motherboard Back&lt;/small&gt;<br /> &lt;/gallery&gt;<br /> <br /> {{PD-self}}</div>

Juri http://www.coreboot.org/File:Gateway-w730-k8x-board-back.jpg 2010-02-07T04:57:00Z

<p>Juri: uploaded a new version of &quot;File:Gateway-w730-k8x-board-back.jpg&quot;</p> <hr /> <div>The back of a gateway W730-K8X motherboard</div>

Juri http://www.coreboot.org/File:Gateway-w730-k8x-board-front.jpg 2010-02-07T04:55:24Z

<p>Juri: </p> <hr /> <div></div>

Juri http://www.coreboot.org/Gateway_W730-K8X 2010-02-07T04:51:55Z

<p>Juri: </p> <hr /> <div>[[File:gateway W730-K8X bottom.jpg|thumb|The Gateway W730-K8X]]<br /> <br /> The '''Gateway W730-K8X''' is an older AMD based laptop, possibly manufactured for gateway by arima.<br /> <br /> == Hardware ==<br /> <br /> '''Overview:'''<br /> <br /> * '''Northbridge:''' Unknown<br /> * '''Southbridge:''' Unknown<br /> * '''Super I/O:''' Unknown<br /> ** <br /> * '''Audio/video controller:''' <br /> * '''PCMCIA controller:''' <br /> * '''ROM/BIOS chip:''' Socketed<br /> * '''Ethernet:'''<br /> <br /> == Photos ==<br /> <br /> &lt;gallery&gt;<br /> Image:gateway W730-K8X-board-front.jpg|&lt;small&gt;Motherboard Front&lt;/small&gt;<br /> Image:gateway-w730-k8x-board-back.jpg|&lt;small&gt;Motherboard Back&lt;/small&gt;<br /> &lt;/gallery&gt;<br /> <br /> {{PD-self}}</div>

Juri http://www.coreboot.org/Gateway_W730-K8X 2010-02-07T04:49:14Z

<p>Juri: </p> <hr /> <div>[[File:gateway W730-K8X bottom.jpg|thumb|The Gateway W730-K8X]]<br /> <br /> The '''Gateway W730-K8X''' is an older AMD based laptop, possibly manufactured for gateway by arima.<br /> <br /> == Hardware ==<br /> <br /> '''Overview:'''<br /> <br /> * '''Northbridge:''' Unknown<br /> * '''Southbridge:''' Unknown<br /> * '''Super I/O:''' Unknown<br /> ** <br /> * '''Audio/video controller:''' <br /> * '''PCMCIA controller:''' <br /> * '''ROM/BIOS chip:''' Socketed<br /> * '''Ethernet:'''<br /> <br /> == Photos ==<br /> <br /> &lt;gallery&gt;<br /> [[File:gateway W730-K8X-board-front.jpg|thumb|Motherboard Front]]<br /> [[File:gateway-w730-k8x-board-back.jpg|thumb|Motherboard Back]]<br /> &lt;/gallery&gt;<br /> <br /> {{PD-self}}</div>

Juri http://www.coreboot.org/File:Gateway-w730-k8x-board-back.jpg 2010-02-07T04:48:01Z

<p>Juri: The back of a gateway W730-K8X motherboard</p> <hr /> <div>The back of a gateway W730-K8X motherboard</div>

Juri http://www.coreboot.org/Gateway_W730-K8X 2010-02-07T04:41:53Z

<p>Juri: </p> <hr /> <div>[[File:gateway W730-K8X bottom.jpg|thumb|The Gateway W730-K8X]]<br /> <br /> The '''Gateway W730-K8X''' is an older AMD based laptop, possibly manufactured for gateway by arima.<br /> <br /> == Hardware ==<br /> <br /> '''Overview:'''<br /> <br /> * '''Northbridge:''' Unknown<br /> * '''Southbridge:''' Unknown<br /> * '''Super I/O:''' Unknown<br /> ** <br /> * '''Audio/video controller:''' <br /> * '''PCMCIA controller:''' <br /> * '''ROM/BIOS chip:''' Socketed<br /> * '''Ethernet:'''<br /> <br /> == Photos ==<br /> <br /> &lt;gallery&gt;<br /> [[File:gateway W730-K8X-board-front.jpg|thumb|Motherboard Front]]<br /> [[File:gateway W730-K8X-board-back.jpg|thumb|Motherboard Back]]<br /> &lt;/gallery&gt;<br /> <br /> <br /> {{PD-self}}</div>

Juri http://www.coreboot.org/File:Gateway_W730-K8X_bottom.jpg 2010-02-07T04:32:11Z

<p>Juri: </p> <hr /> <div></div>

Juri http://www.coreboot.org/Gateway_W730-K8X 2010-02-07T04:29:40Z

<p>Juri: Created page with 'The Gateway W730-K8X The '''Gateway W730-K8X''' is an older AMD based laptop, possibly manufactured for gateway by arima. == Hardware…'</p> <hr /> <div>[[File:gateway W730-K8X bottom.jpg|thumb|The Gateway W730-K8X]]<br /> <br /> The '''Gateway W730-K8X''' is an older AMD based laptop, possibly manufactured for gateway by arima.<br /> <br /> == Hardware ==<br /> <br /> '''Overview:'''<br /> <br /> * '''Northbridge:''' Unknown<br /> * '''Southbridge:''' Unknown<br /> * '''Super I/O:''' Unknown<br /> ** <br /> * '''Audio/video controller:''' <br /> * '''PCMCIA controller:''' <br /> * '''ROM/BIOS chip:''' Socketed<br /> * '''Ethernet:'''<br /> <br /> == Photos ==<br /> <br /> &lt;gallery&gt;<br /> &lt;/gallery&gt;<br /> <br /> <br /> {{PD-self}}</div>

Juri http://www.coreboot.org/Laptop 2010-02-07T04:27:19Z

<p>Juri: /* Laptop Survey */</p> <hr /> <div>== Recent Progress of coreboot on Laptops ==<br /> <br /> * coreboot now supports the Roda RK886EX (Rocky III+) Laptop, based on Intel 82945GM/ICH7.<br /> * VIA has recently released open documentation for the VX700 and VX800 chipsets at the [http://linux.via.com.tw/support/downloadFiles.action VIA Download Portal]. <br /> <br /> <br /> == Embedded Controllers ==<br /> <br /> The remaining issue with supporting netbooks may be open firmware support for the Embedded Controller (EC).<br /> These ECs used to support keyboard scan, lid open/closed, battery charging, power management, etc.<br /> <br /> coreboot should work with the &quot;stock&quot; EC firmware. This may still be a challenge because &quot;we don't know what we don't know&quot;. Behavior at runtime is fairly standardized, but we don't know what we need to do for initialization - do we need to set up registers, put in tables, kick things, or will it all Just Work (TM)?<br /> <br /> === Renesas M3885/M3886 ===<br /> <br /> These ECs are supported by coreboot. There are several versions, with flash and with mask roms. Only the flash versions are update-able. These ECs are Family 740 based. A development environment including compiler and simulator is available from Renesas.<br /> <br /> === ENE KB3310/KB3910/KB3920 ===<br /> <br /> Very common ECs in netbooks are the KB3310, KB3910 and KB3920 from [http://www.ene.com.tw/en/index.asp ENE Technology]. The ENE ECs are 8051 based.<br /> <br /> The Quanta IL1 reference design seems to use ENE3310 controller. The q1d25i.rom was examined. The EC code is on 0xFFF00000 on One Mini A110. Its 64KB big HOLE0.ROM. <br /> <br /> More discussion and info on the ENE EC's: <br /> <br /> * ENE [http://wiki.laptop.org/images/a/ab/KB3700-ds-01.pdf KB3700 datasheet].<br /> * [http://forum.eeeuser.com/viewtopic.php?pid=99076 eeeUser Discussion] <br /> * [http://code.google.com/p/eeetune/wiki/KBMemoryMap Memory map of ENE KB3310]<br /> * [https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/ 8051 simulator]<br /> * [http://dev.laptop.org/git?p=projects/olpcflash;a=blob;f=olpcflash.c;hb=HEAD OpenEC Firmware] <br /> * [http://wiki.laptop.org/go/OpenEC OpenEC Project]<br /> * [http://www.cagnulein.com/tmp/eee.c-20080812 Example code] that makes use of the KB3310's &quot;Index IO&quot; access functions.<br /> <br /> === Renesas H8 ===<br /> <br /> Some ECs are H8 based.<br /> <br /> * [http://www.gnuh8.org/ port of the GNU compiler suite to the H8]<br /> * [http://wunderkis.de/h8-gcc/h8tools.tar.gz H8 bootloader]<br /> * [http://h8300-hms.sourceforge.net/ sourceforge project for H8/300]<br /> <br /> == Laptop Survey ==<br /> <br /> This page attempts to list chipsets, Super I/Os, flash chips, and especially [[embedded controller]]s used in various laptops.<br /> <br /> {| border=&quot;0&quot; style=&quot;font-size: smaller&quot;<br /> |- bgcolor=&quot;#6699dd&quot;<br /> ! align=&quot;left&quot; | Vendor<br /> ! align=&quot;left&quot; | Model<br /> ! align=&quot;left&quot; | CPU<br /> ! align=&quot;left&quot; | Chipset (NB/SB)<br /> ! align=&quot;left&quot; | Super&amp;nbsp;I/O<br /> ! align=&quot;left&quot; | [[Embedded controller|EC]]<br /> ! align=&quot;left&quot; | Flash Chip<br /> ! align=&quot;left&quot; | Flash Size<br /> ! align=&quot;left&quot; | Flash S.<br /> ! align=&quot;left&quot; | Flash T.<br /> ! align=&quot;left&quot; | Owner<br /> <br /> |- bgcolor=&quot;#dddddd&quot;<br /> | ASUS || S96F/Z96F || Intel&amp;nbsp;Core&amp;trade;2 Duo T7400 || Intel&amp;nbsp;i945/ICH7 || ITE IT8510E || in Super I/O || ? || ? || ? || ? || [http://www.flashrom.org/pipermail/flashrom/2010-January/001986.html macavity]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Dell || [[Dell Latitude CPi A366XT|Latitude CPi A366XT]] || PII, 360 MHz || Intel 440BX || SMSC&amp;nbsp;FDC37N958FR || in Super I/O || AMD AM29F040B || 512KB || yes || PLCC || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Dell || [[Dell Latitude C610|Latitude C610]] || PIII, 1.2 GHz || Intel i830 || SMSC&amp;nbsp;LPC47N252 || in Super I/O || SST SST49LF004A || 512KB || no || PLCC || [mailto:coreboot@miradou.com CybFr]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Fujitsu-S. || Lifebook S-4572 || PIII, 750 MHz || Intel 82440MX || SMSC FDC37N769 || ? || Fujitsu&amp;nbsp;MBM29F400T&lt;sup&gt;1&lt;/sup&gt; || ? || no || TSOP(?) || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Fujitsu-S. || Lifebook S7110 || Intel&amp;nbsp;Core&amp;trade;2 Duo T7200 || Intel&amp;nbsp;i945/ICH7 || SMSC&amp;nbsp;LPC47N217 || Fujitsu MB90378 || Spansion S25FL008A&lt;sup&gt;2&lt;/sup&gt; || 1024 kB || no || SO8 / SPI || twice11<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Gericom || Webboy 340S2 || PIII || SiS630 || NSC PC87393VJG || NSC PC87570 || Winbond&amp;nbsp;29C020 || 256 kB || yes || PLCC || [http://thread.gmane.org/gmane.linux.bios/13081 NS]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Gateway || [[Gateway W730-K8X | W730-K8X]] || Socket 754 || ?? || ?? || ?? || ?? || ?? || ?? || [[User:Juri|Juri]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Gateway || [[Gateway 6020GZ|6020GZ]] || Celeron M || Intel 855GME || ?? || ?? || ?? || ?? || ?? || ?? || [[User:Juri|Juri]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Highscreen || XD 14-C1700 || Intel&amp;nbsp;Celeron&amp;nbsp;1.7&amp;nbsp;GHz || SiS650 || NSC&amp;nbsp;PC87391(?) || ? || EON EN29F040(A) || 512 kB || yes || PLCC || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | HP || Omnibook XE3(L) || PIII, 750 MHz || Intel&amp;nbsp;82371MB/PIIX4M || SMSC&amp;nbsp;FDC37N869 || NSC&amp;nbsp;PC87570 || SST 28SF040A || 512 kB || no || PLCC || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | IBM || Thinkpad T30 || Intel P4 Mobile, 1.8 GHz || Intel&amp;nbsp;i845/ICH3-M || NSC&amp;nbsp;PC87392 || Renesas H8S&amp;nbsp;64F3169ATE10 || ST&amp;nbsp;M50FW080N5 || 1024 kB || no || TSOP40 / FWH || edgecase<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | One || [http://www.a110wiki.de A110] || VIA&amp;nbsp;C7-M&amp;nbsp;ULV&amp;nbsp;1.0&amp;nbsp;GHz || VIA VX800 || none || ENE KB3310 || ? || ? || no || ? || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Panasonic || Toughbook&amp;nbsp;CF-25 || P166MMX || FW82439TX&amp;nbsp;(430TX)/FW82371AB || NSC PC87336VJG || Renesas&amp;nbsp;3886 || SST SST29EE020 || 256 kB || no || ? || [[User:Miernik|Miernik]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Roda || Rocky III+ RK886EX || Intel&amp;reg;&amp;nbsp;Core 2 Duo Mobile T5500 || Intel 945 / ICH7 || SMSC&amp;reg;&amp;nbsp;LPC47N227 || Renesas&amp;nbsp;M38859 || ? || ? || ? || ? || ?<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Roda || Rocky II+ RT686 || Intel&amp;nbsp;Pentium III || Intel 430BX / FW82371EB || SMSC&amp;reg;&amp;nbsp;FDC37N769 || Renesas&amp;nbsp;M38867M8A || SST SST29LE020 || 256KB || yes || PLCC/parallel || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Sony || Vaio&amp;nbsp;Picturebook&amp;nbsp;PCG-C1XD || P2 400 || 443ZX || ? || ? || ST M29W004BT || 512 kB || no || || [[User:Miernik|Miernik]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Sony || Vaio&amp;nbsp;Picturebook&amp;nbsp;PCG-C1X || P266MMX || 430TX || ? || ? || ? || ? || ? || ? || [[User:Miernik|Miernik]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Toshiba || Libretto&amp;nbsp;50M PA1243CM || P133 || custom FPGA || ? || ? || ? || ? || ? || ? || [[User:Miernik|Miernik]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Toshiba || Satellite&amp;nbsp;A80-117 || Intel&amp;nbsp;Celeron || Intel&amp;nbsp;915GM/ICH6 || SMSC&amp;nbsp;LPC47N217 || ENE KB910 || ? || 1024 kB || no || TSOP (?) || [[User:Uwe|UH]]<br /> <br /> |}<br /> <br /> &lt;small&gt;<br /> &lt;sup&gt;1&lt;/sup&gt; According to the vendor BIOS update tool.&lt;br /&gt;<br /> &lt;sup&gt;2&lt;/sup&gt; Nice thing: EC/Flash is not shared, so you can erase the whole flash during system operation (this was tested).&lt;br /&gt;<br /> &lt;/small&gt;<br /> <br /> Further Links:<br /> <br /> * [http://tuxmobil.org/mylaptops.html Tuxmobil Laptop Survey]<br /> * [http://mcelrath.org/laptops.html Laptops/Notebooks with Linux Preinstalled]<br /> * [http://www.fsf.org/campaigns/free-bios.html The Free Software Foundation's Campaign for Free BIOS]<br /> <br /> == Mailinglist Discussion ==<br /> <br /> A few earlier coreboot discussions on laptops are linked here, you might get useful information out of them: <br /> <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-February/010985.html Any update on coreboot for laptops] <br /> *[http://comments.gmane.org/gmane.linux.bios/13081 Notebook 340s2 (sis630) 256k Flash] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-February/010972.html yet another reason to use coreboot in laptops I guess] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-April/011429.html coreboot laptop hunt wiki page] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-March/011140.html HP Pavillion ZV5000 (Laptop)] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-July/011942.html SA1100] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2003-September/004954.html Laptop with Sis 650 chipset] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2006-September/015551.html coreboot on Laptops]<br /> <br /> <br /> == Who really makes your laptop? ==<br /> <br /> There are several various brands of laptops, but there are only a few actual laptop makers.<br /> <br /> Name brand companies like Hewlet Packard, Compaq, IBM, Dell, Gateway, Sony, Micron, Toshiba and others; including Alienware and Voodoo do not make their own laptops. The exceptions are Asus and Apple, and even Apple doesn't make all of their laptops.<br /> <br /> Original Design Manufacturers (ODM) make the laptops for Original Equipment Manufacturers (OEM). They in turn, add their preloaded hard drives and sell them to consumers. This is why a laptop is a bit more complicated to support with coreboot. The OEM's may not even have all the specifications for the laptop since the ODM has done all the design and assembly.<br /> <br /> Some Laptop ODMs are:<br /> <br /> * [http://www.quantatw.com Quanta] makes laptops for Sony, Dell, and IBM <br /> * [http://www.inventec.com/ Inventec] and [http://www.arima.com.tw/ Arima] make the Compaq line<br /> * [http://www.compal.com/ Compal] also makes IBM and Dell lines, as well as Hewlett Packard<br /> * [http://www.clevo.com.tw/ Clevo] makes the popular Alienware and Voodoo gaming laptops<br /> <br /> Further Links:<br /> <br /> * [http://www.laptopworldwide.com/laptops.html Makers of Laptops]<br /> * [http://tuxmobil.org/laptop_oem.html Laptop and NoteBook Manufacturer - OEM/ODM Relation Matrix]<br /> * [http://tuxmobil.org/reseller.html Where to Buy a Preinstalled Linux Laptop, Notebook, Mobile Phone or PDA? - Vendor Overview]<br /> <br /> <br /> == Random Product Links ==<br /> <br /> VIA has a list of many netbooks at [http://via.com.tw/en/products/notebook/notebook.jsp VIA Partner Mobility Devices]. <br /> <br /> VIA also has information on other mobile platforms at [http://via.com.tw/en/products/notebook/index.jsp VIA Mobility Platform]. <br /> <br /> The [http://www.a110wiki.de/wiki/Main_Page Quanta IL1] vx800 based reference design covers similar models/clones such as: <br /> <br /> *[http://www.one.de/shop/one-notebooks-one-mini-notebooks-c-213_214.html One Mini A110/A115/A120/A140/A150/A470] <br /> *[http://preview.tinyurl.com/5zbzl6 Airis Kira 100/350/740] <br /> *[http://www.norhtec.com/products/gecko/index.html Norhtec Gecko] <br /> *[http://www.pioneercomputers.com.au/products/configure.asp?c1=3&amp;c2=12&amp;id=2458 Pioneer DreamBook Light IL1] <br /> *[http://www.ctlcorp.com/v4/p-697-ctl-il1a-89-netbook-with-windows-xp-home.aspx CTL IL1] More [http://www.a110wiki.de/wiki/CTL_IL1 CTL IL1 info] with tear-down pics. <br /> *[http://www.aci-asia.com/html/Ethos_7.html ACi Ethos 7] <br /> *[http://www.ilikeblue.net/products/umpc.htm BDSI Deep Blue H1]<br /> <br /> Other vx800 based netbooks: <br /> <br /> *[http://www.everex.com/products/cloudbook_max/cloudbook_max.htm Everex CloudBook MAX] <br /> *[http://www.fic.com.tw/product/ce2a1.aspx FIC CE2A1]<br /> <br /> There are still a few netbook designs currently on the market that use the VIA vx700 chipset. <br /> <br /> *[http://www.sylvaniacomputers.com/products.php?p=g Sylvania G] <br /> *[http://www.everex.com/products/cloudbook/cloudbook.htm Everex Cloudbook] <br /> *[http://www.fic.com.tw/product/ce260.aspx FIC CE260] <br /> *[http://www.fic.com.tw/product/ce268.aspx FIC CE268]<br /> <br /> There are also several AMD 690/600 laptops still available that may be candidates as well: <br /> <br /> *[http://reviews.cnet.com/laptops/acer-extensa-4420-5963/4505-3121_7-33361062.html Acer Extensa 4420] <br /> *[http://www.raondigital.com EVERUN NOTE]<br /> <br /> Intel Atom with i945 chipset netbooks: <br /> <br /> *[http://en.wikipedia.org/wiki/Aspire_One Acer Aspire One] <br /> *[http://en.wikipedia.org/wiki/MSI_Wind_PC MSI Wind] <br /> *[http://en.wikipedia.org/wiki/ASUS_Eee_PC ASUS eeePC]</div>

Juri http://www.coreboot.org/Gateway_6020GZ 2010-02-07T02:57:30Z

<p>Juri: /* Hardware */</p> <hr /> <div>[[File:gateway 6020GZ bottom.jpg|thumb|The Gateway 6020GZ]]<br /> <br /> The '''[http://support.gateway.com/s/Mobile/Gateway/6000Series/4991sp3.shtml The Gateway 6020GZ]''' is an older laptop with an intel 855 chipset.<br /> <br /> == Hardware ==<br /> <br /> '''Overview:'''<br /> <br /> * '''Northbridge:''' Unknown<br /> * '''Southbridge:''' Unknown<br /> * '''Super I/O:''' Unknown<br /> ** <br /> * '''Audio/video controller:''' <br /> * '''PCMCIA controller:''' <br /> * '''ROM/BIOS chip:''' NOT Socketed<br /> * '''Ethernet:'''<br /> <br /> == Photos ==<br /> <br /> &lt;gallery&gt;<br /> &lt;/gallery&gt;<br /> <br /> <br /> {{PD-self}}</div>

Juri http://www.coreboot.org/File:Gateway_6020GZ_bottom.jpg 2010-02-07T02:09:22Z

<p>Juri: </p> <hr /> <div></div>

Juri http://www.coreboot.org/Gateway_6020GZ 2010-02-07T01:58:51Z

<p>Juri: Created page with 'The Gateway 6020GZ The '''[http://support.gateway.com/s/Mobile/Gateway/6000Series/4991sp3.shtml The Gateway 6020GZ]''' is an older lapto…'</p> <hr /> <div>[[File:gateway 6020GZ bottom.jpg|thumb|The Gateway 6020GZ]]<br /> <br /> The '''[http://support.gateway.com/s/Mobile/Gateway/6000Series/4991sp3.shtml The Gateway 6020GZ]''' is an older laptop with an intel 855 chipset.<br /> <br /> == Hardware ==<br /> <br /> '''Overview:'''<br /> <br /> * '''Northbridge:''' Unknown<br /> * '''Southbridge:''' Unknown<br /> * '''Super I/O:''' Unknown<br /> ** <br /> * '''Audio/video controller:''' <br /> * '''PCMCIA controller:''' <br /> * '''ROM/BIOS chip:''' Socketed<br /> * '''Ethernet:''' <br /> <br /> == Photos ==<br /> <br /> &lt;gallery&gt;<br /> &lt;/gallery&gt;<br /> <br /> <br /> {{PD-self}}</div>

Juri http://www.coreboot.org/Laptop 2010-02-07T01:13:46Z

<p>Juri: </p> <hr /> <div>== Recent Progress of coreboot on Laptops ==<br /> <br /> * coreboot now supports the Roda RK886EX (Rocky III+) Laptop, based on Intel 82945GM/ICH7.<br /> * VIA has recently released open documentation for the VX700 and VX800 chipsets at the [http://linux.via.com.tw/support/downloadFiles.action VIA Download Portal]. <br /> <br /> <br /> == Embedded Controllers ==<br /> <br /> The remaining issue with supporting netbooks may be open firmware support for the Embedded Controller (EC).<br /> These ECs used to support keyboard scan, lid open/closed, battery charging, power management, etc.<br /> <br /> coreboot should work with the &quot;stock&quot; EC firmware. This may still be a challenge because &quot;we don't know what we don't know&quot;. Behavior at runtime is fairly standardized, but we don't know what we need to do for initialization - do we need to set up registers, put in tables, kick things, or will it all Just Work (TM)?<br /> <br /> === Renesas M3885/M3886 ===<br /> <br /> These ECs are supported by coreboot. There are several versions, with flash and with mask roms. Only the flash versions are update-able. These ECs are Family 740 based. A development environment including compiler and simulator is available from Renesas.<br /> <br /> === ENE KB3310/KB3910/KB3920 ===<br /> <br /> Very common ECs in netbooks are the KB3310, KB3910 and KB3920 from [http://www.ene.com.tw/en/index.asp ENE Technology]. The ENE ECs are 8051 based.<br /> <br /> The Quanta IL1 reference design seems to use ENE3310 controller. The q1d25i.rom was examined. The EC code is on 0xFFF00000 on One Mini A110. Its 64KB big HOLE0.ROM. <br /> <br /> More discussion and info on the ENE EC's: <br /> <br /> * ENE [http://wiki.laptop.org/images/a/ab/KB3700-ds-01.pdf KB3700 datasheet].<br /> * [http://forum.eeeuser.com/viewtopic.php?pid=99076 eeeUser Discussion] <br /> * [http://code.google.com/p/eeetune/wiki/KBMemoryMap Memory map of ENE KB3310]<br /> * [https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/ 8051 simulator]<br /> * [http://dev.laptop.org/git?p=projects/olpcflash;a=blob;f=olpcflash.c;hb=HEAD OpenEC Firmware] <br /> * [http://wiki.laptop.org/go/OpenEC OpenEC Project]<br /> * [http://www.cagnulein.com/tmp/eee.c-20080812 Example code] that makes use of the KB3310's &quot;Index IO&quot; access functions.<br /> <br /> === Renesas H8 ===<br /> <br /> Some ECs are H8 based.<br /> <br /> * [http://www.gnuh8.org/ port of the GNU compiler suite to the H8]<br /> * [http://wunderkis.de/h8-gcc/h8tools.tar.gz H8 bootloader]<br /> * [http://h8300-hms.sourceforge.net/ sourceforge project for H8/300]<br /> <br /> == Laptop Survey ==<br /> <br /> This page attempts to list chipsets, Super I/Os, flash chips, and especially [[embedded controller]]s used in various laptops.<br /> <br /> {| border=&quot;0&quot; style=&quot;font-size: smaller&quot;<br /> |- bgcolor=&quot;#6699dd&quot;<br /> ! align=&quot;left&quot; | Vendor<br /> ! align=&quot;left&quot; | Model<br /> ! align=&quot;left&quot; | CPU<br /> ! align=&quot;left&quot; | Chipset (NB/SB)<br /> ! align=&quot;left&quot; | Super&amp;nbsp;I/O<br /> ! align=&quot;left&quot; | [[Embedded controller|EC]]<br /> ! align=&quot;left&quot; | Flash Chip<br /> ! align=&quot;left&quot; | Flash Size<br /> ! align=&quot;left&quot; | Flash S.<br /> ! align=&quot;left&quot; | Flash T.<br /> ! align=&quot;left&quot; | Owner<br /> <br /> |- bgcolor=&quot;#dddddd&quot;<br /> | ASUS || S96F/Z96F || Intel&amp;nbsp;Core&amp;trade;2 Duo T7400 || Intel&amp;nbsp;i945/ICH7 || ITE IT8510E || in Super I/O || ? || ? || ? || ? || [http://www.flashrom.org/pipermail/flashrom/2010-January/001986.html macavity]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Dell || [[Dell Latitude CPi A366XT|Latitude CPi A366XT]] || PII, 360 MHz || Intel 440BX || SMSC&amp;nbsp;FDC37N958FR || in Super I/O || AMD AM29F040B || 512KB || yes || PLCC || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Dell || [[Dell Latitude C610|Latitude C610]] || PIII, 1.2 GHz || Intel i830 || SMSC&amp;nbsp;LPC47N252 || in Super I/O || SST SST49LF004A || 512KB || no || PLCC || [mailto:coreboot@miradou.com CybFr]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Fujitsu-S. || Lifebook S-4572 || PIII, 750 MHz || Intel 82440MX || SMSC FDC37N769 || ? || Fujitsu&amp;nbsp;MBM29F400T&lt;sup&gt;1&lt;/sup&gt; || ? || no || TSOP(?) || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Fujitsu-S. || Lifebook S7110 || Intel&amp;nbsp;Core&amp;trade;2 Duo T7200 || Intel&amp;nbsp;i945/ICH7 || SMSC&amp;nbsp;LPC47N217 || Fujitsu MB90378 || Spansion S25FL008A&lt;sup&gt;2&lt;/sup&gt; || 1024 kB || no || SO8 / SPI || twice11<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Gericom || Webboy 340S2 || PIII || SiS630 || NSC PC87393VJG || NSC PC87570 || Winbond&amp;nbsp;29C020 || 256 kB || yes || PLCC || [http://thread.gmane.org/gmane.linux.bios/13081 NS]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Gateway || [[Gateway 6020GZ|6020GZ]] || Celeron M || Intel 855GME || ?? || ?? || ?? || ?? || ?? || ?? || [[User:Juri|Juri]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Highscreen || XD 14-C1700 || Intel&amp;nbsp;Celeron&amp;nbsp;1.7&amp;nbsp;GHz || SiS650 || NSC&amp;nbsp;PC87391(?) || ? || EON EN29F040(A) || 512 kB || yes || PLCC || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | HP || Omnibook XE3(L) || PIII, 750 MHz || Intel&amp;nbsp;82371MB/PIIX4M || SMSC&amp;nbsp;FDC37N869 || NSC&amp;nbsp;PC87570 || SST 28SF040A || 512 kB || no || PLCC || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | IBM || Thinkpad T30 || Intel P4 Mobile, 1.8 GHz || Intel&amp;nbsp;i845/ICH3-M || NSC&amp;nbsp;PC87392 || Renesas H8S&amp;nbsp;64F3169ATE10 || ST&amp;nbsp;M50FW080N5 || 1024 kB || no || TSOP40 / FWH || edgecase<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | One || [http://www.a110wiki.de A110] || VIA&amp;nbsp;C7-M&amp;nbsp;ULV&amp;nbsp;1.0&amp;nbsp;GHz || VIA VX800 || none || ENE KB3310 || ? || ? || no || ? || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Panasonic || Toughbook&amp;nbsp;CF-25 || P166MMX || FW82439TX&amp;nbsp;(430TX)/FW82371AB || NSC PC87336VJG || Renesas&amp;nbsp;3886 || SST SST29EE020 || 256 kB || no || ? || [[User:Miernik|Miernik]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Roda || Rocky III+ RK886EX || Intel&amp;reg;&amp;nbsp;Core 2 Duo Mobile T5500 || Intel 945 / ICH7 || SMSC&amp;reg;&amp;nbsp;LPC47N227 || Renesas&amp;nbsp;M38859 || ? || ? || ? || ? || ?<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Roda || Rocky II+ RT686 || Intel&amp;nbsp;Pentium III || Intel 430BX / FW82371EB || SMSC&amp;reg;&amp;nbsp;FDC37N769 || Renesas&amp;nbsp;M38867M8A || SST SST29LE020 || 256KB || yes || PLCC/parallel || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Sony || Vaio&amp;nbsp;Picturebook&amp;nbsp;PCG-C1XD || P2 400 || 443ZX || ? || ? || ST M29W004BT || 512 kB || no || || [[User:Miernik|Miernik]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Sony || Vaio&amp;nbsp;Picturebook&amp;nbsp;PCG-C1X || P266MMX || 430TX || ? || ? || ? || ? || ? || ? || [[User:Miernik|Miernik]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Toshiba || Libretto&amp;nbsp;50M PA1243CM || P133 || custom FPGA || ? || ? || ? || ? || ? || ? || [[User:Miernik|Miernik]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Toshiba || Satellite&amp;nbsp;A80-117 || Intel&amp;nbsp;Celeron || Intel&amp;nbsp;915GM/ICH6 || SMSC&amp;nbsp;LPC47N217 || ENE KB910 || ? || 1024 kB || no || TSOP (?) || [[User:Uwe|UH]]<br /> <br /> |}<br /> <br /> &lt;small&gt;<br /> &lt;sup&gt;1&lt;/sup&gt; According to the vendor BIOS update tool.&lt;br /&gt;<br /> &lt;sup&gt;2&lt;/sup&gt; Nice thing: EC/Flash is not shared, so you can erase the whole flash during system operation (this was tested).&lt;br /&gt;<br /> &lt;/small&gt;<br /> <br /> Further Links:<br /> <br /> * [http://tuxmobil.org/mylaptops.html Tuxmobil Laptop Survey]<br /> * [http://mcelrath.org/laptops.html Laptops/Notebooks with Linux Preinstalled]<br /> * [http://www.fsf.org/campaigns/free-bios.html The Free Software Foundation's Campaign for Free BIOS]<br /> <br /> == Mailinglist Discussion ==<br /> <br /> A few earlier coreboot discussions on laptops are linked here, you might get useful information out of them: <br /> <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-February/010985.html Any update on coreboot for laptops] <br /> *[http://comments.gmane.org/gmane.linux.bios/13081 Notebook 340s2 (sis630) 256k Flash] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-February/010972.html yet another reason to use coreboot in laptops I guess] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-April/011429.html coreboot laptop hunt wiki page] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-March/011140.html HP Pavillion ZV5000 (Laptop)] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-July/011942.html SA1100] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2003-September/004954.html Laptop with Sis 650 chipset] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2006-September/015551.html coreboot on Laptops]<br /> <br /> <br /> == Who really makes your laptop? ==<br /> <br /> There are several various brands of laptops, but there are only a few actual laptop makers.<br /> <br /> Name brand companies like Hewlet Packard, Compaq, IBM, Dell, Gateway, Sony, Micron, Toshiba and others; including Alienware and Voodoo do not make their own laptops. The exceptions are Asus and Apple, and even Apple doesn't make all of their laptops.<br /> <br /> Original Design Manufacturers (ODM) make the laptops for Original Equipment Manufacturers (OEM). They in turn, add their preloaded hard drives and sell them to consumers. This is why a laptop is a bit more complicated to support with coreboot. The OEM's may not even have all the specifications for the laptop since the ODM has done all the design and assembly.<br /> <br /> Some Laptop ODMs are:<br /> <br /> * [http://www.quantatw.com Quanta] makes laptops for Sony, Dell, and IBM <br /> * [http://www.inventec.com/ Inventec] and [http://www.arima.com.tw/ Arima] make the Compaq line<br /> * [http://www.compal.com/ Compal] also makes IBM and Dell lines, as well as Hewlett Packard<br /> * [http://www.clevo.com.tw/ Clevo] makes the popular Alienware and Voodoo gaming laptops<br /> <br /> Further Links:<br /> <br /> * [http://www.laptopworldwide.com/laptops.html Makers of Laptops]<br /> * [http://tuxmobil.org/laptop_oem.html Laptop and NoteBook Manufacturer - OEM/ODM Relation Matrix]<br /> * [http://tuxmobil.org/reseller.html Where to Buy a Preinstalled Linux Laptop, Notebook, Mobile Phone or PDA? - Vendor Overview]<br /> <br /> <br /> == Random Product Links ==<br /> <br /> VIA has a list of many netbooks at [http://via.com.tw/en/products/notebook/notebook.jsp VIA Partner Mobility Devices]. <br /> <br /> VIA also has information on other mobile platforms at [http://via.com.tw/en/products/notebook/index.jsp VIA Mobility Platform]. <br /> <br /> The [http://www.a110wiki.de/wiki/Main_Page Quanta IL1] vx800 based reference design covers similar models/clones such as: <br /> <br /> *[http://www.one.de/shop/one-notebooks-one-mini-notebooks-c-213_214.html One Mini A110/A115/A120/A140/A150/A470] <br /> *[http://preview.tinyurl.com/5zbzl6 Airis Kira 100/350/740] <br /> *[http://www.norhtec.com/products/gecko/index.html Norhtec Gecko] <br /> *[http://www.pioneercomputers.com.au/products/configure.asp?c1=3&amp;c2=12&amp;id=2458 Pioneer DreamBook Light IL1] <br /> *[http://www.ctlcorp.com/v4/p-697-ctl-il1a-89-netbook-with-windows-xp-home.aspx CTL IL1] More [http://www.a110wiki.de/wiki/CTL_IL1 CTL IL1 info] with tear-down pics. <br /> *[http://www.aci-asia.com/html/Ethos_7.html ACi Ethos 7] <br /> *[http://www.ilikeblue.net/products/umpc.htm BDSI Deep Blue H1]<br /> <br /> Other vx800 based netbooks: <br /> <br /> *[http://www.everex.com/products/cloudbook_max/cloudbook_max.htm Everex CloudBook MAX] <br /> *[http://www.fic.com.tw/product/ce2a1.aspx FIC CE2A1]<br /> <br /> There are still a few netbook designs currently on the market that use the VIA vx700 chipset. <br /> <br /> *[http://www.sylvaniacomputers.com/products.php?p=g Sylvania G] <br /> *[http://www.everex.com/products/cloudbook/cloudbook.htm Everex Cloudbook] <br /> *[http://www.fic.com.tw/product/ce260.aspx FIC CE260] <br /> *[http://www.fic.com.tw/product/ce268.aspx FIC CE268]<br /> <br /> There are also several AMD 690/600 laptops still available that may be candidates as well: <br /> <br /> *[http://reviews.cnet.com/laptops/acer-extensa-4420-5963/4505-3121_7-33361062.html Acer Extensa 4420] <br /> *[http://www.raondigital.com EVERUN NOTE]<br /> <br /> Intel Atom with i945 chipset netbooks: <br /> <br /> *[http://en.wikipedia.org/wiki/Aspire_One Acer Aspire One] <br /> *[http://en.wikipedia.org/wiki/MSI_Wind_PC MSI Wind] <br /> *[http://en.wikipedia.org/wiki/ASUS_Eee_PC ASUS eeePC]</div>

Juri http://www.coreboot.org/Laptop 2010-02-07T01:10:13Z

<p>Juri: </p> <hr /> <div>== Recent Progress of coreboot on Laptops ==<br /> <br /> * coreboot now supports the Roda RK886EX (Rocky III+) Laptop, based on Intel 82945GM/ICH7.<br /> * VIA has recently released open documentation for the VX700 and VX800 chipsets at the [http://linux.via.com.tw/support/downloadFiles.action VIA Download Portal]. <br /> <br /> <br /> == Embedded Controllers ==<br /> <br /> The remaining issue with supporting netbooks may be open firmware support for the Embedded Controller (EC).<br /> These ECs used to support keyboard scan, lid open/closed, battery charging, power management, etc.<br /> <br /> coreboot should work with the &quot;stock&quot; EC firmware. This may still be a challenge because &quot;we don't know what we don't know&quot;. Behavior at runtime is fairly standardized, but we don't know what we need to do for initialization - do we need to set up registers, put in tables, kick things, or will it all Just Work (TM)?<br /> <br /> === Renesas M3885/M3886 ===<br /> <br /> These ECs are supported by coreboot. There are several versions, with flash and with mask roms. Only the flash versions are update-able. These ECs are Family 740 based. A development environment including compiler and simulator is available from Renesas.<br /> <br /> === ENE KB3310/KB3910/KB3920 ===<br /> <br /> Very common ECs in netbooks are the KB3310, KB3910 and KB3920 from [http://www.ene.com.tw/en/index.asp ENE Technology]. The ENE ECs are 8051 based.<br /> <br /> The Quanta IL1 reference design seems to use ENE3310 controller. The q1d25i.rom was examined. The EC code is on 0xFFF00000 on One Mini A110. Its 64KB big HOLE0.ROM. <br /> <br /> More discussion and info on the ENE EC's: <br /> <br /> * ENE [http://wiki.laptop.org/images/a/ab/KB3700-ds-01.pdf KB3700 datasheet].<br /> * [http://forum.eeeuser.com/viewtopic.php?pid=99076 eeeUser Discussion] <br /> * [http://code.google.com/p/eeetune/wiki/KBMemoryMap Memory map of ENE KB3310]<br /> * [https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/ 8051 simulator]<br /> * [http://dev.laptop.org/git?p=projects/olpcflash;a=blob;f=olpcflash.c;hb=HEAD OpenEC Firmware] <br /> * [http://wiki.laptop.org/go/OpenEC OpenEC Project]<br /> * [http://www.cagnulein.com/tmp/eee.c-20080812 Example code] that makes use of the KB3310's &quot;Index IO&quot; access functions.<br /> <br /> === Renesas H8 ===<br /> <br /> Some ECs are H8 based.<br /> <br /> * [http://www.gnuh8.org/ port of the GNU compiler suite to the H8]<br /> * [http://wunderkis.de/h8-gcc/h8tools.tar.gz H8 bootloader]<br /> * [http://h8300-hms.sourceforge.net/ sourceforge project for H8/300]<br /> <br /> == Laptop Survey ==<br /> <br /> This page attempts to list chipsets, Super I/Os, flash chips, and especially [[embedded controller]]s used in various laptops.<br /> <br /> {| border=&quot;0&quot; style=&quot;font-size: smaller&quot;<br /> |- bgcolor=&quot;#6699dd&quot;<br /> ! align=&quot;left&quot; | Vendor<br /> ! align=&quot;left&quot; | Model<br /> ! align=&quot;left&quot; | CPU<br /> ! align=&quot;left&quot; | Chipset (NB/SB)<br /> ! align=&quot;left&quot; | Super&amp;nbsp;I/O<br /> ! align=&quot;left&quot; | [[Embedded controller|EC]]<br /> ! align=&quot;left&quot; | Flash Chip<br /> ! align=&quot;left&quot; | Flash Size<br /> ! align=&quot;left&quot; | Flash S.<br /> ! align=&quot;left&quot; | Flash T.<br /> ! align=&quot;left&quot; | Owner<br /> <br /> |- bgcolor=&quot;#dddddd&quot;<br /> | ASUS || S96F/Z96F || Intel&amp;nbsp;Core&amp;trade;2 Duo T7400 || Intel&amp;nbsp;i945/ICH7 || ITE IT8510E || in Super I/O || ? || ? || ? || ? || [http://www.flashrom.org/pipermail/flashrom/2010-January/001986.html macavity]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Dell || [[Dell Latitude CPi A366XT|Latitude CPi A366XT]] || PII, 360 MHz || Intel 440BX || SMSC&amp;nbsp;FDC37N958FR || in Super I/O || AMD AM29F040B || 512KB || yes || PLCC || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Dell || [[Dell Latitude C610|Latitude C610]] || PIII, 1.2 GHz || Intel i830 || SMSC&amp;nbsp;LPC47N252 || in Super I/O || SST SST49LF004A || 512KB || no || PLCC || [mailto:coreboot@miradou.com CybFr]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Fujitsu-S. || Lifebook S-4572 || PIII, 750 MHz || Intel 82440MX || SMSC FDC37N769 || ? || Fujitsu&amp;nbsp;MBM29F400T&lt;sup&gt;1&lt;/sup&gt; || ? || no || TSOP(?) || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Fujitsu-S. || Lifebook S7110 || Intel&amp;nbsp;Core&amp;trade;2 Duo T7200 || Intel&amp;nbsp;i945/ICH7 || SMSC&amp;nbsp;LPC47N217 || Fujitsu MB90378 || Spansion S25FL008A&lt;sup&gt;2&lt;/sup&gt; || 1024 kB || no || SO8 / SPI || twice11<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Gericom || Webboy 340S2 || PIII || SiS630 || NSC PC87393VJG || NSC PC87570 || Winbond&amp;nbsp;29C020 || 256 kB || yes || PLCC || [http://thread.gmane.org/gmane.linux.bios/13081 NS]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Gateway || 6020GZ || Celeron M || Intel 855GME || ?? || ?? || ?? || ?? || ?? || ?? || [[User:Juri]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Highscreen || XD 14-C1700 || Intel&amp;nbsp;Celeron&amp;nbsp;1.7&amp;nbsp;GHz || SiS650 || NSC&amp;nbsp;PC87391(?) || ? || EON EN29F040(A) || 512 kB || yes || PLCC || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | HP || Omnibook XE3(L) || PIII, 750 MHz || Intel&amp;nbsp;82371MB/PIIX4M || SMSC&amp;nbsp;FDC37N869 || NSC&amp;nbsp;PC87570 || SST 28SF040A || 512 kB || no || PLCC || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | IBM || Thinkpad T30 || Intel P4 Mobile, 1.8 GHz || Intel&amp;nbsp;i845/ICH3-M || NSC&amp;nbsp;PC87392 || Renesas H8S&amp;nbsp;64F3169ATE10 || ST&amp;nbsp;M50FW080N5 || 1024 kB || no || TSOP40 / FWH || edgecase<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | One || [http://www.a110wiki.de A110] || VIA&amp;nbsp;C7-M&amp;nbsp;ULV&amp;nbsp;1.0&amp;nbsp;GHz || VIA VX800 || none || ENE KB3310 || ? || ? || no || ? || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Panasonic || Toughbook&amp;nbsp;CF-25 || P166MMX || FW82439TX&amp;nbsp;(430TX)/FW82371AB || NSC PC87336VJG || Renesas&amp;nbsp;3886 || SST SST29EE020 || 256 kB || no || ? || [[User:Miernik|Miernik]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Roda || Rocky III+ RK886EX || Intel&amp;reg;&amp;nbsp;Core 2 Duo Mobile T5500 || Intel 945 / ICH7 || SMSC&amp;reg;&amp;nbsp;LPC47N227 || Renesas&amp;nbsp;M38859 || ? || ? || ? || ? || ?<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Roda || Rocky II+ RT686 || Intel&amp;nbsp;Pentium III || Intel 430BX / FW82371EB || SMSC&amp;reg;&amp;nbsp;FDC37N769 || Renesas&amp;nbsp;M38867M8A || SST SST29LE020 || 256KB || yes || PLCC/parallel || [[User:Uwe|UH]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Sony || Vaio&amp;nbsp;Picturebook&amp;nbsp;PCG-C1XD || P2 400 || 443ZX || ? || ? || ST M29W004BT || 512 kB || no || || [[User:Miernik|Miernik]]<br /> |- bgcolor=&quot;#dddddd&quot;<br /> | Sony || Vaio&amp;nbsp;Picturebook&amp;nbsp;PCG-C1X || P266MMX || 430TX || ? || ? || ? || ? || ? || ? || [[User:Miernik|Miernik]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Toshiba || Libretto&amp;nbsp;50M PA1243CM || P133 || custom FPGA || ? || ? || ? || ? || ? || ? || [[User:Miernik|Miernik]]<br /> |- bgcolor=&quot;#eeeeee&quot;<br /> | Toshiba || Satellite&amp;nbsp;A80-117 || Intel&amp;nbsp;Celeron || Intel&amp;nbsp;915GM/ICH6 || SMSC&amp;nbsp;LPC47N217 || ENE KB910 || ? || 1024 kB || no || TSOP (?) || [[User:Uwe|UH]]<br /> <br /> |}<br /> <br /> &lt;small&gt;<br /> &lt;sup&gt;1&lt;/sup&gt; According to the vendor BIOS update tool.&lt;br /&gt;<br /> &lt;sup&gt;2&lt;/sup&gt; Nice thing: EC/Flash is not shared, so you can erase the whole flash during system operation (this was tested).&lt;br /&gt;<br /> &lt;/small&gt;<br /> <br /> Further Links:<br /> <br /> * [http://tuxmobil.org/mylaptops.html Tuxmobil Laptop Survey]<br /> * [http://mcelrath.org/laptops.html Laptops/Notebooks with Linux Preinstalled]<br /> * [http://www.fsf.org/campaigns/free-bios.html The Free Software Foundation's Campaign for Free BIOS]<br /> <br /> == Mailinglist Discussion ==<br /> <br /> A few earlier coreboot discussions on laptops are linked here, you might get useful information out of them: <br /> <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-February/010985.html Any update on coreboot for laptops] <br /> *[http://comments.gmane.org/gmane.linux.bios/13081 Notebook 340s2 (sis630) 256k Flash] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-February/010972.html yet another reason to use coreboot in laptops I guess] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-April/011429.html coreboot laptop hunt wiki page] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-March/011140.html HP Pavillion ZV5000 (Laptop)] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2005-July/011942.html SA1100] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2003-September/004954.html Laptop with Sis 650 chipset] <br /> *[http://www.coreboot.org/pipermail/linuxbios/2006-September/015551.html coreboot on Laptops]<br /> <br /> <br /> == Who really makes your laptop? ==<br /> <br /> There are several various brands of laptops, but there are only a few actual laptop makers.<br /> <br /> Name brand companies like Hewlet Packard, Compaq, IBM, Dell, Gateway, Sony, Micron, Toshiba and others; including Alienware and Voodoo do not make their own laptops. The exceptions are Asus and Apple, and even Apple doesn't make all of their laptops.<br /> <br /> Original Design Manufacturers (ODM) make the laptops for Original Equipment Manufacturers (OEM). They in turn, add their preloaded hard drives and sell them to consumers. This is why a laptop is a bit more complicated to support with coreboot. The OEM's may not even have all the specifications for the laptop since the ODM has done all the design and assembly.<br /> <br /> Some Laptop ODMs are:<br /> <br /> * [http://www.quantatw.com Quanta] makes laptops for Sony, Dell, and IBM <br /> * [http://www.inventec.com/ Inventec] and [http://www.arima.com.tw/ Arima] make the Compaq line<br /> * [http://www.compal.com/ Compal] also makes IBM and Dell lines, as well as Hewlett Packard<br /> * [http://www.clevo.com.tw/ Clevo] makes the popular Alienware and Voodoo gaming laptops<br /> <br /> Further Links:<br /> <br /> * [http://www.laptopworldwide.com/laptops.html Makers of Laptops]<br /> * [http://tuxmobil.org/laptop_oem.html Laptop and NoteBook Manufacturer - OEM/ODM Relation Matrix]<br /> * [http://tuxmobil.org/reseller.html Where to Buy a Preinstalled Linux Laptop, Notebook, Mobile Phone or PDA? - Vendor Overview]<br /> <br /> <br /> == Random Product Links ==<br /> <br /> VIA has a list of many netbooks at [http://via.com.tw/en/products/notebook/notebook.jsp VIA Partner Mobility Devices]. <br /> <br /> VIA also has information on other mobile platforms at [http://via.com.tw/en/products/notebook/index.jsp VIA Mobility Platform]. <br /> <br /> The [http://www.a110wiki.de/wiki/Main_Page Quanta IL1] vx800 based reference design covers similar models/clones such as: <br /> <br /> *[http://www.one.de/shop/one-notebooks-one-mini-notebooks-c-213_214.html One Mini A110/A115/A120/A140/A150/A470] <br /> *[http://preview.tinyurl.com/5zbzl6 Airis Kira 100/350/740] <br /> *[http://www.norhtec.com/products/gecko/index.html Norhtec Gecko] <br /> *[http://www.pioneercomputers.com.au/products/configure.asp?c1=3&amp;c2=12&amp;id=2458 Pioneer DreamBook Light IL1] <br /> *[http://www.ctlcorp.com/v4/p-697-ctl-il1a-89-netbook-with-windows-xp-home.aspx CTL IL1] More [http://www.a110wiki.de/wiki/CTL_IL1 CTL IL1 info] with tear-down pics. <br /> *[http://www.aci-asia.com/html/Ethos_7.html ACi Ethos 7] <br /> *[http://www.ilikeblue.net/products/umpc.htm BDSI Deep Blue H1]<br /> <br /> Other vx800 based netbooks: <br /> <br /> *[http://www.everex.com/products/cloudbook_max/cloudbook_max.htm Everex CloudBook MAX] <br /> *[http://www.fic.com.tw/product/ce2a1.aspx FIC CE2A1]<br /> <br /> There are still a few netbook designs currently on the market that use the VIA vx700 chipset. <br /> <br /> *[http://www.sylvaniacomputers.com/products.php?p=g Sylvania G] <br /> *[http://www.everex.com/products/cloudbook/cloudbook.htm Everex Cloudbook] <br /> *[http://www.fic.com.tw/product/ce260.aspx FIC CE260] <br /> *[http://www.fic.com.tw/product/ce268.aspx FIC CE268]<br /> <br /> There are also several AMD 690/600 laptops still available that may be candidates as well: <br /> <br /> *[http://reviews.cnet.com/laptops/acer-extensa-4420-5963/4505-3121_7-33361062.html Acer Extensa 4420] <br /> *[http://www.raondigital.com EVERUN NOTE]<br /> <br /> Intel Atom with i945 chipset netbooks: <br /> <br /> *[http://en.wikipedia.org/wiki/Aspire_One Acer Aspire One] <br /> *[http://en.wikipedia.org/wiki/MSI_Wind_PC MSI Wind] <br /> *[http://en.wikipedia.org/wiki/ASUS_Eee_PC ASUS eeePC]</div>

Juri http://www.coreboot.org/Supported_Chipsets_and_Devices 2009-04-16T18:15:07Z

<p>Juri: link to 440bx chipset information page at intel</p> <hr /> <div>Note: If a device is not supported by coreboot v2, try [[Supported_Chipsets_and_Devices#Devices_supported_in_coreboot_v1|checking coreboot v1]] for support. Do '''not''' attempt to use coreboot v3 &amp;mdash; this is an early development version which is not ready for production use, yet.<br /> <br /> See also [[Supported Motherboards]].<br /> <br /> == Devices supported in coreboot v3 ==<br /> <br /> &lt;div style=&quot;color: #ff0000&quot;&gt;coreboot v3 is an alpha-stage development version of coreboot and is not meant for production use, yet!&lt;/div&gt;<br /> <br /> {| border=&quot;0&quot; valign=&quot;top&quot;<br /> | valign=&quot;top&quot;|<br /> <br /> '''Northbridges'''<br /> <br /> {| border=&quot;0&quot; style=&quot;font-size: smaller&quot; valign=&quot;top&quot;<br /> |- bgcolor=&quot;#6699dd&quot;<br /> ! align=&quot;left&quot; | Vendor<br /> ! align=&quot;left&quot; | Northbridge<br /> ! align=&quot;left&quot; | Status<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | Geode&amp;nbsp;LX<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | Geode&amp;nbsp;K8<br /> | style=&quot;background:orange&quot; | WIP<br /> <br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82443BX&amp;nbsp;(440BX)<br /> | style=&quot;background:orange&quot; | WIP<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 945<br /> | style=&quot;background:orange&quot; | WIP<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | VIA<br /> | CN700<br /> | style=&quot;background:orange&quot; | WIP<br /> <br /> |}<br /> <br /> | valign=&quot;top&quot;|<br /> <br /> '''Southbridges'''<br /> <br /> {| border=&quot;0&quot; style=&quot;font-size: smaller&quot; valign=&quot;top&quot;<br /> |- bgcolor=&quot;#6699dd&quot;<br /> ! align=&quot;left&quot; | Vendor<br /> ! align=&quot;left&quot; | Southbridge<br /> ! align=&quot;left&quot; | Status<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | AMD-8111<br /> | style=&quot;background:yellow&quot; | ?<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | AMD-8132<br /> | style=&quot;background:yellow&quot; | ?<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | AMD-8151<br /> | style=&quot;background:yellow&quot; | ?<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | CS5536<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | RS690<br /> | style=&quot;background: lime &quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | SB600<br /> | style=&quot;background: lime &quot; | OK<br /> <br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82371EB&amp;nbsp;(PIIX4E)<br /> | style=&quot;background:orange&quot; | WIP<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82801GX&amp;nbsp;(ICH7)<br /> | style=&quot;background:orange&quot; | WIP<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | NVIDIA<br /> | MCP55<br /> | style=&quot;background:orange&quot; | WIP&lt;sup&gt;1&lt;/sup&gt;<br /> <br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT8237R<br /> | style=&quot;background:orange&quot; | WIP<br /> <br /> |}<br /> <br /> | valign=&quot;top&quot;|<br /> <br /> '''Super I/Os'''<br /> <br /> {| border=&quot;0&quot; style=&quot;font-size: smaller&quot; valign=&quot;top&quot;<br /> |- bgcolor=&quot;#6699dd&quot;<br /> ! align=&quot;left&quot; | Vendor<br /> ! align=&quot;left&quot; | Super&amp;nbsp;I/O<br /> ! align=&quot;left&quot; | Status<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Fintek<br /> | F71805F<br /> | style=&quot;background:orange&quot; | WIP<br /> <br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | ITE<br /> | IT8712F<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | ITE<br /> | IT8716F<br /> | style=&quot;background:lime&quot; | OK<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT1211<br /> | style=&quot;background:orange&quot; | WIP<br /> <br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Winbond&amp;trade;<br /> | W83627HF<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Winbond&amp;trade;<br /> | W83627THG<br /> | style=&quot;background:lime&quot; | OK<br /> <br /> |}<br /> <br /> | valign=&quot;top&quot;|<br /> <br /> '''CPUs'''<br /> <br /> {| border=&quot;0&quot; style=&quot;font-size: smaller&quot;<br /> |- bgcolor=&quot;#6699dd&quot;<br /> ! align=&quot;left&quot; | Type<br /> ! align=&quot;left&quot; | CPU<br /> ! align=&quot;left&quot; | Status<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | Geode LX<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | K8<br /> | style=&quot;background:orange&quot; | WIP<br /> <br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Generic<br /> | i586<br /> | style=&quot;background:orange&quot; | WIP<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel<br /> | Core Duo / Core 2 Duo<br /> | style=&quot;background:orange&quot; | WIP<br /> <br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | VIA<br /> | C7<br /> | style=&quot;background:orange&quot; | WIP<br /> <br /> |}<br /> <br /> |}<br /> <br /> &lt;small&gt;<br /> &lt;sup&gt;1&lt;/sup&gt; MCP55 and CK804 are supported, but no open documents are available from NVIDIA.<br /> &lt;/small&gt;<br /> <br /> == Devices supported in coreboot v2 ==<br /> <br /> {| border=&quot;0&quot; valign=&quot;top&quot;<br /> | valign=&quot;top&quot;|<br /> <br /> '''Northbridges'''<br /> <br /> {| border=&quot;0&quot; style=&quot;font-size: smaller&quot; valign=&quot;top&quot;<br /> |- bgcolor=&quot;#6699dd&quot;<br /> ! align=&quot;left&quot; | Vendor<br /> ! align=&quot;left&quot; | Northbridge<br /> ! align=&quot;left&quot; | Status<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | Fam10<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;16&lt;/sup&gt;<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | K8<br /> | style=&quot;background: lime &quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | GX1<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | GX&amp;nbsp;(GX2)<br /> | style=&quot;background: lime&quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | LX<br /> | style=&quot;background: lime&quot; | OK<br /> <br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | IBM<br /> | CPC710<br /> | style=&quot;background:#dddddd&quot; | ?<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | IBM<br /> | CPC925<br /> | style=&quot;background:#dddddd&quot; | ?<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | E7501<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | E7520<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | E7525<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82810<br /> | style=&quot;background:yellow&quot; | WIP&lt;sup&gt;9&lt;/sup&gt;<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82830<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82443BX&amp;nbsp;([http://developer.intel.com/design/chipsets/440bx/ 440BX])<br /> | style=&quot;background:yellow&quot; | WIP&lt;sup&gt;11&lt;/sup&gt;<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82855PM<br /> | style=&quot;background:red&quot; | WIP&lt;sup&gt;2&lt;/sup&gt;<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 3100<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | EP80579 (Tolapai)<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 945<br /> | style=&quot;background:lime&quot; | OK<br /> <br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Motorola<br /> | MPC107<br /> | style=&quot;background:#dddddd&quot; | ?<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | SiS<br /> | SiS761GX<br /> | style=&quot;background:lime&quot; | OK<br /> <br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT8601 (PLE133)<br /> | style=&quot;background:yellow&quot; | WIP<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT8623 (CLE266)<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | VIA<br /> | K8T890<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | VIA<br /> | K8M890<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | VIA<br /> | CN700<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;14&lt;/sup&gt;<br /> <br /> |}<br /> <br /> | valign=&quot;top&quot;|<br /> <br /> '''Southbridges'''<br /> <br /> {| border=&quot;0&quot; style=&quot;font-size: smaller&quot; valign=&quot;top&quot;<br /> |- bgcolor=&quot;#6699dd&quot;<br /> ! align=&quot;left&quot; | Vendor<br /> ! align=&quot;left&quot; | Southbridge<br /> ! align=&quot;left&quot; | Status<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | AMD8111<br /> | style=&quot;background: lime&quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | AMD8131<br /> | style=&quot;background: lime&quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | AMD8132<br /> | style=&quot;background: lime&quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | AMD8151<br /> | style=&quot;background: lime&quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | CS5530/CS5530A<br /> | style=&quot;background:yellow&quot; | WIP<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | CS5535<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | CS5536<br /> | style=&quot;background: lime &quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | RS690<br /> | style=&quot;background: lime &quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | SB600<br /> | style=&quot;background: lime &quot; | OK<br /> <br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Broadcom<br /> | BCM5780<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Broadcom<br /> | BCM5785<br /> | style=&quot;background:lime&quot; | OK<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 6300ESB (ESB6300)<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82371EB&amp;nbsp;(PIIX4E)<br /> | style=&quot;background:yellow&quot; | WIP&lt;sup&gt;6&lt;/sup&gt;<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82801AA/AB&amp;nbsp;(ICH/ICH0)<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;10&lt;/sup&gt;<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82801BA/BAM&amp;nbsp;(ICH2/ICH2-M)<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;10&lt;/sup&gt;<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82801CA/CAM&amp;nbsp;(ICH3-S/ICH3-M)<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;10&lt;/sup&gt;<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82801DB/DBL/DBM&lt;br/&gt;(ICH4/ICH4-L/ICH4-M)<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;10&lt;/sup&gt;<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82801EB/ER&amp;nbsp;(ICH5/ICH5R)<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;10&lt;/sup&gt;<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82870<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | PXHD<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 3100<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | EP80579 (Tolapai)<br /> | style=&quot;background:lime&quot; | OK<br /> <br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | NVIDIA<br /> | CK804<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;17&lt;/sup&gt;<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | NVIDIA<br /> | MCP55<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;17&lt;/sup&gt;<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Ricoh<br /> | RL5C476<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> <br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SiS<br /> | SiS966(L)<br /> | style=&quot;background:lime&quot; | OK<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT8231<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT8235<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT8237R<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT8237A<br /> | style=&quot;background:red&quot; | WIP<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT8237S<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT82C686<br /> | style=&quot;background:lime&quot; | OK<br /> <br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Winbond&amp;trade;<br /> | W83C553<br /> | style=&quot;background:#dddddd&quot; | ?<br /> <br /> |}<br /> <br /> | valign=&quot;top&quot;|<br /> <br /> '''Super I/Os'''<br /> <br /> {| border=&quot;0&quot; style=&quot;font-size: smaller&quot; valign=&quot;top&quot;<br /> |- bgcolor=&quot;#6699dd&quot;<br /> ! align=&quot;left&quot; | Vendor<br /> ! align=&quot;left&quot; | Super&amp;nbsp;I/O<br /> ! align=&quot;left&quot; | Status<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | ASUS<br /> | A8000<br /> | style=&quot;background:lime&quot; | &lt;sup&gt;12&lt;/sup&gt;, &lt;sup&gt;13&lt;/sup&gt;<br /> <br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Fintek<br /> | F71805F/FG<br /> | style=&quot;background:lime&quot; | OK<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | ITE<br /> | IT8661F<br /> | style=&quot;background:yellow&quot; | OK &lt;sup&gt;1&lt;/sup&gt;<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | ITE<br /> | IT8671F<br /> | style=&quot;background:yellow&quot; | OK &lt;sup&gt;1&lt;/sup&gt;<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | ITE<br /> | IT8673F<br /> | style=&quot;background:yellow&quot; | OK &lt;sup&gt;1&lt;/sup&gt;<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | ITE<br /> | IT8705F<br /> | style=&quot;background:yellow&quot; | OK &lt;sup&gt;1&lt;/sup&gt;<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | ITE<br /> | IT8712F<br /> | style=&quot;background:lime&quot; | OK &lt;sup&gt;8&lt;/sup&gt;<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | ITE<br /> | IT8716F<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | ITE<br /> | IT8718F<br /> | style=&quot;background:yellow&quot; | OK &lt;sup&gt;1&lt;/sup&gt;<br /> <br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 3100<br /> | style=&quot;background:lime&quot; | OK &lt;sup&gt;15&lt;/sup&gt;<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | EP80579 (Tolapai)<br /> | style=&quot;background:lime&quot; | OK &lt;sup&gt;15&lt;/sup&gt;<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | NSC<br /> | PC8374<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | NSC<br /> | PC87309<br /> | style=&quot;background:yellow&quot; | OK &lt;sup&gt;5&lt;/sup&gt;<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | NSC<br /> | PC87351<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | NSC<br /> | PC87360<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | NSC<br /> | PC87366<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | NSC<br /> | PC87417<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | NSC<br /> | PC87427<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | NSC<br /> | PC97307 <br /> | style=&quot;background:#eeeeee&quot; | ?<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | NSC<br /> | PC97317<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> <br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SMSC&amp;reg;<br /> | FDC37M70x<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;12&lt;/sup&gt;<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SMSC&amp;reg;<br /> | FDC37B80x<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;12&lt;/sup&gt;<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SMSC&amp;reg;<br /> | FDC37B78x<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;12&lt;/sup&gt;<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SMSC&amp;reg;<br /> | FDC37B72x<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;12&lt;/sup&gt;<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SMSC&amp;reg;<br /> | FDC37B81x<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;12&lt;/sup&gt;<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SMSC&amp;reg;<br /> | FDC37M60x<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;3&lt;/sup&gt;,&lt;sup&gt;12&lt;/sup&gt;<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SMSC&amp;reg;<br /> | LPC47B27x<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;7&lt;/sup&gt;,&lt;sup&gt;12&lt;/sup&gt;<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SMSC&amp;reg;<br /> | LPC47M10x<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;12&lt;/sup&gt;<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SMSC&amp;reg;<br /> | LPC47M112<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;12&lt;/sup&gt;<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SMSC&amp;reg;<br /> | LPC47M13x<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;12&lt;/sup&gt;<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SMSC&amp;reg;<br /> | LPC47M15x<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;12&lt;/sup&gt;<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SMSC&amp;reg;<br /> | LPC47M192<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;12&lt;/sup&gt;<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SMSC&amp;reg;<br /> | LPC47B397<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;12&lt;/sup&gt;<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SMSC&amp;reg;<br /> | DME1737<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;12&lt;/sup&gt;<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SMSC&amp;reg;<br /> | SCH5307<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;12&lt;/sup&gt;<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SMSC&amp;reg;<br /> | LPC47N217<br /> | style=&quot;background:#dddddd&quot; | ?<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT1211<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT82C686(A/B)<br /> | style=&quot;background:yellow&quot; | OK&lt;sup&gt;5&lt;/sup&gt;<br /> <br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Winbond&amp;trade;<br /> | W83627DHG<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Winbond&amp;trade;<br /> | W83627UHG<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Winbond&amp;trade;<br /> | W83627EHG/HF/EHF/THF<br /> | style=&quot;background:#dddddd&quot; | ?<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Winbond&amp;trade;<br /> | W83697HF/HG<br /> | ?<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Winbond&amp;trade;<br /> | W83627THF<br /> | style=&quot;background:#dddddd&quot; | ?<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Winbond&amp;trade;<br /> | W83627THG<br /> | style=&quot;background:#dddddd&quot; | ?<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Winbond&amp;trade;<br /> | W83977F<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Winbond&amp;trade;<br /> | W83977TF<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Winbond&amp;trade;<br /> | W83977EF<br /> | style=&quot;background:lime&quot; | OK&lt;sup&gt;4&lt;/sup&gt;<br /> |}<br /> <br /> | valign=&quot;top&quot;|<br /> <br /> '''CPUs'''<br /> <br /> {| border=&quot;0&quot; style=&quot;font-size: smaller&quot;<br /> |- bgcolor=&quot;#6699dd&quot;<br /> ! align=&quot;left&quot; | Type<br /> ! align=&quot;left&quot; | CPU<br /> ! align=&quot;left&quot; | Status<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | x86<br /> | AMD<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | x86<br /> | Intel&amp;reg;<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | x86<br /> | VIA<br /> | style=&quot;background:lime&quot; | OK<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | PowerPC<br /> | MPC74xx<br /> | style=&quot;background:#dddddd&quot; | ?<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | PowerPC<br /> | PPC4xx<br /> | style=&quot;background:#dddddd&quot; | ?<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | PowerPC<br /> | PPC7xx<br /> | style=&quot;background:#dddddd&quot; | ?<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | PowerPC<br /> | PPC970<br /> | style=&quot;background:#dddddd&quot; | ?<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Emulated<br /> | QEMU<br /> | style=&quot;background:lime&quot; | OK<br /> |}<br /> <br /> '''SOCs'''<br /> <br /> {| border=&quot;0&quot; style=&quot;font-size: smaller&quot; valign=&quot;top&quot;<br /> |- bgcolor=&quot;#6699dd&quot;<br /> ! align=&quot;left&quot; | Vendor<br /> ! align=&quot;left&quot; | SOC<br /> ! align=&quot;left&quot; | Status<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | Elan SC520<br /> | style=&quot;background: lime&quot; | OK<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | EP80579 (Tolapai)<br /> | style=&quot;background: lime&quot; | OK<br /> |}<br /> <br /> |}<br /> <br /> &lt;small&gt;<br /> &lt;sup&gt;1&lt;/sup&gt; Serial output should work for all ITE Super I/Os (but is only tested on the IT8671F and IT8712F). The rest ''could'' work, but is completely untested.&lt;br /&gt;<br /> &lt;sup&gt;2&lt;/sup&gt; Work in progress.&lt;br /&gt;<br /> &lt;sup&gt;3&lt;/sup&gt; Serial output on serial port 1 is tested and works, the rest probably not yet (tested on FDC37M602).&lt;br /&gt;<br /> &lt;sup&gt;4&lt;/sup&gt; The W83977EF works fine with the W83977TF code (the pre-RAM serial part at least).&lt;br /&gt;<br /> &lt;sup&gt;5&lt;/sup&gt; Pre-RAM serial output works fine, but nothing else, yet.&lt;br /&gt;<br /> &lt;sup&gt;6&lt;/sup&gt; IDE support is available and tested. SMBus support may work, but is untested. USB support is on our TODO list.&lt;br /&gt;<br /> &lt;sup&gt;7&lt;/sup&gt; Pre-RAM serial output [http://www.linuxbios.org/pipermail/linuxbios/2007-May/021247.html works fine], everything else is untested.&lt;br /&gt;<br /> &lt;sup&gt;8&lt;/sup&gt; [http://www.linuxbios.org/pipermail/linuxbios/2007-May/021623.html Works fine] mostly, but support for more obscure features (floppy, game port, MIDI, IR) might need more work.&lt;br /&gt;<br /> &lt;sup&gt;9&lt;/sup&gt; Works mostly, but currently there are some limitations as to which RAM DIMMs can be used.&lt;br /&gt;<br /> &lt;sup&gt;10&lt;/sup&gt; These southbridges should all be supported by the (experimental) new code in src/southbridge/intel/i82801xx/ now. Please test this code and use this code for all new ICH* based boards. There's still some old code for the southbridges, but that should not be used anymore.&lt;br /&gt;<br /> &lt;sup&gt;11&lt;/sup&gt; Sort of works, but the settings are hardcoded for the Tyan S1846. This will be fixed soonish.&lt;br /&gt;<br /> &lt;sup&gt;12&lt;/sup&gt; All these Super I/O chips should be supported by the &quot;smscsuperio&quot; driver. Only the ASUS A8000 is tested, though. The floppy disk controller, the parallel port, the serial ports (COM1 + COM2), and the keyboard should work for all chips. More advanced stuff may need more work, though.&lt;br /&gt;<br /> &lt;sup&gt;13&lt;/sup&gt; The ASUS A8000 Super I/O seems to be a rebranded SMSC DME1737.&lt;br /&gt;<br /> &lt;sup&gt;14&lt;/sup&gt; Working, but not widely tested, yet. Works with single DIMM DDR2.&lt;br /&gt;<br /> &lt;sup&gt;15&lt;/sup&gt; The Intel 3100/EP80579 UARTs and watchdog timer are integrated as a Super I/O-like device; only the UARTs have been tested so far.&lt;br /&gt;<br /> &lt;sup&gt;16&lt;/sup&gt; Barcelona B0-B3 supported.&lt;br /&gt;<br /> &lt;sup&gt;17&lt;/sup&gt; MCP55 and CK804 are supported, but no open documents are available from NVIDIA.<br /> &lt;/small&gt;<br /> <br /> == Devices supported in coreboot v1 ==<br /> <br /> Not all devices have been ported from coreboot v1 to coreboot v2, yet (check &quot;v2?&quot; field). If you want to work on such a port contact us on the [[Mailinglist|mailing list]].<br /> <br /> {| border=&quot;0&quot; valign=&quot;top&quot;<br /> | valign=&quot;top&quot;|<br /> <br /> '''Northbridges'''<br /> <br /> {| border=&quot;0&quot; style=&quot;font-size: smaller&quot; valign=&quot;top&quot;<br /> |- bgcolor=&quot;#6699dd&quot;<br /> ! align=&quot;left&quot; | Vendor<br /> ! align=&quot;left&quot; | Northbridge<br /> ! align=&quot;left&quot; | Status<br /> ! align=&quot;left&quot; | v2?<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Acer<br /> | M1631<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Alpha<br /> | Tsunami<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | AMD<br /> | AMD76x<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 430TX<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 440BX<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:yellow&quot; | Yes&lt;sup&gt;3&lt;/sup&gt;<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 440GX<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82815EP<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82830<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82860<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | E7500<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | E7501<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | E7505<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Micron<br /> | 21PAD<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Motorola<br /> | MPC107<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | NSC/AMD<br /> | GX1<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT694<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT8601<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT8623<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |}<br /> <br /> | valign=&quot;top&quot;|<br /> <br /> '''Southbridges'''<br /> <br /> {| border=&quot;0&quot; style=&quot;font-size: smaller&quot; valign=&quot;top&quot;<br /> |- bgcolor=&quot;#6699dd&quot;<br /> ! align=&quot;left&quot; | Vendor<br /> ! align=&quot;left&quot; | Southbridge<br /> ! align=&quot;left&quot; | Status<br /> ! align=&quot;left&quot; | v2?<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Acer<br /> | M1535<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Acer<br /> | M1543<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | AMD<br /> | AMD766<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | AMD<br /> | AMD768<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82801<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82801CA<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82801DB<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | 82870<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Intel&amp;reg;<br /> | PIIX4E<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | NSC/AMD<br /> | CS5530<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | NSC<br /> | SCX200<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT8231<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT8235<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT82C686<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | Winbond&amp;trade;<br /> | W83C553<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |}<br /> <br /> | valign=&quot;top&quot;|<br /> <br /> '''Super I/Os'''<br /> <br /> {| border=&quot;0&quot; style=&quot;font-size: smaller&quot; valign=&quot;top&quot;<br /> |- bgcolor=&quot;#6699dd&quot;<br /> ! align=&quot;left&quot; | Vendor<br /> ! align=&quot;left&quot; | Super&amp;nbsp;I/O<br /> ! align=&quot;left&quot; | Status<br /> ! align=&quot;left&quot; | v2?<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Acer<br /> | M1535<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | ITE<br /> | IT8671F<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | NSC<br /> | PC87309<br /> | style=&quot;background:lime&quot; | OK<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | NSC<br /> | PC87351<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | NSC<br /> | PC97307<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | NSC<br /> | PC97317<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SiS<br /> | 950<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | SMC<br /> | FDC37B72X<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | SMC<br /> | FDC37B78X<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | SMC<br /> | FDC37B807<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | SMC<br /> | FDC37C669<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | SMC<br /> | FDC37C67X<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | SMC<br /> | FDC37N769<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT1211<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT8231<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | VIA<br /> | VT82C686<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:yellow&quot; | Yes&lt;sup&gt;2&lt;/sup&gt;<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Winbond&amp;trade;<br /> | W83627HF<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Winbond&amp;trade;<br /> | W83877TF<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Winbond&amp;trade;<br /> | W83977EF<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes&lt;sup&gt;1&lt;/sup&gt;<br /> |}<br /> <br /> | valign=&quot;top&quot;|<br /> <br /> '''North-/Southbridges'''<br /> <br /> {| border=&quot;0&quot; style=&quot;font-size: smaller&quot; valign=&quot;top&quot;<br /> |- bgcolor=&quot;#6699dd&quot;<br /> ! align=&quot;left&quot; | Vendor<br /> ! align=&quot;left&quot; | North/South<br /> ! align=&quot;left&quot; | Status<br /> ! align=&quot;left&quot; | v2?<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | NSC<br /> | SCX200<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SiS<br /> | 540<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SiS<br /> | 550<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SiS<br /> | 630<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SiS<br /> | 635<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SiS<br /> | 730<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | SiS<br /> | 735<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | ST<br /> | STPC<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |}<br /> <br /> '''CPUs'''<br /> <br /> {| border=&quot;0&quot; style=&quot;font-size: smaller&quot;<br /> |- bgcolor=&quot;#6699dd&quot;<br /> ! align=&quot;left&quot; | Type<br /> ! align=&quot;left&quot; | CPU<br /> ! align=&quot;left&quot; | Status<br /> ! align=&quot;left&quot; | v2?<br /> <br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | Alpha<br /> | EV6<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:red&quot; | No<br /> |- bgcolor=&quot;#dddddd&quot; valign=&quot;top&quot;<br /> | PowerPC<br /> | ?<br /> | style=&quot;background:#dddddd&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | x86<br /> | AMD<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | x86<br /> | Intel&amp;reg;<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |- bgcolor=&quot;#eeeeee&quot; valign=&quot;top&quot;<br /> | x86<br /> | VIA<br /> | style=&quot;background:#eeeeee&quot; | ?<br /> | style=&quot;background:lime&quot; | Yes<br /> |}<br /> <br /> |}<br /> <br /> &lt;small&gt;<br /> &lt;sup&gt;1&lt;/sup&gt; The W83977EF works fine with the W83977TF code in coreboot v2 (the pre-RAM serial part at least).&lt;br /&gt;<br /> &lt;sup&gt;2&lt;/sup&gt; Pre-RAM serial output works in coreboot v2, but the rest is not supported, yet.&lt;br /&gt;<br /> &lt;sup&gt;3&lt;/sup&gt; Work in progress.&lt;br /&gt;<br /> &lt;/small&gt;<br /> <br /> __FORCETOC__</div>

Juri http://www.coreboot.org/ASUS_P2B-F 2009-02-17T18:23:03Z

<p>Juri: mark down the nonworking keyboard</p> <hr /> <div>[[Image:Asus_p2b-f.jpg|thumb|The ASUS P2B-F, revision 1.00]]<br /> <br /> == Status ==<br /> <br /> {{Status|<br /> <br /> |CPU_status = OK<br /> |CPU_L1_status = OK<br /> |CPU_L1_comments = CPU: L1 I cache: 16K, L1 D cache: 16K<br /> |CPU_L2_status = WIP<br /> |CPU_L2_comments = L2 cache is not being enabled at the moment. We're working on fixing it.<br /> |CPU_L3_status = N/A<br /> |CPU_multiple_status = N/A<br /> |CPU_multicore_status = N/A<br /> |CPU_virt_status = N/A<br /> <br /> |RAM_EDO_status = N/A<br /> |RAM_SDRAM_status = OK<br /> |RAM_SDRAM_comments = Works, but currently the RAM settings are hardcoded to one 64MB DIMM and certain speed settings. This will be fixed soon, a patch is on the way.<br /> |RAM_SODIMM_status = N/A<br /> |RAM_DDR_status = N/A<br /> |RAM_DDR2_status = N/A<br /> |RAM_DDR3_status = N/A<br /> |RAM_dualchannel_status = N/A<br /> |RAM_ecc_status = WIP<br /> |RAM_ecc_comments = Not yet supported by the coreboot 440BX code, but it's on our TODO list.<br /> <br /> |IDE_status = Untested<br /> |IDE_CF_status = OK<br /> |IDE_25_status = N/A<br /> |CDROM_DVD_status = Untested<br /> |SATA_status = N/A<br /> |USB_status = OK<br /> |USB_comments = Tested: USB keyboard in both USB ports.<br /> |Onboard_VGA_status = N/A<br /> |Onboard_ethernet_status = N/A<br /> |Onboard_audio_status = N/A<br /> |Onboard_modem_status = N/A<br /> |Onboard_firewire_status = N/A<br /> |Smartcard_status = N/A<br /> |Onboard_CF_status = N/A<br /> |Onboard_PCMCIA_status = N/A<br /> |Onboard_SCSI_status = N/A<br /> <br /> |ISA_cards_status = Untested<br /> |AMR_cards_status = N/A<br /> |AGP_cards_status = OK<br /> |AGP_cards_comments = Tested: AGP graphics card (ATI 3D Rage Pro AGP 1X/2X).<br /> |Mini_PCI_cards_status = N/A<br /> |PCI_cards_status = OK<br /> |PCI_cards_comments = Tested: PCI VGA card in all five PCI slots.<br /> |PCIE_x1_status = N/A<br /> |PCIE_x2_status = N/A<br /> |PCIE_x4_status = N/A<br /> |PCIE_x8_status = N/A<br /> |PCIE_x16_status = N/A<br /> |PCIE_x32_status = N/A<br /> |HTX_status = N/A<br /> <br /> |Floppy_status = Untested<br /> |COM1_status = OK<br /> |COM2_status = Untested<br /> |PP_status = OK<br /> |PP_comments = Doing '''modprobe ppdev''' works fine, but further tests were not performed.<br /> |PS2_keyboard_status = WIP<br /> |PS2_mouse_status = WIP<br /> |Game_port_status = N/A<br /> |IR_status = N/A<br /> |Speaker_status = OK<br /> |DiskOnChip_status = N/A<br /> <br /> |Sensors_status = OK<br /> |Sensors_comments = Works fine, you can use the '''w83781d''', '''i2c-piix4''', and '''eeprom''' kernel modules.<br /> |Watchdog_status = N/A<br /> |CAN_bus_status = N/A<br /> |CPUfreq_status = N/A<br /> |Powersave_status = N/A<br /> |ACPI_status = No<br /> |ACPI_comments = There's no ACPI implementation for this board.<br /> |SMBus_status = Untested<br /> |Reboot_status = WIP<br /> |Poweroff_status = No<br /> |LEDs_status = N/A<br /> |LEDs_comments = No special-purpose LEDs available on the board.<br /> |HPET_status = N/A<br /> |RNG_status = N/A<br /> |WakeOnModem_status = <br /> |WakeOnLAN_status = <br /> |WakeOnKeyboard_status = <br /> |WakeOnMouse_status = <br /> |Flashrom_status = OK<br /> |Flashrom_comments = Works on both the vendor BIOS as well as on coreboot.<br /> <br /> }}<br /> == Build tutorial ==<br /> <br /> First, before thinking of using coreboot, make sure you have a backup of your current BIOS image(see [[Flashrom]]), and the correct facilities to replace that image, if it becomes corrupt. Assuming you have a backup and restore procedure, continue with the following(which may destroy your board anyways! you have been warned!)<br /> <br /> It is recommended that you have a known good PCI video card, a known good single sided PC100 non-ecc dimm, and a known good null modem cable before you proceed, for error recovery. At this point, it is recommended that you have many dimms, as the timings are compiled into the bios, and theres no good way to know your dimm is going to work after flashing.<br /> <br /> CoreBoot has multiple [[Payloads]] used for the boot process ([[SeaBIOS]], [[FILO]], [[GRUB2]], etc), and you must build a payload first, so that CoreBoot can build it into itsself.<br /> <br /> after your payload is compiled(assuming you compiled the [[FILO]] payload), copy the resulting file to /tmp/filo.elf, then:<br /> <br /> Check out a copy of coreboot-v2<br /> $ svn co svn://coreboot.org/repos/trunk/coreboot-v2<br /> <br /> Build the files used to build the bios<br /> $ cd coreboot-v2/targets<br /> $ ./buildtarget asus/p2b-f<br /> <br /> Build the bios itsself<br /> $ cd asus/p2b-f/p2b-f<br /> $ make -s<br /> <br /> The resulting '''coreboot.rom''' is your coreboot ROM image you can flash using [[flashrom]].<br /> <br /> == Troubleshooting ==<br /> <br /> So, you installed coreboot, and now your board doesn't board boot?<br /> <br /> First, check the serial port, and see what sort of output you're getting. <br /> <br /> The following is what the section of coreboot on the P2B-F shows when enabling ram:<br /> <br /> RAM Enable 1: Apply NOP<br /> RAM Enable 2: Precharge all<br /> RAM Enable 3: CBR<br /> RAM Enable 4: Mode register set<br /> RAM Enable 5: Normal operation<br /> RAM Enable 6: Enable refresh<br /> Enabling refresh (DRAMC = 0x09) for DIMM 00<br /> <br /> If in your output, you do not see the 'Enabling refresh' line, your ram chip is not being detected, or refreshed. try a different dimm, and make sure you're placing it in slot 1 (the slot closest to the CPU).<br /> <br /> If this doesn't solve your problem, remove all the PCI or ISA components. then remove your IDE and floppy devices, and try again. If that still does not give you output on the serial port, you likely have a bad flash or bad cable (you did test it, right?). if you get partial output from the serial, but do not get to the point where you see your payload booting your system, then its time to upload the serial output you're getting after simplifying your hardware configuration to a paste website, and drop by IRC or the mailing list, and ask for help.<br /> <br /> = Known Working Revisions =<br /> <br /> Coreboot revision 3949 + filo 0.5.6 version 85 (keyboard does not work! builds a 128K image, make sure to slim filo down!)<br /> <br /> {{GPL}}</div>

Juri http://www.coreboot.org/ASUS_P2B-F 2009-02-16T01:32:11Z

<p>Juri: mark down a known working version</p> <hr /> <div>[[Image:Asus_p2b-f.jpg|thumb|The ASUS P2B-F, revision 1.00]]<br /> <br /> == Status ==<br /> <br /> {{Status|<br /> <br /> |CPU_status = OK<br /> |CPU_L1_status = OK<br /> |CPU_L1_comments = CPU: L1 I cache: 16K, L1 D cache: 16K<br /> |CPU_L2_status = WIP<br /> |CPU_L2_comments = L2 cache is not being enabled at the moment. We're working on fixing it.<br /> |CPU_L3_status = N/A<br /> |CPU_multiple_status = N/A<br /> |CPU_multicore_status = N/A<br /> |CPU_virt_status = N/A<br /> <br /> |RAM_EDO_status = N/A<br /> |RAM_SDRAM_status = OK<br /> |RAM_SDRAM_comments = Works, but currently the RAM settings are hardcoded to one 64MB DIMM and certain speed settings. This will be fixed soon, a patch is on the way.<br /> |RAM_SODIMM_status = N/A<br /> |RAM_DDR_status = N/A<br /> |RAM_DDR2_status = N/A<br /> |RAM_DDR3_status = N/A<br /> |RAM_dualchannel_status = N/A<br /> |RAM_ecc_status = WIP<br /> |RAM_ecc_comments = Not yet supported by the coreboot 440BX code, but it's on our TODO list.<br /> <br /> |IDE_status = Untested<br /> |IDE_CF_status = OK<br /> |IDE_25_status = N/A<br /> |CDROM_DVD_status = Untested<br /> |SATA_status = N/A<br /> |USB_status = OK<br /> |USB_comments = Tested: USB keyboard in both USB ports.<br /> |Onboard_VGA_status = N/A<br /> |Onboard_ethernet_status = N/A<br /> |Onboard_audio_status = N/A<br /> |Onboard_modem_status = N/A<br /> |Onboard_firewire_status = N/A<br /> |Smartcard_status = N/A<br /> |Onboard_CF_status = N/A<br /> |Onboard_PCMCIA_status = N/A<br /> |Onboard_SCSI_status = N/A<br /> <br /> |ISA_cards_status = Untested<br /> |AMR_cards_status = N/A<br /> |AGP_cards_status = OK<br /> |AGP_cards_comments = Tested: AGP graphics card (ATI 3D Rage Pro AGP 1X/2X).<br /> |Mini_PCI_cards_status = N/A<br /> |PCI_cards_status = OK<br /> |PCI_cards_comments = Tested: PCI VGA card in all five PCI slots.<br /> |PCIE_x1_status = N/A<br /> |PCIE_x2_status = N/A<br /> |PCIE_x4_status = N/A<br /> |PCIE_x8_status = N/A<br /> |PCIE_x16_status = N/A<br /> |PCIE_x32_status = N/A<br /> |HTX_status = N/A<br /> <br /> |Floppy_status = Untested<br /> |COM1_status = OK<br /> |COM2_status = Untested<br /> |PP_status = OK<br /> |PP_comments = Doing '''modprobe ppdev''' works fine, but further tests were not performed.<br /> |PS2_keyboard_status = WIP<br /> |PS2_mouse_status = WIP<br /> |Game_port_status = N/A<br /> |IR_status = N/A<br /> |Speaker_status = OK<br /> |DiskOnChip_status = N/A<br /> <br /> |Sensors_status = OK<br /> |Sensors_comments = Works fine, you can use the '''w83781d''', '''i2c-piix4''', and '''eeprom''' kernel modules.<br /> |Watchdog_status = N/A<br /> |CAN_bus_status = N/A<br /> |CPUfreq_status = N/A<br /> |Powersave_status = N/A<br /> |ACPI_status = No<br /> |ACPI_comments = There's no ACPI implementation for this board.<br /> |SMBus_status = Untested<br /> |Reboot_status = WIP<br /> |Poweroff_status = No<br /> |LEDs_status = N/A<br /> |LEDs_comments = No special-purpose LEDs available on the board.<br /> |HPET_status = N/A<br /> |RNG_status = N/A<br /> |WakeOnModem_status = <br /> |WakeOnLAN_status = <br /> |WakeOnKeyboard_status = <br /> |WakeOnMouse_status = <br /> |Flashrom_status = OK<br /> |Flashrom_comments = Works on both the vendor BIOS as well as on coreboot.<br /> <br /> }}<br /> == Build tutorial ==<br /> <br /> First, before thinking of using coreboot, make sure you have a backup of your current BIOS image(see [[Flashrom]]), and the correct facilities to replace that image, if it becomes corrupt. Assuming you have a backup and restore procedure, continue with the following(which may destroy your board anyways! you have been warned!)<br /> <br /> It is recommended that you have a known good PCI video card, a known good single sided PC100 non-ecc dimm, and a known good null modem cable before you proceed, for error recovery. At this point, it is recommended that you have many dimms, as the timings are compiled into the bios, and theres no good way to know your dimm is going to work after flashing.<br /> <br /> CoreBoot has multiple [[Payloads]] used for the boot process ([[SeaBIOS]], [[FILO]], [[GRUB2]], etc), and you must build a payload first, so that CoreBoot can build it into itsself.<br /> <br /> after your payload is compiled(assuming you compiled the [[FILO]] payload), copy the resulting file to /tmp/filo.elf, then:<br /> <br /> Check out a copy of coreboot-v2<br /> $ svn co svn://coreboot.org/repos/trunk/coreboot-v2<br /> <br /> Build the files used to build the bios<br /> $ cd coreboot-v2/targets<br /> $ ./buildtarget asus/p2b-f<br /> <br /> Build the bios itsself<br /> $ cd asus/p2b-f/p2b-f<br /> $ make -s<br /> <br /> The resulting '''coreboot.rom''' is your coreboot ROM image you can flash using [[flashrom]].<br /> <br /> == Troubleshooting ==<br /> <br /> So, you installed coreboot, and now your board doesn't board boot?<br /> <br /> First, check the serial port, and see what sort of output you're getting. <br /> <br /> The following is what the section of coreboot on the P2B-F shows when enabling ram:<br /> <br /> RAM Enable 1: Apply NOP<br /> RAM Enable 2: Precharge all<br /> RAM Enable 3: CBR<br /> RAM Enable 4: Mode register set<br /> RAM Enable 5: Normal operation<br /> RAM Enable 6: Enable refresh<br /> Enabling refresh (DRAMC = 0x09) for DIMM 00<br /> <br /> If in your output, you do not see the 'Enabling refresh' line, your ram chip is not being detected, or refreshed. try a different dimm, and make sure you're placing it in slot 1 (the slot closest to the CPU).<br /> <br /> If this doesn't solve your problem, remove all the PCI or ISA components. then remove your IDE and floppy devices, and try again. If that still does not give you output on the serial port, you likely have a bad flash or bad cable (you did test it, right?). if you get partial output from the serial, but do not get to the point where you see your payload booting your system, then its time to upload the serial output you're getting after simplifying your hardware configuration to a paste website, and drop by IRC or the mailing list, and ask for help.<br /> <br /> = Known Working Revisions =<br /> <br /> Coreboot revision 3949 + filo 0.5.6 version 85 (builds a 128K image, make sure to slim filo down!)<br /> <br /> <br /> <br /> <br /> {{GPL}}</div>

Juri http://www.coreboot.org/ASUS_P2B 2009-02-15T23:08:52Z

<p>Juri: Add a picture of the Asus P2B version 1.10</p> <hr /> <div>[[Image:p2b-1_04.jpg|thumb|The ASUS P2B, revision 1.04]]<br /> [[Image:Asus-P2B-1_10.jpg|thumb|The Asus P2B, revision 1.10]]<br /> <br /> This pages describes how to use coreboot on the '''ASUS P2B''' mainboard. It's maintained by [[User:Uwe|Uwe Hermann]].<br /> <br /> &lt;!-- &lt;br clear=&quot;all&quot; /&gt; --&gt;<br /> <br /> == Status ==<br /> <br /> {{Status|<br /> <br /> |CPU_status = OK<br /> |CPU_L1_status = Untested<br /> |CPU_L2_status = WIP<br /> |CPU_L2_comments = L2 cache is not being enabled at the moment. We're working on fixing it.<br /> |CPU_L3_status = N/A<br /> |CPU_multiple_status = N/A<br /> |CPU_multicore_status = N/A<br /> |CPU_virt_status = N/A<br /> <br /> |RAM_EDO_status = N/A<br /> |RAM_SDRAM_status = WIP<br /> |RAM_SDRAM_comments = Works, but currently the RAM settings are hardcoded to one 64MB DIMM and certain speed settings. This will be fixed soon, a patch is on the way.<br /> |RAM_SODIMM_status = N/A<br /> |RAM_DDR_status = N/A<br /> |RAM_DDR2_status = N/A<br /> |RAM_DDR3_status = N/A<br /> |RAM_dualchannel_status = N/A<br /> |RAM_ecc_status = WIP<br /> |RAM_ecc_comments = Not yet supported by the coreboot 440BX code, but it's on our TODO list.<br /> <br /> |IDE_status = <br /> |IDE_25_status = N/A<br /> |IDE_CF_status = <br /> |DiskOnChip_status = N/A<br /> <br /> |SATA_status = N/A<br /> |USB_status = Untested<br /> |Onboard_VGA_status = N/A<br /> |Onboard_ethernet_status = N/A<br /> |Onboard_audio_status = N/A<br /> |Onboard_modem_status = N/A<br /> |Onboard_firewire_status = N/A<br /> |Onboard_CF_status = N/A<br /> |Onboard_PCMCIA_status = N/A<br /> |Smartcard_status = N/A<br /> <br /> |ISA_cards_status = <br /> |AMR_cards_status = N/A<br /> |PCI_cards_status = <br /> |AGP_cards_status = <br /> |PCIE_cards_status = N/A<br /> |PCIE_x1_status = N/A<br /> |PCIE_x2_status = N/A<br /> |PCIE_x4_status = N/A<br /> |PCIE_x8_status = N/A<br /> |PCIE_x16_status = N/A<br /> |PCIE_x32_status = N/A<br /> |HTX_status = N/A<br /> <br /> |Floppy_status = <br /> |COM1_status = <br /> |COM2_status = <br /> |PP_status = <br /> |PS2_keyboard_status = <br /> |PS2_mouse_status = <br /> |Game_port_status = N/A<br /> |Sensors_status = <br /> |CAN_bus_status = N/A<br /> |ACPI_status = No<br /> |ACPI_comments = There's no ACPI implementation for this board.<br /> |LEDs_status = N/A<br /> |LEDs_comments = No special-purpose LEDs available on the board.<br /> |CPUfreq_status = <br /> |Flashrom_status = OK<br /> <br /> }}<br /> <br /> <br /> {{GPL}}</div>

Juri http://www.coreboot.org/File:Asus-P2B-1_10.jpg 2009-02-15T23:04:20Z

<p>Juri: Photograph of the Asus P2B version 1.10</p> <hr /> <div>Photograph of the Asus P2B version 1.10</div>

Juri http://www.coreboot.org/ASUS_P2B 2009-02-15T22:57:20Z

<p>Juri: Change Photograph on the p2b version 1.04</p> <hr /> <div>[[Image:p2b-1_04.jpg|thumb|The ASUS P2B, revision 1.04]]<br /> <br /> This pages describes how to use coreboot on the '''ASUS P2B''' mainboard. It's maintained by [[User:Uwe|Uwe Hermann]].<br /> <br /> &lt;!-- &lt;br clear=&quot;all&quot; /&gt; --&gt;<br /> <br /> == Status ==<br /> <br /> {{Status|<br /> <br /> |CPU_status = OK<br /> |CPU_L1_status = Untested<br /> |CPU_L2_status = WIP<br /> |CPU_L2_comments = L2 cache is not being enabled at the moment. We're working on fixing it.<br /> |CPU_L3_status = N/A<br /> |CPU_multiple_status = N/A<br /> |CPU_multicore_status = N/A<br /> |CPU_virt_status = N/A<br /> <br /> |RAM_EDO_status = N/A<br /> |RAM_SDRAM_status = WIP<br /> |RAM_SDRAM_comments = Works, but currently the RAM settings are hardcoded to one 64MB DIMM and certain speed settings. This will be fixed soon, a patch is on the way.<br /> |RAM_SODIMM_status = N/A<br /> |RAM_DDR_status = N/A<br /> |RAM_DDR2_status = N/A<br /> |RAM_DDR3_status = N/A<br /> |RAM_dualchannel_status = N/A<br /> |RAM_ecc_status = WIP<br /> |RAM_ecc_comments = Not yet supported by the coreboot 440BX code, but it's on our TODO list.<br /> <br /> |IDE_status = <br /> |IDE_25_status = N/A<br /> |IDE_CF_status = <br /> |DiskOnChip_status = N/A<br /> <br /> |SATA_status = N/A<br /> |USB_status = Untested<br /> |Onboard_VGA_status = N/A<br /> |Onboard_ethernet_status = N/A<br /> |Onboard_audio_status = N/A<br /> |Onboard_modem_status = N/A<br /> |Onboard_firewire_status = N/A<br /> |Onboard_CF_status = N/A<br /> |Onboard_PCMCIA_status = N/A<br /> |Smartcard_status = N/A<br /> <br /> |ISA_cards_status = <br /> |AMR_cards_status = N/A<br /> |PCI_cards_status = <br /> |AGP_cards_status = <br /> |PCIE_cards_status = N/A<br /> |PCIE_x1_status = N/A<br /> |PCIE_x2_status = N/A<br /> |PCIE_x4_status = N/A<br /> |PCIE_x8_status = N/A<br /> |PCIE_x16_status = N/A<br /> |PCIE_x32_status = N/A<br /> |HTX_status = N/A<br /> <br /> |Floppy_status = <br /> |COM1_status = <br /> |COM2_status = <br /> |PP_status = <br /> |PS2_keyboard_status = <br /> |PS2_mouse_status = <br /> |Game_port_status = N/A<br /> |Sensors_status = <br /> |CAN_bus_status = N/A<br /> |ACPI_status = No<br /> |ACPI_comments = There's no ACPI implementation for this board.<br /> |LEDs_status = N/A<br /> |LEDs_comments = No special-purpose LEDs available on the board.<br /> |CPUfreq_status = <br /> |Flashrom_status = OK<br /> <br /> }}<br /> <br /> <br /> {{GPL}}</div>

Juri http://www.coreboot.org/File:P2b-1_04.jpg 2009-02-15T22:55:35Z

<p>Juri: Photograph of the Asus P2B version 1.04</p> <hr /> <div>Photograph of the Asus P2B version 1.04</div>

Juri http://www.coreboot.org/ASUS_P2B-F 2009-02-06T05:39:01Z

<p>Juri: remove video references, use the closest memoy socket...</p> <hr /> <div>[[Image:Asus_p2b-f.jpg|thumb|The ASUS P2B-F, revision 1.00]]<br /> <br /> == Status ==<br /> <br /> {{Status|<br /> <br /> |CPU_status = OK<br /> |CPU_L1_status = OK<br /> |CPU_L1_comments = CPU: L1 I cache: 16K, L1 D cache: 16K<br /> |CPU_L2_status = WIP<br /> |CPU_L2_comments = L2 cache is not being enabled at the moment. We're working on fixing it.<br /> |CPU_L3_status = N/A<br /> |CPU_multiple_status = N/A<br /> |CPU_multicore_status = N/A<br /> |CPU_virt_status = N/A<br /> <br /> |RAM_EDO_status = N/A<br /> |RAM_SDRAM_status = OK<br /> |RAM_SDRAM_comments = Works, but currently the RAM settings are hardcoded to one 64MB DIMM and certain speed settings. This will be fixed soon, a patch is on the way.<br /> |RAM_SODIMM_status = N/A<br /> |RAM_DDR_status = N/A<br /> |RAM_DDR2_status = N/A<br /> |RAM_DDR3_status = N/A<br /> |RAM_dualchannel_status = N/A<br /> |RAM_ecc_status = WIP<br /> |RAM_ecc_comments = Not yet supported by the coreboot 440BX code, but it's on our TODO list.<br /> <br /> |IDE_status = Untested<br /> |IDE_CF_status = OK<br /> |IDE_25_status = N/A<br /> |CDROM_DVD_status = Untested<br /> |SATA_status = N/A<br /> |USB_status = OK<br /> |USB_comments = Tested: USB keyboard in both USB ports.<br /> |Onboard_VGA_status = N/A<br /> |Onboard_ethernet_status = N/A<br /> |Onboard_audio_status = N/A<br /> |Onboard_modem_status = N/A<br /> |Onboard_firewire_status = N/A<br /> |Smartcard_status = N/A<br /> |Onboard_CF_status = N/A<br /> |Onboard_PCMCIA_status = N/A<br /> |Onboard_SCSI_status = N/A<br /> <br /> |ISA_cards_status = Untested<br /> |AMR_cards_status = N/A<br /> |AGP_cards_status = OK<br /> |AGP_cards_comments = Tested: AGP graphics card (ATI 3D Rage Pro AGP 1X/2X).<br /> |Mini_PCI_cards_status = N/A<br /> |PCI_cards_status = OK<br /> |PCI_cards_comments = Tested: PCI VGA card in all five PCI slots.<br /> |PCIE_x1_status = N/A<br /> |PCIE_x2_status = N/A<br /> |PCIE_x4_status = N/A<br /> |PCIE_x8_status = N/A<br /> |PCIE_x16_status = N/A<br /> |PCIE_x32_status = N/A<br /> |HTX_status = N/A<br /> <br /> |Floppy_status = Untested<br /> |COM1_status = OK<br /> |COM2_status = Untested<br /> |PP_status = OK<br /> |PP_comments = Doing '''modprobe ppdev''' works fine, but further tests were not performed.<br /> |PS2_keyboard_status = WIP<br /> |PS2_mouse_status = WIP<br /> |Game_port_status = N/A<br /> |IR_status = N/A<br /> |Speaker_status = OK<br /> |DiskOnChip_status = N/A<br /> <br /> |Sensors_status = OK<br /> |Sensors_comments = Works fine, you can use the '''w83781d''', '''i2c-piix4''', and '''eeprom''' kernel modules.<br /> |Watchdog_status = N/A<br /> |CAN_bus_status = N/A<br /> |CPUfreq_status = N/A<br /> |Powersave_status = N/A<br /> |ACPI_status = No<br /> |ACPI_comments = There's no ACPI implementation for this board.<br /> |SMBus_status = Untested<br /> |Reboot_status = WIP<br /> |Poweroff_status = No<br /> |LEDs_status = N/A<br /> |LEDs_comments = No special-purpose LEDs available on the board.<br /> |HPET_status = N/A<br /> |RNG_status = N/A<br /> |WakeOnModem_status = <br /> |WakeOnLAN_status = <br /> |WakeOnKeyboard_status = <br /> |WakeOnMouse_status = <br /> |Flashrom_status = OK<br /> |Flashrom_comments = Works on both the vendor BIOS as well as on coreboot.<br /> <br /> }}<br /> == Build tutorial ==<br /> <br /> First, before thinking of using coreboot, make sure you have a backup of your current BIOS image(see [[Flashrom]]), and the correct facilities to replace that image, if it becomes corrupt. Assuming you have a backup and restore procedure, continue with the following(which may destroy your board anyways! you have been warned!)<br /> <br /> It is recommended that you have a known good PCI video card, a known good single sided PC100 non-ecc dimm, and a known good null modem cable before you proceed, for error recovery. At this point, it is recommended that you have many dimms, as the timings are compiled into the bios, and theres no good way to know your dimm is going to work after flashing.<br /> <br /> CoreBoot has multiple [[Payloads]] used for the boot process ([[SeaBIOS]], [[FILO]], [[GRUB2]], etc), and you must build a payload first, so that CoreBoot can build it into itsself.<br /> <br /> after your payload is compiled(assuming you compiled the [[FILO]] payload), copy the resulting file to /tmp/filo.elf, then:<br /> <br /> Check out a copy of coreboot-v2<br /> $ svn co svn://coreboot.org/repos/trunk/coreboot-v2<br /> <br /> Build the files used to build the bios<br /> $ cd coreboot-v2/targets<br /> $ ./buildtarget asus/p2b-f<br /> <br /> Build the bios itsself<br /> $ cd asus/p2b-f/p2b-f<br /> $ make -s<br /> <br /> The resulting '''coreboot.rom''' is your coreboot ROM image you can flash using [[flashrom]].<br /> <br /> == Troubleshooting ==<br /> <br /> So, you installed coreboot, and now your board doesn't board boot?<br /> <br /> First, check the serial port, and see what sort of output you're getting. <br /> <br /> The following is what the section of coreboot on the P2B-F shows when enabling ram:<br /> <br /> RAM Enable 1: Apply NOP<br /> RAM Enable 2: Precharge all<br /> RAM Enable 3: CBR<br /> RAM Enable 4: Mode register set<br /> RAM Enable 5: Normal operation<br /> RAM Enable 6: Enable refresh<br /> Enabling refresh (DRAMC = 0x09) for DIMM 00<br /> <br /> If in your output, you do not see the 'Enabling refresh' line, your ram chip is not being detected, or refreshed. try a different dimm, and make sure you're placing it in slot 1 (the slot closest to the CPU).<br /> <br /> If this doesn't solve your problem, remove all the PCI or ISA components. then remove your IDE and floppy devices, and try again. If that still does not give you output on the serial port, you likely have a bad flash or bad cable (you did test it, right?). if you get partial output from the serial, but do not get to the point where you see your payload booting your system, then its time to upload the serial output you're getting after simplifying your hardware configuration to a paste website, and drop by IRC or the mailing list, and ask for help.<br /> <br /> {{GPL}}</div>

Juri http://www.coreboot.org/ASUS_P2B-F 2009-02-05T19:57:21Z

<p>Juri: missing '|'</p> <hr /> <div>[[Image:Asus_p2b-f.jpg|thumb|The ASUS P2B-F, revision 1.00]]<br /> <br /> == Status ==<br /> <br /> {{Status|<br /> <br /> |CPU_status = OK<br /> |CPU_L1_status = OK<br /> |CPU_L1_comments = CPU: L1 I cache: 16K, L1 D cache: 16K<br /> |CPU_L2_status = WIP<br /> |CPU_L2_comments = L2 cache is not being enabled at the moment. We're working on fixing it.<br /> |CPU_L3_status = N/A<br /> |CPU_multiple_status = N/A<br /> |CPU_multicore_status = N/A<br /> |CPU_virt_status = N/A<br /> <br /> |RAM_EDO_status = N/A<br /> |RAM_SDRAM_status = OK<br /> |RAM_SDRAM_comments = Works, but currently the RAM settings are hardcoded to one 64MB DIMM and certain speed settings. This will be fixed soon, a patch is on the way.<br /> |RAM_SODIMM_status = N/A<br /> |RAM_DDR_status = N/A<br /> |RAM_DDR2_status = N/A<br /> |RAM_DDR3_status = N/A<br /> |RAM_dualchannel_status = N/A<br /> |RAM_ecc_status = WIP<br /> |RAM_ecc_comments = Not yet supported by the coreboot 440BX code, but it's on our TODO list.<br /> <br /> |IDE_status = Untested<br /> |IDE_CF_status = OK<br /> |IDE_25_status = N/A<br /> |CDROM_DVD_status = Untested<br /> |SATA_status = N/A<br /> |USB_status = OK<br /> |USB_comments = Tested: USB keyboard in both USB ports.<br /> |Onboard_VGA_status = N/A<br /> |Onboard_ethernet_status = N/A<br /> |Onboard_audio_status = N/A<br /> |Onboard_modem_status = N/A<br /> |Onboard_firewire_status = N/A<br /> |Smartcard_status = N/A<br /> |Onboard_CF_status = N/A<br /> |Onboard_PCMCIA_status = N/A<br /> |Onboard_SCSI_status = N/A<br /> <br /> |ISA_cards_status = Untested<br /> |AMR_cards_status = N/A<br /> |AGP_cards_status = OK<br /> |AGP_cards_comments = Tested: AGP graphics card (ATI 3D Rage Pro AGP 1X/2X).<br /> |Mini_PCI_cards_status = N/A<br /> |PCI_cards_status = OK<br /> |PCI_cards_comments = Tested: PCI VGA card in all five PCI slots.<br /> |PCIE_x1_status = N/A<br /> |PCIE_x2_status = N/A<br /> |PCIE_x4_status = N/A<br /> |PCIE_x8_status = N/A<br /> |PCIE_x16_status = N/A<br /> |PCIE_x32_status = N/A<br /> |HTX_status = N/A<br /> <br /> |Floppy_status = Untested<br /> |COM1_status = OK<br /> |COM2_status = Untested<br /> |PP_status = OK<br /> |PP_comments = Doing '''modprobe ppdev''' works fine, but further tests were not performed.<br /> |PS2_keyboard_status = WIP<br /> |PS2_mouse_status = WIP<br /> |Game_port_status = N/A<br /> |IR_status = N/A<br /> |Speaker_status = OK<br /> |DiskOnChip_status = N/A<br /> <br /> |Sensors_status = OK<br /> |Sensors_comments = Works fine, you can use the '''w83781d''', '''i2c-piix4''', and '''eeprom''' kernel modules.<br /> |Watchdog_status = N/A<br /> |CAN_bus_status = N/A<br /> |CPUfreq_status = N/A<br /> |Powersave_status = N/A<br /> |ACPI_status = No<br /> |ACPI_comments = There's no ACPI implementation for this board.<br /> |SMBus_status = Untested<br /> |Reboot_status = WIP<br /> |Poweroff_status = No<br /> |LEDs_status = N/A<br /> |LEDs_comments = No special-purpose LEDs available on the board.<br /> |HPET_status = N/A<br /> |RNG_status = N/A<br /> |WakeOnModem_status = <br /> |WakeOnLAN_status = <br /> |WakeOnKeyboard_status = <br /> |WakeOnMouse_status = <br /> |Flashrom_status = OK<br /> |Flashrom_comments = Works on both the vendor BIOS as well as on coreboot.<br /> <br /> }}<br /> == Build tutorial ==<br /> <br /> First, before thinking of using coreboot, make sure you have a backup of your current BIOS image(see [[Flashrom]]), and the correct facilities to replace that image, if it becomes corrupt. Assuming you have a backup and restore procedure, continue with the following(which may destroy your board anyways! you have been warned!)<br /> <br /> It is recommended that you have a known good PCI video card, a known good single sided PC100 non-ecc dimm, and a known good null modem cable before you proceed, for error recovery.<br /> <br /> CoreBoot has multiple [[Payloads]] used for the boot process ([[SeaBIOS]], [[FILO]], [[GRUB2]], etc), and you must build a payload first, so that CoreBoot can build it into itsself.<br /> <br /> after your payload is compiled(assuming you compiled the [[FILO]] payload), copy the resulting file to /tmp/filo.elf, then:<br /> <br /> Check out a copy of coreboot-v2<br /> $ svn co svn://coreboot.org/repos/trunk/coreboot-v2<br /> <br /> Build the files used to build the bios<br /> $ cd coreboot-v2/targets<br /> $ ./buildtarget asus/p2b-f<br /> <br /> Build the bios itsself<br /> $ cd asus/p2b-f/p2b-f<br /> $ make -s<br /> <br /> The resulting '''coreboot.rom''' is your coreboot ROM image you can flash using [[flashrom]].<br /> <br /> == Troubleshooting ==<br /> <br /> So, you installed coreboot, and now your board doesn't board boot?<br /> <br /> First, check the serial port, and see what sort of output you're getting. <br /> <br /> The following is what the section of coreboot on the P2B-F shows for memory setup:<br /> <br /> RAM Enable 1: Apply NOP<br /> RAM Enable 2: Precharge all<br /> RAM Enable 3: CBR<br /> RAM Enable 4: Mode register set<br /> RAM Enable 5: Normal operation<br /> RAM Enable 6: Enable refresh<br /> Enabling refresh (DRAMC = 0x09) for DIMM 00<br /> <br /> If in your output, you do not see the 'Enabling refresh' line, your ram chip is not being detected, or refreshed. try a different ram dimm, or a different dimm socket.<br /> <br /> If this doesn't solve your problem, remove all the PCI or ISA components other than your PCI video card (you do have one of those, right?). then remove your IDE and floppy devices, and try again. If that still does not give you output ,its time to upload the serial output you're getting after simplifying your hardware configuration to a paste website, and drop by IRC or the mailing list, and ask for help.<br /> <br /> {{GPL}}</div>

Juri http://www.coreboot.org/User:Juri 2009-02-04T19:11:50Z

<p>Juri: Create a user page for me. I exist!</p> <hr /> <div>Hello, World!<br /> <br /> I'm Julia Longtin, of the linuxpmi project. I'm a Free Software Zealot, and very aware of it. I'm also pessimist, who knows that when I'm wrong, its a good thing, because that means the world is better than I think.<br /> <br /> My interests in coreboot are twofold: one, to eliminate all non-free software from my environment, and the other is to have something I can actually rely on, and upgrade over time myself. Manageability is key, when you're doing things in a fully automated environment, or on a cluster. In my case, I've got both going on, a fully automated cluster, in the works.</div>

Juri http://www.coreboot.org/ASUS_P2B-F 2009-02-02T08:19:21Z

<p>Juri: SMBus is really untested.</p> <hr /> <div>[[Image:Asus_p2b-f.jpg|thumb|The ASUS P2B-F, revision 1.00]]<br /> <br /> == Status ==<br /> <br /> {{Status|<br /> <br /> |CPU_status = OK<br /> |CPU_L1_status = OK<br /> |CPU_L1_comments = CPU: L1 I cache: 16K, L1 D cache: 16K<br /> |CPU_L2_status = WIP<br /> |CPU_L2_comments = L2 cache is not being enabled at the moment. We're working on fixing it.<br /> |CPU_L3_status = N/A<br /> |CPU_multiple_status = N/A<br /> |CPU_multicore_status = N/A<br /> |CPU_virt_status = N/A<br /> <br /> |RAM_EDO_status = N/A<br /> |RAM_SDRAM_status = OK<br /> |RAM_SDRAM_comments = Works, but currently the RAM settings are hardcoded to one 64MB DIMM and certain speed settings. This will be fixed soon, a patch is on the way.<br /> |RAM_SODIMM_status = N/A<br /> |RAM_DDR_status = N/A<br /> |RAM_DDR2_status = N/A<br /> |RAM_DDR3_status = N/A<br /> |RAM_dualchannel_status = N/A<br /> |RAM_ecc_status = WIP<br /> |RAM_ecc_comments = Not yet supported by the coreboot 440BX code, but it's on our TODO list.<br /> <br /> |IDE_status = Untested<br /> |IDE_CF_status = OK<br /> |IDE_25_status = N/A<br /> |CDROM_DVD_status = Untested<br /> |SATA_status = N/A<br /> |USB_status = OK<br /> |USB_comments = Tested: USB keyboard in both USB ports.<br /> |Onboard_VGA_status = N/A<br /> |Onboard_ethernet_status = N/A<br /> |Onboard_audio_status = N/A<br /> |Onboard_modem_status = N/A<br /> |Onboard_firewire_status = N/A<br /> |Smartcard_status = N/A<br /> |Onboard_CF_status = N/A<br /> |Onboard_PCMCIA_status = N/A<br /> |Onboard_SCSI_status = N/A<br /> <br /> |ISA_cards_status = Untested<br /> |AMR_cards_status = N/A<br /> |AGP_cards_status = OK<br /> |AGP_cards_comments = Tested: AGP graphics card (ATI 3D Rage Pro AGP 1X/2X).<br /> |Mini_PCI_cards_status = N/A<br /> |PCI_cards_status = OK<br /> |PCI_cards_comments = Tested: PCI VGA card in all five PCI slots.<br /> |PCIE_x1_status = N/A<br /> |PCIE_x2_status = N/A<br /> |PCIE_x4_status = N/A<br /> |PCIE_x8_status = N/A<br /> |PCIE_x16_status = N/A<br /> |PCIE_x32_status = N/A<br /> |HTX_status = N/A<br /> <br /> |Floppy_status = Untested<br /> |COM1_status = OK<br /> |COM2_status = Untested<br /> |PP_status = OK<br /> |PP_comments = Doing '''modprobe ppdev''' works fine, but further tests were not performed.<br /> |PS2_keyboard_status = WIP<br /> |PS2_mouse_status = WIP<br /> |Game_port_status = N/A<br /> |IR_status = N/A<br /> |Speaker_status = OK<br /> |DiskOnChip_status = N/A<br /> <br /> |Sensors_status = OK<br /> |Sensors_comments = Works fine, you can use the '''w83781d''', '''i2c-piix4''', and '''eeprom''' kernel modules.<br /> |Watchdog_status = N/A<br /> |CAN_bus_status = N/A<br /> |CPUfreq_status = N/A<br /> |Powersave_status = N/A<br /> |ACPI_status = No<br /> |ACPI_comments = There's no ACPI implementation for this board.<br /> SMBus_status = Untested<br /> |Reboot_status = WIP<br /> |Poweroff_status = No<br /> |LEDs_status = N/A<br /> |LEDs_comments = No special-purpose LEDs available on the board.<br /> |HPET_status = N/A<br /> |RNG_status = N/A<br /> |WakeOnModem_status = <br /> |WakeOnLAN_status = <br /> |WakeOnKeyboard_status = <br /> |WakeOnMouse_status = <br /> |Flashrom_status = OK<br /> |Flashrom_comments = Works on both the vendor BIOS as well as on coreboot.<br /> <br /> }}<br /> == Build tutorial ==<br /> <br /> First, before thinking of using coreboot, make sure you have a backup of your current BIOS image(see [[Flashrom]]), and the correct facilities to replace that image, if it becomes corrupt. Assuming you have a backup and restore procedure, continue with the following(which may destroy your board anyways! you have been warned!)<br /> <br /> It is recommended that you have a known good PCI video card, a known good single sided PC100 non-ecc dimm, and a known good null modem cable before you proceed, for error recovery.<br /> <br /> CoreBoot has multiple [[Payloads]] used for the boot process ([[SeaBIOS]], [[FILO]], [[GRUB2]], etc), and you must build a payload first, so that CoreBoot can build it into itsself.<br /> <br /> after your payload is compiled(assuming you compiled the [[FILO]] payload), copy the resulting file to /tmp/filo.elf, then:<br /> <br /> Check out a copy of coreboot-v2<br /> $ svn co svn://coreboot.org/repos/trunk/coreboot-v2<br /> <br /> Build the files used to build the bios<br /> $ cd coreboot-v2/targets<br /> $ ./buildtarget asus/p2b-f<br /> <br /> Build the bios itsself<br /> $ cd asus/p2b-f/p2b-f<br /> $ make -s<br /> <br /> The resulting '''coreboot.rom''' is your coreboot ROM image you can flash using [[flashrom]].<br /> <br /> == Troubleshooting ==<br /> <br /> So, you installed coreboot, and now your board doesn't board boot?<br /> <br /> First, check the serial port, and see what sort of output you're getting. <br /> <br /> The following is what the section of coreboot on the P2B-F shows for memory setup:<br /> <br /> RAM Enable 1: Apply NOP<br /> RAM Enable 2: Precharge all<br /> RAM Enable 3: CBR<br /> RAM Enable 4: Mode register set<br /> RAM Enable 5: Normal operation<br /> RAM Enable 6: Enable refresh<br /> Enabling refresh (DRAMC = 0x09) for DIMM 00<br /> <br /> If in your output, you do not see the 'Enabling refresh' line, your ram chip is not being detected, or refreshed. try a different ram dimm, or a different dimm socket.<br /> <br /> If this doesn't solve your problem, remove all the PCI or ISA components other than your PCI video card (you do have one of those, right?). then remove your IDE and floppy devices, and try again. If that still does not give you output ,its time to upload the serial output you're getting after simplifying your hardware configuration to a paste website, and drop by IRC or the mailing list, and ask for help.<br /> <br /> {{GPL}}</div>

Juri http://www.coreboot.org/ASUS_P2B-F 2009-02-02T03:24:59Z

<p>Juri: no miniPCI either</p> <hr /> <div>[[Image:Asus_p2b-f.jpg|thumb|The ASUS P2B-F, revision 1.00]]<br /> <br /> == Status ==<br /> <br /> {{Status|<br /> <br /> |CPU_status = OK<br /> |CPU_L1_status = OK<br /> |CPU_L1_comments = CPU: L1 I cache: 16K, L1 D cache: 16K<br /> |CPU_L2_status = WIP<br /> |CPU_L2_comments = L2 cache is not being enabled at the moment. We're working on fixing it.<br /> |CPU_L3_status = N/A<br /> |CPU_multiple_status = N/A<br /> |CPU_multicore_status = N/A<br /> |CPU_virt_status = N/A<br /> <br /> |RAM_EDO_status = N/A<br /> |RAM_SDRAM_status = OK<br /> |RAM_SDRAM_comments = Works, but currently the RAM settings are hardcoded to one 64MB DIMM and certain speed settings. This will be fixed soon, a patch is on the way.<br /> |RAM_SODIMM_status = N/A<br /> |RAM_DDR_status = N/A<br /> |RAM_DDR2_status = N/A<br /> |RAM_DDR3_status = N/A<br /> |RAM_dualchannel_status = N/A<br /> |RAM_ecc_status = WIP<br /> |RAM_ecc_comments = Not yet supported by the coreboot 440BX code, but it's on our TODO list.<br /> <br /> |IDE_status = Untested<br /> |IDE_CF_status = OK<br /> |IDE_25_status = N/A<br /> |CDROM_DVD_status = Untested<br /> |SATA_status = N/A<br /> |USB_status = OK<br /> |USB_comments = Tested: USB keyboard in both USB ports.<br /> |Onboard_VGA_status = N/A<br /> |Onboard_ethernet_status = N/A<br /> |Onboard_audio_status = N/A<br /> |Onboard_modem_status = N/A<br /> |Onboard_firewire_status = N/A<br /> |Smartcard_status = N/A<br /> |Onboard_CF_status = N/A<br /> |Onboard_PCMCIA_status = N/A<br /> |Onboard_SCSI_status = N/A<br /> <br /> |ISA_cards_status = Untested<br /> |AMR_cards_status = N/A<br /> |AGP_cards_status = OK<br /> |AGP_cards_comments = Tested: AGP graphics card (ATI 3D Rage Pro AGP 1X/2X).<br /> |Mini_PCI_cards_status = N/A<br /> |PCI_cards_status = OK<br /> |PCI_cards_comments = Tested: PCI VGA card in all five PCI slots.<br /> |PCIE_x1_status = N/A<br /> |PCIE_x2_status = N/A<br /> |PCIE_x4_status = N/A<br /> |PCIE_x8_status = N/A<br /> |PCIE_x16_status = N/A<br /> |PCIE_x32_status = N/A<br /> |HTX_status = N/A<br /> <br /> |Floppy_status = Untested<br /> |COM1_status = OK<br /> |COM2_status = Untested<br /> |PP_status = OK<br /> |PP_comments = Doing '''modprobe ppdev''' works fine, but further tests were not performed.<br /> |PS2_keyboard_status = WIP<br /> |PS2_mouse_status = WIP<br /> |Game_port_status = N/A<br /> |IR_status = N/A<br /> |Speaker_status = OK<br /> |DiskOnChip_status = N/A<br /> <br /> |Sensors_status = OK<br /> |Sensors_comments = Works fine, you can use the '''w83781d''', '''i2c-piix4''', and '''eeprom''' kernel modules.<br /> |Watchdog_status = N/A<br /> |CAN_bus_status = N/A<br /> |CPUfreq_status = N/A<br /> |Powersave_status = N/A<br /> |ACPI_status = No<br /> |ACPI_comments = There's no ACPI implementation for this board.<br /> |Reboot_status = WIP<br /> |Poweroff_status = No<br /> |LEDs_status = N/A<br /> |LEDs_comments = No special-purpose LEDs available on the board.<br /> |HPET_status = N/A<br /> |RNG_status = N/A<br /> |WakeOnModem_status = <br /> |WakeOnLAN_status = <br /> |WakeOnKeyboard_status = <br /> |WakeOnMouse_status = <br /> |Flashrom_status = OK<br /> |Flashrom_comments = Works on both the vendor BIOS as well as on coreboot.<br /> <br /> }}<br /> == Build tutorial ==<br /> <br /> First, before thinking of using coreboot, make sure you have a backup of your current BIOS image(see [[Flashrom]]), and the correct facilities to replace that image, if it becomes corrupt. Assuming you have a backup and restore procedure, continue with the following(which may destroy your board anyways! you have been warned!)<br /> <br /> It is recommended that you have a known good PCI video card, a known good single sided PC100 non-ecc dimm, and a known good null modem cable before you proceed, for error recovery.<br /> <br /> CoreBoot has multiple [[Payloads]] used for the boot process ([[SeaBIOS]], [[FILO]], [[GRUB2]], etc), and you must build a payload first, so that CoreBoot can build it into itsself.<br /> <br /> after your payload is compiled(assuming you compiled the [[FILO]] payload), copy the resulting file to /tmp/filo.elf, then:<br /> <br /> Check out a copy of coreboot-v2<br /> $ svn co svn://coreboot.org/repos/trunk/coreboot-v2<br /> <br /> Build the files used to build the bios<br /> $ cd coreboot-v2/targets<br /> $ ./buildtarget asus/p2b-f<br /> <br /> Build the bios itsself<br /> $ cd asus/p2b-f/p2b-f<br /> $ make -s<br /> <br /> The resulting '''coreboot.rom''' is your coreboot ROM image you can flash using [[flashrom]].<br /> <br /> == Troubleshooting ==<br /> <br /> So, you installed coreboot, and now your board doesn't board boot?<br /> <br /> First, check the serial port, and see what sort of output you're getting. <br /> <br /> The following is what the section of coreboot on the P2B-F shows for memory setup:<br /> <br /> RAM Enable 1: Apply NOP<br /> RAM Enable 2: Precharge all<br /> RAM Enable 3: CBR<br /> RAM Enable 4: Mode register set<br /> RAM Enable 5: Normal operation<br /> RAM Enable 6: Enable refresh<br /> Enabling refresh (DRAMC = 0x09) for DIMM 00<br /> <br /> If in your output, you do not see the 'Enabling refresh' line, your ram chip is not being detected, or refreshed. try a different ram dimm, or a different dimm socket.<br /> <br /> If this doesn't solve your problem, remove all the PCI or ISA components other than your PCI video card (you do have one of those, right?). then remove your IDE and floppy devices, and try again. If that still does not give you output ,its time to upload the serial output you're getting after simplifying your hardware configuration to a paste website, and drop by IRC or the mailing list, and ask for help.<br /> <br /> {{GPL}}</div>

Juri http://www.coreboot.org/ASUS_P2B-F 2009-02-02T03:21:00Z

<p>Juri: There is no SCSI here.</p> <hr /> <div>[[Image:Asus_p2b-f.jpg|thumb|The ASUS P2B-F, revision 1.00]]<br /> <br /> == Status ==<br /> <br /> {{Status|<br /> <br /> |CPU_status = OK<br /> |CPU_L1_status = OK<br /> |CPU_L1_comments = CPU: L1 I cache: 16K, L1 D cache: 16K<br /> |CPU_L2_status = WIP<br /> |CPU_L2_comments = L2 cache is not being enabled at the moment. We're working on fixing it.<br /> |CPU_L3_status = N/A<br /> |CPU_multiple_status = N/A<br /> |CPU_multicore_status = N/A<br /> |CPU_virt_status = N/A<br /> <br /> |RAM_EDO_status = N/A<br /> |RAM_SDRAM_status = OK<br /> |RAM_SDRAM_comments = Works, but currently the RAM settings are hardcoded to one 64MB DIMM and certain speed settings. This will be fixed soon, a patch is on the way.<br /> |RAM_SODIMM_status = N/A<br /> |RAM_DDR_status = N/A<br /> |RAM_DDR2_status = N/A<br /> |RAM_DDR3_status = N/A<br /> |RAM_dualchannel_status = N/A<br /> |RAM_ecc_status = WIP<br /> |RAM_ecc_comments = Not yet supported by the coreboot 440BX code, but it's on our TODO list.<br /> <br /> |IDE_status = Untested<br /> |IDE_CF_status = OK<br /> |IDE_25_status = N/A<br /> |CDROM_DVD_status = Untested<br /> |SATA_status = N/A<br /> |USB_status = OK<br /> |USB_comments = Tested: USB keyboard in both USB ports.<br /> |Onboard_VGA_status = N/A<br /> |Onboard_ethernet_status = N/A<br /> |Onboard_audio_status = N/A<br /> |Onboard_modem_status = N/A<br /> |Onboard_firewire_status = N/A<br /> |Smartcard_status = N/A<br /> |Onboard_CF_status = N/A<br /> |Onboard_PCMCIA_status = N/A<br /> |Onboard_SCSI_status = N/A<br /> <br /> |ISA_cards_status = Untested<br /> |AMR_cards_status = N/A<br /> |AGP_cards_status = OK<br /> |AGP_cards_comments = Tested: AGP graphics card (ATI 3D Rage Pro AGP 1X/2X).<br /> |PCI_cards_status = OK<br /> |PCI_cards_comments = Tested: PCI VGA card in all five PCI slots.<br /> |PCIE_x1_status = N/A<br /> |PCIE_x2_status = N/A<br /> |PCIE_x4_status = N/A<br /> |PCIE_x8_status = N/A<br /> |PCIE_x16_status = N/A<br /> |PCIE_x32_status = N/A<br /> |HTX_status = N/A<br /> <br /> |Floppy_status = Untested<br /> |COM1_status = OK<br /> |COM2_status = Untested<br /> |PP_status = OK<br /> |PP_comments = Doing '''modprobe ppdev''' works fine, but further tests were not performed.<br /> |PS2_keyboard_status = WIP<br /> |PS2_mouse_status = WIP<br /> |Game_port_status = N/A<br /> |IR_status = N/A<br /> |Speaker_status = OK<br /> |DiskOnChip_status = N/A<br /> <br /> |Sensors_status = OK<br /> |Sensors_comments = Works fine, you can use the '''w83781d''', '''i2c-piix4''', and '''eeprom''' kernel modules.<br /> |Watchdog_status = N/A<br /> |CAN_bus_status = N/A<br /> |CPUfreq_status = N/A<br /> |Powersave_status = N/A<br /> |ACPI_status = No<br /> |ACPI_comments = There's no ACPI implementation for this board.<br /> |Reboot_status = WIP<br /> |Poweroff_status = No<br /> |LEDs_status = N/A<br /> |LEDs_comments = No special-purpose LEDs available on the board.<br /> |HPET_status = N/A<br /> |RNG_status = N/A<br /> |WakeOnModem_status = <br /> |WakeOnLAN_status = <br /> |WakeOnKeyboard_status = <br /> |WakeOnMouse_status = <br /> |Flashrom_status = OK<br /> |Flashrom_comments = Works on both the vendor BIOS as well as on coreboot.<br /> <br /> }}<br /> == Build tutorial ==<br /> <br /> First, before thinking of using coreboot, make sure you have a backup of your current BIOS image(see [[Flashrom]]), and the correct facilities to replace that image, if it becomes corrupt. Assuming you have a backup and restore procedure, continue with the following(which may destroy your board anyways! you have been warned!)<br /> <br /> It is recommended that you have a known good PCI video card, a known good single sided PC100 non-ecc dimm, and a known good null modem cable before you proceed, for error recovery.<br /> <br /> CoreBoot has multiple [[Payloads]] used for the boot process ([[SeaBIOS]], [[FILO]], [[GRUB2]], etc), and you must build a payload first, so that CoreBoot can build it into itsself.<br /> <br /> after your payload is compiled(assuming you compiled the [[FILO]] payload), copy the resulting file to /tmp/filo.elf, then:<br /> <br /> Check out a copy of coreboot-v2<br /> $ svn co svn://coreboot.org/repos/trunk/coreboot-v2<br /> <br /> Build the files used to build the bios<br /> $ cd coreboot-v2/targets<br /> $ ./buildtarget asus/p2b-f<br /> <br /> Build the bios itsself<br /> $ cd asus/p2b-f/p2b-f<br /> $ make -s<br /> <br /> The resulting '''coreboot.rom''' is your coreboot ROM image you can flash using [[flashrom]].<br /> <br /> == Troubleshooting ==<br /> <br /> So, you installed coreboot, and now your board doesn't board boot?<br /> <br /> First, check the serial port, and see what sort of output you're getting. <br /> <br /> The following is what the section of coreboot on the P2B-F shows for memory setup:<br /> <br /> RAM Enable 1: Apply NOP<br /> RAM Enable 2: Precharge all<br /> RAM Enable 3: CBR<br /> RAM Enable 4: Mode register set<br /> RAM Enable 5: Normal operation<br /> RAM Enable 6: Enable refresh<br /> Enabling refresh (DRAMC = 0x09) for DIMM 00<br /> <br /> If in your output, you do not see the 'Enabling refresh' line, your ram chip is not being detected, or refreshed. try a different ram dimm, or a different dimm socket.<br /> <br /> If this doesn't solve your problem, remove all the PCI or ISA components other than your PCI video card (you do have one of those, right?). then remove your IDE and floppy devices, and try again. If that still does not give you output ,its time to upload the serial output you're getting after simplifying your hardware configuration to a paste website, and drop by IRC or the mailing list, and ask for help.<br /> <br /> {{GPL}}</div>

Juri http://www.coreboot.org/Anatomy_of_a_Failover_coreboot_v2_Image 2009-02-02T03:01:54Z

<p>Juri: remove HTML to make page format better.</p> <hr /> <div>==You put what where?!==<br /> <br /> <br /> Pictorial view of FAILOVER_SIZE, _ROMBASE. ROM_IMAGE_SIZE, PAYLOAD_SIZE, ROM_SIZE, ROM_SECTION_SIZE, HAVE_FALLBACKBOOT, HAVE_FAILOVERBOOT for Options.lb and Config.lb.<br /> <br /> <br /> [[Image:LBv2_anatomy_image.PNG]]<br /> <br /> <br /> <br /> XIP_ROM_BASE and XIP_ROM_SIZE are for MTRR setting during CAR to cache part of the ROM image. Speeds up anything with loops like copies and decompression.<br /> <br /> <br /> <br /> ==Some Errors you might come across and probable solutions==<br /> <br /> <br /> ===Linuxbios input file larger than allowed size===<br /> '''Error:'''<br /> <br /> ./buildrom linuxbios.strip linuxbios.rom payload 0x70000 0x7f000<br /> linuxbios image is 458820 bytes; only 458752 allowed<br /> Linuxbios input file larger than allowed size!<br /> <br /> '''Solution:'''<br /> <br /> Typically caused by crt0 having a .data segment. Make sure all rom data is defined as constant.<br /> <br /> <br /> ===section .id overlaps section .rom===<br /> <br /> '''Error:'''<br /> <br /> gcc -m32 -nostdlib -nostartfiles -static -o linuxbios -T ldscript.ld crt0.o <br /> /usr/lib64/gcc/x86_64-suse-linux/4.3/../../../../x86_64-suse-linux/bin/ld: section .id [00000000ffffefd2 -&gt; 00000000ffffefef] overlaps section .rom [00000000fffeed83 -&gt; 00000000ffffff5f]<br /> /usr/lib64/gcc/x86_64-suse-linux/4.3/../../../../x86_64-suse-linux/bin/ld: linuxbios: section .id lma 0xffffefd2 overlaps previous sections<br /> /usr/lib64/gcc/x86_64-suse-linux/4.3/../../../../x86_64-suse-linux/bin/ld: linuxbios: section .reset lma 0xffffeff0 overlaps previous sections<br /> collect2: ld returned 1 exit status<br /> make[1]: *** [linuxbios] Error 1<br /> make[1]: Leaving directory `/srv/svn/linuxbios-extra/tmp/LinuxBIOSv2-3021/util/abuild/linuxbios-builds/amd_serengeti_cheetah_fam10/fallback'<br /> make: *** [fallback/linuxbios.rom] Error 1<br /> <br /> '''Solution:'''<br /> <br /> Increase the ROM_IMAGE_SIZE of the failing piece. In this case the fallback image.<br /> <br /> See also [[Section overlaps]] for a detailed description of a fix.</div>

Juri http://www.coreboot.org/ASUS_P2B-F 2009-02-02T02:45:55Z

<p>Juri: don't use HTML.</p> <hr /> <div>[[Image:Asus_p2b-f.jpg|thumb|The ASUS P2B-F, revision 1.00]]<br /> <br /> == Status ==<br /> <br /> {{Status|<br /> <br /> |CPU_status = OK<br /> |CPU_L1_status = OK<br /> |CPU_L1_comments = CPU: L1 I cache: 16K, L1 D cache: 16K<br /> |CPU_L2_status = WIP<br /> |CPU_L2_comments = L2 cache is not being enabled at the moment. We're working on fixing it.<br /> |CPU_L3_status = N/A<br /> |CPU_multiple_status = N/A<br /> |CPU_multicore_status = N/A<br /> |CPU_virt_status = N/A<br /> <br /> |RAM_EDO_status = N/A<br /> |RAM_SDRAM_status = OK<br /> |RAM_SDRAM_comments = Works, but currently the RAM settings are hardcoded to one 64MB DIMM and certain speed settings. This will be fixed soon, a patch is on the way.<br /> |RAM_SODIMM_status = N/A<br /> |RAM_DDR_status = N/A<br /> |RAM_DDR2_status = N/A<br /> |RAM_DDR3_status = N/A<br /> |RAM_dualchannel_status = N/A<br /> |RAM_ecc_status = WIP<br /> |RAM_ecc_comments = Not yet supported by the coreboot 440BX code, but it's on our TODO list.<br /> <br /> |IDE_status = Untested<br /> |IDE_CF_status = OK<br /> |IDE_25_status = N/A<br /> |CDROM_DVD_status = Untested<br /> |SATA_status = N/A<br /> |USB_status = OK<br /> |USB_comments = Tested: USB keyboard in both USB ports.<br /> |Onboard_VGA_status = N/A<br /> |Onboard_ethernet_status = N/A<br /> |Onboard_audio_status = N/A<br /> |Onboard_modem_status = N/A<br /> |Onboard_firewire_status = N/A<br /> |Smartcard_status = N/A<br /> |Onboard_CF_status = N/A<br /> |Onboard_PCMCIA_status = N/A<br /> <br /> |ISA_cards_status = Untested<br /> |AMR_cards_status = N/A<br /> |AGP_cards_status = OK<br /> |AGP_cards_comments = Tested: AGP graphics card (ATI 3D Rage Pro AGP 1X/2X).<br /> |PCI_cards_status = OK<br /> |PCI_cards_comments = Tested: PCI VGA card in all five PCI slots.<br /> |PCIE_x1_status = N/A<br /> |PCIE_x2_status = N/A<br /> |PCIE_x4_status = N/A<br /> |PCIE_x8_status = N/A<br /> |PCIE_x16_status = N/A<br /> |PCIE_x32_status = N/A<br /> |HTX_status = N/A<br /> <br /> |Floppy_status = Untested<br /> |COM1_status = OK<br /> |COM2_status = Untested<br /> |PP_status = OK<br /> |PP_comments = Doing '''modprobe ppdev''' works fine, but further tests were not performed.<br /> |PS2_keyboard_status = WIP<br /> |PS2_mouse_status = WIP<br /> |Game_port_status = N/A<br /> |IR_status = N/A<br /> |Speaker_status = OK<br /> |DiskOnChip_status = N/A<br /> <br /> |Sensors_status = OK<br /> |Sensors_comments = Works fine, you can use the '''w83781d''', '''i2c-piix4''', and '''eeprom''' kernel modules.<br /> |Watchdog_status = N/A<br /> |CAN_bus_status = N/A<br /> |CPUfreq_status = N/A<br /> |Powersave_status = N/A<br /> |ACPI_status = No<br /> |ACPI_comments = There's no ACPI implementation for this board.<br /> |Reboot_status = WIP<br /> |Poweroff_status = No<br /> |LEDs_status = N/A<br /> |LEDs_comments = No special-purpose LEDs available on the board.<br /> |HPET_status = N/A<br /> |RNG_status = N/A<br /> |WakeOnModem_status = <br /> |WakeOnLAN_status = <br /> |WakeOnKeyboard_status = <br /> |WakeOnMouse_status = <br /> |Flashrom_status = OK<br /> |Flashrom_comments = Works on both the vendor BIOS as well as on coreboot.<br /> <br /> }}<br /> == Build tutorial ==<br /> <br /> First, before thinking of using coreboot, make sure you have a backup of your current BIOS image(see [[Flashrom]]), and the correct facilities to replace that image, if it becomes corrupt. Assuming you have a backup and restore procedure, continue with the following(which may destroy your board anyways! you have been warned!)<br /> <br /> It is recommended that you have a known good PCI video card, a known good single sided PC100 non-ecc dimm, and a known good null modem cable before you proceed, for error recovery.<br /> <br /> CoreBoot has multiple [[Payloads]] used for the boot process ([[SeaBIOS]], [[FILO]], [[GRUB2]], etc), and you must build a payload first, so that CoreBoot can build it into itsself.<br /> <br /> after your payload is compiled(assuming you compiled the [[FILO]] payload), copy the resulting file to /tmp/filo.elf, then:<br /> <br /> Check out a copy of coreboot-v2<br /> $ svn co svn://coreboot.org/repos/trunk/coreboot-v2<br /> <br /> Build the files used to build the bios<br /> $ cd coreboot-v2/targets<br /> $ ./buildtarget asus/p2b-f<br /> <br /> Build the bios itsself<br /> $ cd asus/p2b-f/p2b-f<br /> $ make -s<br /> <br /> The resulting '''coreboot.rom''' is your coreboot ROM image you can flash using [[flashrom]].<br /> <br /> == Troubleshooting ==<br /> <br /> So, you installed coreboot, and now your board doesn't board boot?<br /> <br /> First, check the serial port, and see what sort of output you're getting. <br /> <br /> The following is what the section of coreboot on the P2B-F shows for memory setup:<br /> <br /> RAM Enable 1: Apply NOP<br /> RAM Enable 2: Precharge all<br /> RAM Enable 3: CBR<br /> RAM Enable 4: Mode register set<br /> RAM Enable 5: Normal operation<br /> RAM Enable 6: Enable refresh<br /> Enabling refresh (DRAMC = 0x09) for DIMM 00<br /> <br /> If in your output, you do not see the 'Enabling refresh' line, your ram chip is not being detected, or refreshed. try a different ram dimm, or a different dimm socket.<br /> <br /> If this doesn't solve your problem, remove all the PCI or ISA components other than your PCI video card (you do have one of those, right?). then remove your IDE and floppy devices, and try again. If that still does not give you output ,its time to upload the serial output you're getting after simplifying your hardware configuration to a paste website, and drop by IRC or the mailing list, and ask for help.<br /> <br /> {{GPL}}</div>

Juri http://www.coreboot.org/ASUS_P2B-F 2009-02-02T02:32:10Z

<p>Juri: start a troubleshooting section.</p> <hr /> <div>[[Image:Asus_p2b-f.jpg|thumb|The ASUS P2B-F, revision 1.00]]<br /> <br /> == Status ==<br /> <br /> {{Status|<br /> <br /> |CPU_status = OK<br /> |CPU_L1_status = OK<br /> |CPU_L1_comments = CPU: L1 I cache: 16K, L1 D cache: 16K<br /> |CPU_L2_status = WIP<br /> |CPU_L2_comments = L2 cache is not being enabled at the moment. We're working on fixing it.<br /> |CPU_L3_status = N/A<br /> |CPU_multiple_status = N/A<br /> |CPU_multicore_status = N/A<br /> |CPU_virt_status = N/A<br /> <br /> |RAM_EDO_status = N/A<br /> |RAM_SDRAM_status = OK<br /> |RAM_SDRAM_comments = Works, but currently the RAM settings are hardcoded to one 64MB DIMM and certain speed settings. This will be fixed soon, a patch is on the way.<br /> |RAM_SODIMM_status = N/A<br /> |RAM_DDR_status = N/A<br /> |RAM_DDR2_status = N/A<br /> |RAM_DDR3_status = N/A<br /> |RAM_dualchannel_status = N/A<br /> |RAM_ecc_status = WIP<br /> |RAM_ecc_comments = Not yet supported by the coreboot 440BX code, but it's on our TODO list.<br /> <br /> |IDE_status = Untested<br /> |IDE_CF_status = OK<br /> |IDE_25_status = N/A<br /> |CDROM_DVD_status = Untested<br /> |SATA_status = N/A<br /> |USB_status = OK<br /> |USB_comments = Tested: USB keyboard in both USB ports.<br /> |Onboard_VGA_status = N/A<br /> |Onboard_ethernet_status = N/A<br /> |Onboard_audio_status = N/A<br /> |Onboard_modem_status = N/A<br /> |Onboard_firewire_status = N/A<br /> |Smartcard_status = N/A<br /> |Onboard_CF_status = N/A<br /> |Onboard_PCMCIA_status = N/A<br /> <br /> |ISA_cards_status = Untested<br /> |AMR_cards_status = N/A<br /> |AGP_cards_status = OK<br /> |AGP_cards_comments = Tested: AGP graphics card (ATI 3D Rage Pro AGP 1X/2X).<br /> |PCI_cards_status = OK<br /> |PCI_cards_comments = Tested: PCI VGA card in all five PCI slots.<br /> |PCIE_x1_status = N/A<br /> |PCIE_x2_status = N/A<br /> |PCIE_x4_status = N/A<br /> |PCIE_x8_status = N/A<br /> |PCIE_x16_status = N/A<br /> |PCIE_x32_status = N/A<br /> |HTX_status = N/A<br /> <br /> |Floppy_status = Untested<br /> |COM1_status = OK<br /> |COM2_status = Untested<br /> |PP_status = OK<br /> |PP_comments = Doing '''modprobe ppdev''' works fine, but further tests were not performed.<br /> |PS2_keyboard_status = WIP<br /> |PS2_mouse_status = WIP<br /> |Game_port_status = N/A<br /> |IR_status = N/A<br /> |Speaker_status = OK<br /> |DiskOnChip_status = N/A<br /> <br /> |Sensors_status = OK<br /> |Sensors_comments = Works fine, you can use the '''w83781d''', '''i2c-piix4''', and '''eeprom''' kernel modules.<br /> |Watchdog_status = N/A<br /> |CAN_bus_status = N/A<br /> |CPUfreq_status = N/A<br /> |Powersave_status = N/A<br /> |ACPI_status = No<br /> |ACPI_comments = There's no ACPI implementation for this board.<br /> |Reboot_status = WIP<br /> |Poweroff_status = No<br /> |LEDs_status = N/A<br /> |LEDs_comments = No special-purpose LEDs available on the board.<br /> |HPET_status = N/A<br /> |RNG_status = N/A<br /> |WakeOnModem_status = <br /> |WakeOnLAN_status = <br /> |WakeOnKeyboard_status = <br /> |WakeOnMouse_status = <br /> |Flashrom_status = OK<br /> |Flashrom_comments = Works on both the vendor BIOS as well as on coreboot.<br /> <br /> }}<br /> == Build tutorial ==<br /> <br /> First, before thinking of using coreboot, make sure you have a backup of your current BIOS image(see [[Flashrom]]), and the correct facilities to replace that image, if it becomes corrupt. Assuming you have a backup and restore procedure, continue with the following(which may destroy your board anyways! you have been warned!)<br /> <br /> It is recommended that you have a known good PCI video card, a known good single sided PC100 non-ecc dimm, and a known good null modem cable before you proceed, for error recovery.<br /> <br /> CoreBoot has multiple [[Payloads]] used for the boot process ([[SeaBIOS]], [[FILO]], [[GRUB2]], etc), and you must build a payload first, so that CoreBoot can build it into itsself.<br /> <br /> after your payload is compiled(assuming you compiled the [[FILO]] payload), copy the resulting file to /tmp/filo.elf, then:<br /> <br /> Check out a copy of coreboot-v2<br /> $ svn co svn://coreboot.org/repos/trunk/coreboot-v2<br /> <br /> Build the files used to build the bios<br /> $ cd coreboot-v2/targets<br /> $ ./buildtarget asus/p2b-f<br /> <br /> Build the bios itsself<br /> $ cd asus/p2b-f/p2b-f<br /> $ make -s<br /> <br /> The resulting '''coreboot.rom''' is your coreboot ROM image you can flash using [[flashrom]].<br /> <br /> == Troubleshooting ==<br /> <br /> So, you installed coreboot, and now your board doesn't board boot?<br /> <br /> First, check the serial port, and see what sort of output you're getting. <br /> <br /> The following is what the section of coreboot on the P2B-F shows for memory setup:<br /> <br /> &lt;pre&gt;<br /> RAM Enable 1: Apply NOP<br /> RAM Enable 2: Precharge all<br /> RAM Enable 3: CBR<br /> RAM Enable 4: Mode register set<br /> RAM Enable 5: Normal operation<br /> RAM Enable 6: Enable refresh<br /> Enabling refresh (DRAMC = 0x09) for DIMM 00<br /> &lt;/pre&gt;<br /> <br /> If in your output, you do not see the 'Enabling refresh' line, your ram chip is not being detected, or refreshed. try a different ram dimm, or a different dimm socket.<br /> <br /> If this doesn't solve your problem, remove all the PCI or ISA components other than your PCI video card (you do have one of those, right?). then remove your IDE and floppy devices, and try again. If that still does not give you output ,its time to upload the serial output you're getting after simplifying your hardware configuration to a paste website, and drop by IRC or the mailing list, and ask for help.<br /> <br /> {{GPL}}</div>

Juri http://www.coreboot.org/ASUS_P2B-F 2009-02-01T00:53:25Z

<p>Juri: list hardware in case of emergency.</p> <hr /> <div>[[Image:Asus_p2b-f.jpg|thumb|The ASUS P2B-F, revision 1.00]]<br /> <br /> == Status ==<br /> <br /> {{Status|<br /> <br /> |CPU_status = OK<br /> |CPU_L1_status = OK<br /> |CPU_L1_comments = CPU: L1 I cache: 16K, L1 D cache: 16K<br /> |CPU_L2_status = WIP<br /> |CPU_L2_comments = L2 cache is not being enabled at the moment. We're working on fixing it.<br /> |CPU_L3_status = N/A<br /> |CPU_multiple_status = N/A<br /> |CPU_multicore_status = N/A<br /> |CPU_virt_status = N/A<br /> <br /> |RAM_EDO_status = N/A<br /> |RAM_SDRAM_status = OK<br /> |RAM_SDRAM_comments = Works, but currently the RAM settings are hardcoded to one 64MB DIMM and certain speed settings. This will be fixed soon, a patch is on the way.<br /> |RAM_SODIMM_status = N/A<br /> |RAM_DDR_status = N/A<br /> |RAM_DDR2_status = N/A<br /> |RAM_DDR3_status = N/A<br /> |RAM_dualchannel_status = N/A<br /> |RAM_ecc_status = WIP<br /> |RAM_ecc_comments = Not yet supported by the coreboot 440BX code, but it's on our TODO list.<br /> <br /> |IDE_status = Untested<br /> |IDE_CF_status = OK<br /> |IDE_25_status = N/A<br /> |CDROM_DVD_status = Untested<br /> |SATA_status = N/A<br /> |USB_status = OK<br /> |USB_comments = Tested: USB keyboard in both USB ports.<br /> |Onboard_VGA_status = N/A<br /> |Onboard_ethernet_status = N/A<br /> |Onboard_audio_status = N/A<br /> |Onboard_modem_status = N/A<br /> |Onboard_firewire_status = N/A<br /> |Smartcard_status = N/A<br /> |Onboard_CF_status = N/A<br /> |Onboard_PCMCIA_status = N/A<br /> <br /> |ISA_cards_status = Untested<br /> |AMR_cards_status = N/A<br /> |AGP_cards_status = OK<br /> |AGP_cards_comments = Tested: AGP graphics card (ATI 3D Rage Pro AGP 1X/2X).<br /> |PCI_cards_status = OK<br /> |PCI_cards_comments = Tested: PCI VGA card in all five PCI slots.<br /> |PCIE_x1_status = N/A<br /> |PCIE_x2_status = N/A<br /> |PCIE_x4_status = N/A<br /> |PCIE_x8_status = N/A<br /> |PCIE_x16_status = N/A<br /> |PCIE_x32_status = N/A<br /> |HTX_status = N/A<br /> <br /> |Floppy_status = Untested<br /> |COM1_status = OK<br /> |COM2_status = Untested<br /> |PP_status = OK<br /> |PP_comments = Doing '''modprobe ppdev''' works fine, but further tests were not performed.<br /> |PS2_keyboard_status = WIP<br /> |PS2_mouse_status = WIP<br /> |Game_port_status = N/A<br /> |IR_status = N/A<br /> |Speaker_status = OK<br /> |DiskOnChip_status = N/A<br /> <br /> |Sensors_status = OK<br /> |Sensors_comments = Works fine, you can use the '''w83781d''', '''i2c-piix4''', and '''eeprom''' kernel modules.<br /> |Watchdog_status = N/A<br /> |CAN_bus_status = N/A<br /> |CPUfreq_status = N/A<br /> |Powersave_status = N/A<br /> |ACPI_status = No<br /> |ACPI_comments = There's no ACPI implementation for this board.<br /> |Reboot_status = WIP<br /> |Poweroff_status = No<br /> |LEDs_status = N/A<br /> |LEDs_comments = No special-purpose LEDs available on the board.<br /> |HPET_status = N/A<br /> |RNG_status = N/A<br /> |WakeOnModem_status = <br /> |WakeOnLAN_status = <br /> |WakeOnKeyboard_status = <br /> |WakeOnMouse_status = <br /> |Flashrom_status = OK<br /> |Flashrom_comments = Works on both the vendor BIOS as well as on coreboot.<br /> <br /> }}<br /> == Build tutorial ==<br /> <br /> First, before thinking of using coreboot, make sure you have a backup of your current BIOS image(see [[Flashrom]]), and the correct facilities to replace that image, if it becomes corrupt. Assuming you have a backup and restore procedure, continue with the following(which may destroy your board anyways! you have been warned!)<br /> <br /> It is recommended that you have a known good PCI video card, a known good single sided PC100 non-ecc dimm, and a known good null modem cable before you proceed, for error recovery.<br /> <br /> CoreBoot has multiple [[Payloads]] used for the boot process ([[SeaBIOS]], [[FILO]], [[GRUB2]], etc), and you must build a payload first, so that CoreBoot can build it into itsself.<br /> <br /> after your payload is compiled(assuming you compiled the [[FILO]] payload), copy the resulting file to /tmp/filo.elf, then:<br /> <br /> Check out a copy of coreboot-v2<br /> $ svn co svn://coreboot.org/repos/trunk/coreboot-v2<br /> <br /> Build the files used to build the bios<br /> $ cd coreboot-v2/targets<br /> $ ./buildtarget asus/p2b-f<br /> <br /> Build the bios itsself<br /> $ cd asus/p2b-f/p2b-f<br /> $ make -s<br /> <br /> The resulting '''coreboot.rom''' is your coreboot ROM image you can flash using [[flashrom]].<br /> <br /> {{GPL}}</div>

Juri http://www.coreboot.org/ASUS_P2B-F 2009-01-27T02:00:59Z

<p>Juri: detail the build process</p> <hr /> <div>[[Image:Asus_p2b-f.jpg|thumb|The ASUS P2B-F, revision 1.00]]<br /> <br /> == Status ==<br /> <br /> {{Status|<br /> <br /> |CPU_status = OK<br /> |CPU_L1_status = OK<br /> |CPU_L1_comments = CPU: L1 I cache: 16K, L1 D cache: 16K<br /> |CPU_L2_status = WIP<br /> |CPU_L2_comments = L2 cache is not being enabled at the moment. We're working on fixing it.<br /> |CPU_L3_status = N/A<br /> |CPU_multiple_status = N/A<br /> |CPU_multicore_status = N/A<br /> |CPU_virt_status = N/A<br /> <br /> |RAM_EDO_status = N/A<br /> |RAM_SDRAM_status = OK<br /> |RAM_SDRAM_comments = Works, but currently the RAM settings are hardcoded to one 64MB DIMM and certain speed settings. This will be fixed soon, a patch is on the way.<br /> |RAM_SODIMM_status = N/A<br /> |RAM_DDR_status = N/A<br /> |RAM_DDR2_status = N/A<br /> |RAM_DDR3_status = N/A<br /> |RAM_dualchannel_status = N/A<br /> |RAM_ecc_status = WIP<br /> |RAM_ecc_comments = Not yet supported by the coreboot 440BX code, but it's on our TODO list.<br /> <br /> |IDE_status = Untested<br /> |IDE_CF_status = OK<br /> |IDE_25_status = N/A<br /> |CDROM_DVD_status = Untested<br /> |SATA_status = N/A<br /> |USB_status = OK<br /> |USB_comments = Tested: USB keyboard in both USB ports.<br /> |Onboard_VGA_status = N/A<br /> |Onboard_ethernet_status = N/A<br /> |Onboard_audio_status = N/A<br /> |Onboard_modem_status = N/A<br /> |Onboard_firewire_status = N/A<br /> |Smartcard_status = N/A<br /> |Onboard_CF_status = N/A<br /> |Onboard_PCMCIA_status = N/A<br /> <br /> |ISA_cards_status = Untested<br /> |AMR_cards_status = N/A<br /> |AGP_cards_status = OK<br /> |AGP_cards_comments = Tested: AGP graphics card (ATI 3D Rage Pro AGP 1X/2X).<br /> |PCI_cards_status = OK<br /> |PCI_cards_comments = Tested: PCI VGA card in all five PCI slots.<br /> |PCIE_x1_status = N/A<br /> |PCIE_x2_status = N/A<br /> |PCIE_x4_status = N/A<br /> |PCIE_x8_status = N/A<br /> |PCIE_x16_status = N/A<br /> |PCIE_x32_status = N/A<br /> |HTX_status = N/A<br /> <br /> |Floppy_status = Untested<br /> |COM1_status = OK<br /> |COM2_status = Untested<br /> |PP_status = OK<br /> |PP_comments = Doing '''modprobe ppdev''' works fine, but further tests were not performed.<br /> |PS2_keyboard_status = WIP<br /> |PS2_mouse_status = WIP<br /> |Game_port_status = N/A<br /> |IR_status = N/A<br /> |Speaker_status = OK<br /> |DiskOnChip_status = N/A<br /> <br /> |Sensors_status = OK<br /> |Sensors_comments = Works fine, you can use the '''w83781d''', '''i2c-piix4''', and '''eeprom''' kernel modules.<br /> |Watchdog_status = N/A<br /> |CAN_bus_status = N/A<br /> |CPUfreq_status = N/A<br /> |Powersave_status = N/A<br /> |ACPI_status = No<br /> |ACPI_comments = There's no ACPI implementation for this board.<br /> |Reboot_status = WIP<br /> |Poweroff_status = No<br /> |LEDs_status = N/A<br /> |LEDs_comments = No special-purpose LEDs available on the board.<br /> |HPET_status = N/A<br /> |RNG_status = N/A<br /> |WakeOnModem_status = <br /> |WakeOnLAN_status = <br /> |WakeOnKeyboard_status = <br /> |WakeOnMouse_status = <br /> |Flashrom_status = OK<br /> |Flashrom_comments = Works on both the vendor BIOS as well as on coreboot.<br /> <br /> }}<br /> == Build tutorial ==<br /> <br /> First, before thinking of using coreboot, make sure you have a backup of your current BIOS image(see [[Flashrom]]), and the correct facilities to replace that image, if it becomes corrupt. Assuming you have a backup and restore procedure, continue with the following(which may destroy your board anyways! you have been warned!)<br /> <br /> CoreBoot has multiple [[Payloads]] used for the boot process ([[SeaBIOS]], [[FILO]], [[GRUB2]], etc), and you must build a payload first, so that CoreBoot can build it into itsself.<br /> <br /> after your payload is compiled(assuming you compiled the [[FILO]] payload), copy the resulting file to /tmp/filo.elf, then:<br /> <br /> Check out a copy of coreboot-v2<br /> $ svn co svn://coreboot.org/repos/trunk/coreboot-v2<br /> <br /> Build the files used to build the bios<br /> $ cd coreboot-v2/targets<br /> $ ./buildtarget asus/p2b-f<br /> <br /> Build the bios itsself<br /> $ cd asus/p2b-f/p2b-f<br /> $ make -s<br /> <br /> The resulting '''coreboot.rom''' is your coreboot ROM image you can flash using [[flashrom]].<br /> <br /> {{GPL}}</div>

Juri http://www.coreboot.org/ASUS_P2B-F 2009-01-26T04:42:08Z

<p>Juri: Missing space.</p> <hr /> <div>[[Image:Asus_p2b-f.jpg|thumb|The ASUS P2B-F, revision 1.00]]<br /> <br /> == Status ==<br /> <br /> {{Status|<br /> <br /> |CPU_status = OK<br /> |CPU_L1_status = OK<br /> |CPU_L1_comments = CPU: L1 I cache: 16K, L1 D cache: 16K<br /> |CPU_L2_status = WIP<br /> |CPU_L2_comments = L2 cache is not being enabled at the moment. We're working on fixing it.<br /> |CPU_L3_status = N/A<br /> |CPU_multiple_status = N/A<br /> |CPU_multicore_status = N/A<br /> |CPU_virt_status = N/A<br /> <br /> |RAM_EDO_status = N/A<br /> |RAM_SDRAM_status = OK<br /> |RAM_SDRAM_comments = Works, but currently the RAM settings are hardcoded to one 64MB DIMM and certain speed settings. This will be fixed soon, a patch is on the way.<br /> |RAM_SODIMM_status = N/A<br /> |RAM_DDR_status = N/A<br /> |RAM_DDR2_status = N/A<br /> |RAM_DDR3_status = N/A<br /> |RAM_dualchannel_status = N/A<br /> |RAM_ecc_status = WIP<br /> |RAM_ecc_comments = Not yet supported by the coreboot 440BX code, but it's on our TODO list.<br /> <br /> |IDE_status = Untested<br /> |IDE_CF_status = OK<br /> |IDE_25_status = N/A<br /> |CDROM_DVD_status = Untested<br /> |SATA_status = N/A<br /> |USB_status = OK<br /> |USB_comments = Tested: USB keyboard in both USB ports.<br /> |Onboard_VGA_status = N/A<br /> |Onboard_ethernet_status = N/A<br /> |Onboard_audio_status = N/A<br /> |Onboard_modem_status = N/A<br /> |Onboard_firewire_status = N/A<br /> |Smartcard_status = N/A<br /> |Onboard_CF_status = N/A<br /> |Onboard_PCMCIA_status = N/A<br /> <br /> |ISA_cards_status = Untested<br /> |AMR_cards_status = N/A<br /> |AGP_cards_status = OK<br /> |AGP_cards_comments = Tested: AGP graphics card (ATI 3D Rage Pro AGP 1X/2X).<br /> |PCI_cards_status = OK<br /> |PCI_cards_comments = Tested: PCI VGA card in all five PCI slots.<br /> |PCIE_x1_status = N/A<br /> |PCIE_x2_status = N/A<br /> |PCIE_x4_status = N/A<br /> |PCIE_x8_status = N/A<br /> |PCIE_x16_status = N/A<br /> |PCIE_x32_status = N/A<br /> |HTX_status = N/A<br /> <br /> |Floppy_status = Untested<br /> |COM1_status = OK<br /> |COM2_status = Untested<br /> |PP_status = OK<br /> |PP_comments = Doing '''modprobe ppdev''' works fine, but further tests were not performed.<br /> |PS2_keyboard_status = WIP<br /> |PS2_mouse_status = WIP<br /> |Game_port_status = N/A<br /> |IR_status = N/A<br /> |Speaker_status = OK<br /> |DiskOnChip_status = N/A<br /> <br /> |Sensors_status = OK<br /> |Sensors_comments = Works fine, you can use the '''w83781d''', '''i2c-piix4''', and '''eeprom''' kernel modules.<br /> |Watchdog_status = N/A<br /> |CAN_bus_status = N/A<br /> |CPUfreq_status = N/A<br /> |Powersave_status = N/A<br /> |ACPI_status = No<br /> |ACPI_comments = There's no ACPI implementation for this board.<br /> |Reboot_status = WIP<br /> |Poweroff_status = No<br /> |LEDs_status = N/A<br /> |LEDs_comments = No special-purpose LEDs available on the board.<br /> |HPET_status = N/A<br /> |RNG_status = N/A<br /> |WakeOnModem_status = <br /> |WakeOnLAN_status = <br /> |WakeOnKeyboard_status = <br /> |WakeOnMouse_status = <br /> |Flashrom_status = OK<br /> |Flashrom_comments = Works on both the vendor BIOS as well as on coreboot.<br /> <br /> }}<br /> == Build tutorial ==<br /> <br /> First, before thinking of using coreboot, make sure you have a backup of your current BIOS image(see [[Flashrom]]), and the correct facilities to replace that image, if it becomes corrupt. Assuming you have a backup and restore procedure, continue with the following(which may destroy your board anyways! you have been warned!)<br /> <br /> coreboot has multiple [[Payloads]] used for the boot process ([[SeaBIOS]], [[FILO]], [[GRUB2]], etc), and you must build a payload first, so that coreboot can build it into itsself.<br /> <br /> after your payload is compiled, copy the resulting file to /tmp/filo.elf, then<br /> <br /> $ svn co svn://coreboot.org/repos/trunk/coreboot-v2<br /> $ cd coreboot-v2/targets<br /> $ ./buildtarget asus/p2b-f<br /> $ cd asus/p2b-f/p2b-f<br /> $ make -s<br /> <br /> The resulting '''coreboot.rom''' is your coreboot ROM image you can flash using [[flashrom]].<br /> <br /> {{GPL}}</div>

Juri http://www.coreboot.org/ASUS_P2B-F 2009-01-26T04:39:30Z

<p>Juri: Flashrom mention, and english correction.</p> <hr /> <div>[[Image:Asus_p2b-f.jpg|thumb|The ASUS P2B-F, revision 1.00]]<br /> <br /> == Status ==<br /> <br /> {{Status|<br /> <br /> |CPU_status = OK<br /> |CPU_L1_status = OK<br /> |CPU_L1_comments = CPU: L1 I cache: 16K, L1 D cache: 16K<br /> |CPU_L2_status = WIP<br /> |CPU_L2_comments = L2 cache is not being enabled at the moment. We're working on fixing it.<br /> |CPU_L3_status = N/A<br /> |CPU_multiple_status = N/A<br /> |CPU_multicore_status = N/A<br /> |CPU_virt_status = N/A<br /> <br /> |RAM_EDO_status = N/A<br /> |RAM_SDRAM_status = OK<br /> |RAM_SDRAM_comments = Works, but currently the RAM settings are hardcoded to one 64MB DIMM and certain speed settings. This will be fixed soon, a patch is on the way.<br /> |RAM_SODIMM_status = N/A<br /> |RAM_DDR_status = N/A<br /> |RAM_DDR2_status = N/A<br /> |RAM_DDR3_status = N/A<br /> |RAM_dualchannel_status = N/A<br /> |RAM_ecc_status = WIP<br /> |RAM_ecc_comments = Not yet supported by the coreboot 440BX code, but it's on our TODO list.<br /> <br /> |IDE_status = Untested<br /> |IDE_CF_status = OK<br /> |IDE_25_status = N/A<br /> |CDROM_DVD_status = Untested<br /> |SATA_status = N/A<br /> |USB_status = OK<br /> |USB_comments = Tested: USB keyboard in both USB ports.<br /> |Onboard_VGA_status = N/A<br /> |Onboard_ethernet_status = N/A<br /> |Onboard_audio_status = N/A<br /> |Onboard_modem_status = N/A<br /> |Onboard_firewire_status = N/A<br /> |Smartcard_status = N/A<br /> |Onboard_CF_status = N/A<br /> |Onboard_PCMCIA_status = N/A<br /> <br /> |ISA_cards_status = Untested<br /> |AMR_cards_status = N/A<br /> |AGP_cards_status = OK<br /> |AGP_cards_comments = Tested: AGP graphics card (ATI 3D Rage Pro AGP 1X/2X).<br /> |PCI_cards_status = OK<br /> |PCI_cards_comments = Tested: PCI VGA card in all five PCI slots.<br /> |PCIE_x1_status = N/A<br /> |PCIE_x2_status = N/A<br /> |PCIE_x4_status = N/A<br /> |PCIE_x8_status = N/A<br /> |PCIE_x16_status = N/A<br /> |PCIE_x32_status = N/A<br /> |HTX_status = N/A<br /> <br /> |Floppy_status = Untested<br /> |COM1_status = OK<br /> |COM2_status = Untested<br /> |PP_status = OK<br /> |PP_comments = Doing '''modprobe ppdev''' works fine, but further tests were not performed.<br /> |PS2_keyboard_status = WIP<br /> |PS2_mouse_status = WIP<br /> |Game_port_status = N/A<br /> |IR_status = N/A<br /> |Speaker_status = OK<br /> |DiskOnChip_status = N/A<br /> <br /> |Sensors_status = OK<br /> |Sensors_comments = Works fine, you can use the '''w83781d''', '''i2c-piix4''', and '''eeprom''' kernel modules.<br /> |Watchdog_status = N/A<br /> |CAN_bus_status = N/A<br /> |CPUfreq_status = N/A<br /> |Powersave_status = N/A<br /> |ACPI_status = No<br /> |ACPI_comments = There's no ACPI implementation for this board.<br /> |Reboot_status = WIP<br /> |Poweroff_status = No<br /> |LEDs_status = N/A<br /> |LEDs_comments = No special-purpose LEDs available on the board.<br /> |HPET_status = N/A<br /> |RNG_status = N/A<br /> |WakeOnModem_status = <br /> |WakeOnLAN_status = <br /> |WakeOnKeyboard_status = <br /> |WakeOnMouse_status = <br /> |Flashrom_status = OK<br /> |Flashrom_comments = Works on both the vendor BIOS as well as on coreboot.<br /> <br /> }}<br /> == Build tutorial ==<br /> <br /> First, before thinking of using coreboot, make sure you have a backup of your current BIOS image(see[[Flashrom]]), and the correct facilities to replace that image, if it becomes corrupt. Assuming you have a backup and restore procedure, continue with the following(which may destroy your board anyways! you have been warned!)<br /> <br /> coreboot has multiple [[Payloads]] used for the boot process ([[SeaBIOS]], [[FILO]], [[GRUB2]], etc), and you must build a payload first, so that coreboot can build it into itsself.<br /> <br /> after your payload is compiled, copy the resulting file to /tmp/filo.elf, then<br /> <br /> $ svn co svn://coreboot.org/repos/trunk/coreboot-v2<br /> $ cd coreboot-v2/targets<br /> $ ./buildtarget asus/p2b-f<br /> $ cd asus/p2b-f/p2b-f<br /> $ make -s<br /> <br /> The resulting '''coreboot.rom''' is your coreboot ROM image you can flash using [[flashrom]].<br /> <br /> {{GPL}}</div>

Juri http://www.coreboot.org/ASUS_P2B-F 2009-01-25T20:37:39Z

<p>Juri: /* Build tutorial */</p> <hr /> <div>[[Image:Asus_p2b-f.jpg|thumb|The ASUS P2B-F, revision 1.00]]<br /> <br /> == Status ==<br /> <br /> {{Status|<br /> <br /> |CPU_status = OK<br /> |CPU_L1_status = OK<br /> |CPU_L1_comments = CPU: L1 I cache: 16K, L1 D cache: 16K<br /> |CPU_L2_status = WIP<br /> |CPU_L2_comments = L2 cache is not being enabled at the moment. We're working on fixing it.<br /> |CPU_L3_status = N/A<br /> |CPU_multiple_status = N/A<br /> |CPU_multicore_status = N/A<br /> |CPU_virt_status = N/A<br /> <br /> |RAM_EDO_status = N/A<br /> |RAM_SDRAM_status = OK<br /> |RAM_SDRAM_comments = Works, but currently the RAM settings are hardcoded to one 64MB DIMM and certain speed settings. This will be fixed soon, a patch is on the way.<br /> |RAM_SODIMM_status = N/A<br /> |RAM_DDR_status = N/A<br /> |RAM_DDR2_status = N/A<br /> |RAM_DDR3_status = N/A<br /> |RAM_dualchannel_status = N/A<br /> |RAM_ecc_status = WIP<br /> |RAM_ecc_comments = Not yet supported by the coreboot 440BX code, but it's on our TODO list.<br /> <br /> |IDE_status = Untested<br /> |IDE_CF_status = OK<br /> |IDE_25_status = N/A<br /> |CDROM_DVD_status = Untested<br /> |SATA_status = N/A<br /> |USB_status = OK<br /> |USB_comments = Tested: USB keyboard in both USB ports.<br /> |Onboard_VGA_status = N/A<br /> |Onboard_ethernet_status = N/A<br /> |Onboard_audio_status = N/A<br /> |Onboard_modem_status = N/A<br /> |Onboard_firewire_status = N/A<br /> |Smartcard_status = N/A<br /> |Onboard_CF_status = N/A<br /> |Onboard_PCMCIA_status = N/A<br /> <br /> |ISA_cards_status = Untested<br /> |AMR_cards_status = N/A<br /> |AGP_cards_status = OK<br /> |AGP_cards_comments = Tested: AGP graphics card (ATI 3D Rage Pro AGP 1X/2X).<br /> |PCI_cards_status = OK<br /> |PCI_cards_comments = Tested: PCI VGA card in all five PCI slots.<br /> |PCIE_x1_status = N/A<br /> |PCIE_x2_status = N/A<br /> |PCIE_x4_status = N/A<br /> |PCIE_x8_status = N/A<br /> |PCIE_x16_status = N/A<br /> |PCIE_x32_status = N/A<br /> |HTX_status = N/A<br /> <br /> |Floppy_status = Untested<br /> |COM1_status = OK<br /> |COM2_status = Untested<br /> |PP_status = OK<br /> |PP_comments = Doing '''modprobe ppdev''' works fine, but further tests were not performed.<br /> |PS2_keyboard_status = WIP<br /> |PS2_mouse_status = WIP<br /> |Game_port_status = N/A<br /> |IR_status = N/A<br /> |Speaker_status = OK<br /> |DiskOnChip_status = N/A<br /> <br /> |Sensors_status = OK<br /> |Sensors_comments = Works fine, you can use the '''w83781d''', '''i2c-piix4''', and '''eeprom''' kernel modules.<br /> |Watchdog_status = N/A<br /> |CAN_bus_status = N/A<br /> |CPUfreq_status = N/A<br /> |Powersave_status = N/A<br /> |ACPI_status = No<br /> |ACPI_comments = There's no ACPI implementation for this board.<br /> |Reboot_status = WIP<br /> |Poweroff_status = No<br /> |LEDs_status = N/A<br /> |LEDs_comments = No special-purpose LEDs available on the board.<br /> |HPET_status = N/A<br /> |RNG_status = N/A<br /> |WakeOnModem_status = <br /> |WakeOnLAN_status = <br /> |WakeOnKeyboard_status = <br /> |WakeOnMouse_status = <br /> |Flashrom_status = OK<br /> |Flashrom_comments = Works on both the vendor BIOS as well as on coreboot.<br /> <br /> }}<br /> == Build tutorial ==<br /> <br /> first, before thinking of using coreboot, make sure you have a backup of your bios image, and the correct facilities to replace that image, if it becomes corrupt. after that, continue with the following(which may destroy your board anyways! you have been warned!)<br /> <br /> coreboot has multiple [[Payloads]] used for the boot process ([[SeaBIOS]], [[FILO]], [[GRUB2]], etc), and you must build a payload first, so that coreboot can build it into itsself.<br /> <br /> after your payload is compiled, copy the resulting file to /tmp/filo.elf, then<br /> <br /> $ svn co svn://coreboot.org/repos/trunk/coreboot-v2<br /> $ cd coreboot-v2/targets<br /> $ ./buildtarget asus/p2b-f<br /> $ cd asus/p2b-f/p2b-f<br /> $ make -s<br /> <br /> The resulting '''coreboot.rom''' is your coreboot ROM image you can flash using [[flashrom]].<br /> <br /> {{GPL}}</div>

Juri http://www.coreboot.org/ASUS_P2B-F 2009-01-25T20:00:24Z

<p>Juri: typo, mention copying the payload around.</p> <hr /> <div>[[Image:Asus_p2b-f.jpg|thumb|The ASUS P2B-F, revision 1.00]]<br /> <br /> == Status ==<br /> <br /> {{Status|<br /> <br /> |CPU_status = OK<br /> |CPU_L1_status = OK<br /> |CPU_L1_comments = CPU: L1 I cache: 16K, L1 D cache: 16K<br /> |CPU_L2_status = WIP<br /> |CPU_L2_comments = L2 cache is not being enabled at the moment. We're working on fixing it.<br /> |CPU_L3_status = N/A<br /> |CPU_multiple_status = N/A<br /> |CPU_multicore_status = N/A<br /> |CPU_virt_status = N/A<br /> <br /> |RAM_EDO_status = N/A<br /> |RAM_SDRAM_status = OK<br /> |RAM_SDRAM_comments = Works, but currently the RAM settings are hardcoded to one 64MB DIMM and certain speed settings. This will be fixed soon, a patch is on the way.<br /> |RAM_SODIMM_status = N/A<br /> |RAM_DDR_status = N/A<br /> |RAM_DDR2_status = N/A<br /> |RAM_DDR3_status = N/A<br /> |RAM_dualchannel_status = N/A<br /> |RAM_ecc_status = WIP<br /> |RAM_ecc_comments = Not yet supported by the coreboot 440BX code, but it's on our TODO list.<br /> <br /> |IDE_status = Untested<br /> |IDE_CF_status = OK<br /> |IDE_25_status = N/A<br /> |CDROM_DVD_status = Untested<br /> |SATA_status = N/A<br /> |USB_status = OK<br /> |USB_comments = Tested: USB keyboard in both USB ports.<br /> |Onboard_VGA_status = N/A<br /> |Onboard_ethernet_status = N/A<br /> |Onboard_audio_status = N/A<br /> |Onboard_modem_status = N/A<br /> |Onboard_firewire_status = N/A<br /> |Smartcard_status = N/A<br /> |Onboard_CF_status = N/A<br /> |Onboard_PCMCIA_status = N/A<br /> <br /> |ISA_cards_status = Untested<br /> |AMR_cards_status = N/A<br /> |AGP_cards_status = OK<br /> |AGP_cards_comments = Tested: AGP graphics card (ATI 3D Rage Pro AGP 1X/2X).<br /> |PCI_cards_status = OK<br /> |PCI_cards_comments = Tested: PCI VGA card in all five PCI slots.<br /> |PCIE_x1_status = N/A<br /> |PCIE_x2_status = N/A<br /> |PCIE_x4_status = N/A<br /> |PCIE_x8_status = N/A<br /> |PCIE_x16_status = N/A<br /> |PCIE_x32_status = N/A<br /> |HTX_status = N/A<br /> <br /> |Floppy_status = Untested<br /> |COM1_status = OK<br /> |COM2_status = Untested<br /> |PP_status = OK<br /> |PP_comments = Doing '''modprobe ppdev''' works fine, but further tests were not performed.<br /> |PS2_keyboard_status = WIP<br /> |PS2_mouse_status = WIP<br /> |Game_port_status = N/A<br /> |IR_status = N/A<br /> |Speaker_status = OK<br /> |DiskOnChip_status = N/A<br /> <br /> |Sensors_status = OK<br /> |Sensors_comments = Works fine, you can use the '''w83781d''', '''i2c-piix4''', and '''eeprom''' kernel modules.<br /> |Watchdog_status = N/A<br /> |CAN_bus_status = N/A<br /> |CPUfreq_status = N/A<br /> |Powersave_status = N/A<br /> |ACPI_status = No<br /> |ACPI_comments = There's no ACPI implementation for this board.<br /> |Reboot_status = WIP<br /> |Poweroff_status = No<br /> |LEDs_status = N/A<br /> |LEDs_comments = No special-purpose LEDs available on the board.<br /> |HPET_status = N/A<br /> |RNG_status = N/A<br /> |WakeOnModem_status = <br /> |WakeOnLAN_status = <br /> |WakeOnKeyboard_status = <br /> |WakeOnMouse_status = <br /> |Flashrom_status = OK<br /> |Flashrom_comments = Works on both the vendor BIOS as well as on coreboot.<br /> <br /> }}<br /> == Build tutorial ==<br /> <br /> the first thing to remember, is that coreboot has multiple [[Payloads]] used for the boot process ([[SeaBIOS]], [[FILO]], [[GRUB2]], etc), and you must build a payload first, so that coreboot can build it into itsself.<br /> <br /> after your payload is compiled, copy the resulting file to /tmp/filo.elf, then<br /> <br /> $ svn co svn://coreboot.org/repos/trunk/coreboot-v2<br /> $ cd coreboot-v2/targets<br /> $ ./buildtarget asus/p2b-f<br /> $ cd asus/p2b-f/p2b-f<br /> $ make -s<br /> <br /> The resulting '''coreboot.rom''' is your coreboot ROM image you can flash using [[flashrom]].<br /> <br /> {{GPL}}</div>

Juri http://www.coreboot.org/ASUS_P2B-F 2009-01-25T19:47:25Z

<p>Juri: wikiize grub2, link to the payloads page.</p> <hr /> <div>[[Image:Asus_p2b-f.jpg|thumb|The ASUS P2B-F, revision 1.00]]<br /> <br /> == Status ==<br /> <br /> {{Status|<br /> <br /> |CPU_status = OK<br /> |CPU_L1_status = OK<br /> |CPU_L1_comments = CPU: L1 I cache: 16K, L1 D cache: 16K<br /> |CPU_L2_status = WIP<br /> |CPU_L2_comments = L2 cache is not being enabled at the moment. We're working on fixing it.<br /> |CPU_L3_status = N/A<br /> |CPU_multiple_status = N/A<br /> |CPU_multicore_status = N/A<br /> |CPU_virt_status = N/A<br /> <br /> |RAM_EDO_status = N/A<br /> |RAM_SDRAM_status = OK<br /> |RAM_SDRAM_comments = Works, but currently the RAM settings are hardcoded to one 64MB DIMM and certain speed settings. This will be fixed soon, a patch is on the way.<br /> |RAM_SODIMM_status = N/A<br /> |RAM_DDR_status = N/A<br /> |RAM_DDR2_status = N/A<br /> |RAM_DDR3_status = N/A<br /> |RAM_dualchannel_status = N/A<br /> |RAM_ecc_status = WIP<br /> |RAM_ecc_comments = Not yet supported by the coreboot 440BX code, but it's on our TODO list.<br /> <br /> |IDE_status = Untested<br /> |IDE_CF_status = OK<br /> |IDE_25_status = N/A<br /> |CDROM_DVD_status = Untested<br /> |SATA_status = N/A<br /> |USB_status = OK<br /> |USB_comments = Tested: USB keyboard in both USB ports.<br /> |Onboard_VGA_status = N/A<br /> |Onboard_ethernet_status = N/A<br /> |Onboard_audio_status = N/A<br /> |Onboard_modem_status = N/A<br /> |Onboard_firewire_status = N/A<br /> |Smartcard_status = N/A<br /> |Onboard_CF_status = N/A<br /> |Onboard_PCMCIA_status = N/A<br /> <br /> |ISA_cards_status = Untested<br /> |AMR_cards_status = N/A<br /> |AGP_cards_status = OK<br /> |AGP_cards_comments = Tested: AGP graphics card (ATI 3D Rage Pro AGP 1X/2X).<br /> |PCI_cards_status = OK<br /> |PCI_cards_comments = Tested: PCI VGA card in all five PCI slots.<br /> |PCIE_x1_status = N/A<br /> |PCIE_x2_status = N/A<br /> |PCIE_x4_status = N/A<br /> |PCIE_x8_status = N/A<br /> |PCIE_x16_status = N/A<br /> |PCIE_x32_status = N/A<br /> |HTX_status = N/A<br /> <br /> |Floppy_status = Untested<br /> |COM1_status = OK<br /> |COM2_status = Untested<br /> |PP_status = OK<br /> |PP_comments = Doing '''modprobe ppdev''' works fine, but further tests were not performed.<br /> |PS2_keyboard_status = WIP<br /> |PS2_mouse_status = WIP<br /> |Game_port_status = N/A<br /> |IR_status = N/A<br /> |Speaker_status = OK<br /> |DiskOnChip_status = N/A<br /> <br /> |Sensors_status = OK<br /> |Sensors_comments = Works fine, you can use the '''w83781d''', '''i2c-piix4''', and '''eeprom''' kernel modules.<br /> |Watchdog_status = N/A<br /> |CAN_bus_status = N/A<br /> |CPUfreq_status = N/A<br /> |Powersave_status = N/A<br /> |ACPI_status = No<br /> |ACPI_comments = There's no ACPI implementation for this board.<br /> |Reboot_status = WIP<br /> |Poweroff_status = No<br /> |LEDs_status = N/A<br /> |LEDs_comments = No special-purpose LEDs available on the board.<br /> |HPET_status = N/A<br /> |RNG_status = N/A<br /> |WakeOnModem_status = <br /> |WakeOnLAN_status = <br /> |WakeOnKeyboard_status = <br /> |WakeOnMouse_status = <br /> |Flashrom_status = OK<br /> |Flashrom_comments = Works on both the vendor BIOS as well as on coreboot.<br /> <br /> }}<br /> == Build tutorial ==<br /> <br /> the first thing to remember, is that coreboot has multiple [[Payloads]] used for the boot process ([[SeaBIOS]], [[FILO]], [[GRUB2]], etc), and you must build a payload first, so that coreboot can build it into itsself.<br /> <br /> after your payload is compiled,<br /> <br /> $ svn co svn://coreboot.org/repos/trunk/coreboot-v2<br /> $ cd coreboot-v2/targets<br /> $ ./buildtarget asus/p2b-f<br /> $ cd asus/p3b-f/p2b-f<br /> $ make -s<br /> <br /> The resulting '''coreboot.rom''' is your coreboot ROM image you can flash using [[flashrom]].<br /> <br /> {{GPL}}</div>

Juri http://www.coreboot.org/ASUS_P2B-F 2009-01-25T19:42:21Z

<p>Juri: Add the begining of build documentation, from the p3b-f page, and from experience.</p> <hr /> <div>[[Image:Asus_p2b-f.jpg|thumb|The ASUS P2B-F, revision 1.00]]<br /> <br /> == Status ==<br /> <br /> {{Status|<br /> <br /> |CPU_status = OK<br /> |CPU_L1_status = OK<br /> |CPU_L1_comments = CPU: L1 I cache: 16K, L1 D cache: 16K<br /> |CPU_L2_status = WIP<br /> |CPU_L2_comments = L2 cache is not being enabled at the moment. We're working on fixing it.<br /> |CPU_L3_status = N/A<br /> |CPU_multiple_status = N/A<br /> |CPU_multicore_status = N/A<br /> |CPU_virt_status = N/A<br /> <br /> |RAM_EDO_status = N/A<br /> |RAM_SDRAM_status = OK<br /> |RAM_SDRAM_comments = Works, but currently the RAM settings are hardcoded to one 64MB DIMM and certain speed settings. This will be fixed soon, a patch is on the way.<br /> |RAM_SODIMM_status = N/A<br /> |RAM_DDR_status = N/A<br /> |RAM_DDR2_status = N/A<br /> |RAM_DDR3_status = N/A<br /> |RAM_dualchannel_status = N/A<br /> |RAM_ecc_status = WIP<br /> |RAM_ecc_comments = Not yet supported by the coreboot 440BX code, but it's on our TODO list.<br /> <br /> |IDE_status = Untested<br /> |IDE_CF_status = OK<br /> |IDE_25_status = N/A<br /> |CDROM_DVD_status = Untested<br /> |SATA_status = N/A<br /> |USB_status = OK<br /> |USB_comments = Tested: USB keyboard in both USB ports.<br /> |Onboard_VGA_status = N/A<br /> |Onboard_ethernet_status = N/A<br /> |Onboard_audio_status = N/A<br /> |Onboard_modem_status = N/A<br /> |Onboard_firewire_status = N/A<br /> |Smartcard_status = N/A<br /> |Onboard_CF_status = N/A<br /> |Onboard_PCMCIA_status = N/A<br /> <br /> |ISA_cards_status = Untested<br /> |AMR_cards_status = N/A<br /> |AGP_cards_status = OK<br /> |AGP_cards_comments = Tested: AGP graphics card (ATI 3D Rage Pro AGP 1X/2X).<br /> |PCI_cards_status = OK<br /> |PCI_cards_comments = Tested: PCI VGA card in all five PCI slots.<br /> |PCIE_x1_status = N/A<br /> |PCIE_x2_status = N/A<br /> |PCIE_x4_status = N/A<br /> |PCIE_x8_status = N/A<br /> |PCIE_x16_status = N/A<br /> |PCIE_x32_status = N/A<br /> |HTX_status = N/A<br /> <br /> |Floppy_status = Untested<br /> |COM1_status = OK<br /> |COM2_status = Untested<br /> |PP_status = OK<br /> |PP_comments = Doing '''modprobe ppdev''' works fine, but further tests were not performed.<br /> |PS2_keyboard_status = WIP<br /> |PS2_mouse_status = WIP<br /> |Game_port_status = N/A<br /> |IR_status = N/A<br /> |Speaker_status = OK<br /> |DiskOnChip_status = N/A<br /> <br /> |Sensors_status = OK<br /> |Sensors_comments = Works fine, you can use the '''w83781d''', '''i2c-piix4''', and '''eeprom''' kernel modules.<br /> |Watchdog_status = N/A<br /> |CAN_bus_status = N/A<br /> |CPUfreq_status = N/A<br /> |Powersave_status = N/A<br /> |ACPI_status = No<br /> |ACPI_comments = There's no ACPI implementation for this board.<br /> |Reboot_status = WIP<br /> |Poweroff_status = No<br /> |LEDs_status = N/A<br /> |LEDs_comments = No special-purpose LEDs available on the board.<br /> |HPET_status = N/A<br /> |RNG_status = N/A<br /> |WakeOnModem_status = <br /> |WakeOnLAN_status = <br /> |WakeOnKeyboard_status = <br /> |WakeOnMouse_status = <br /> |Flashrom_status = OK<br /> |Flashrom_comments = Works on both the vendor BIOS as well as on coreboot.<br /> <br /> }}<br /> == Build tutorial ==<br /> <br /> the first thing to remember, is that coreboot has multiple payloads ([[SeaBIOS]], [[FILO]], grub-as-payload, etc), and you must build a payload first, so that coreboot can build it into itsself.<br /> <br /> after your payload is compiled,<br /> <br /> $ svn co svn://coreboot.org/repos/trunk/coreboot-v2<br /> $ cd coreboot-v2/targets<br /> $ ./buildtarget asus/p2b-f<br /> $ cd asus/p3b-f/p2b-f<br /> $ make -s<br /> <br /> The resulting '''coreboot.rom''' is your coreboot ROM image you can flash using [[flashrom]].<br /> <br /> {{GPL}}</div>

Juri http://www.coreboot.org/File:Asus_p2b-f.jpg 2009-01-19T19:42:11Z

<p>Juri: </p> <hr /> <div>Photo of the Asus p2b-f revision 1.00<br /> <br /> Author: [[User:Juri|Julia Longtin]]<br /> <br /> {{PD-self}}</div>

Juri