== A ==

=== ACPI ===
The '''Advanced Configuration & Power Interface''' is an industry standard for letting the OS control power management.
* http://www.acpi.info/
* http://www.computer-dictionary-online.org/index.asp?q=Advanced%20Configuration%20and%20Power%20Interface
* http://kernelslacker.livejournal.com/88243.html acpitool to generate a C source (see mailing list also)

=== AGP ===
'''Advanced Graphics Port'''
* http://en.wikipedia.org/wiki/AGP

=== AGP Aperture ===
The memory range that is set aside for AGP access.
* http://en.wikipedia.org/wiki/AGP

=== AHCI ===
The '''Advanced Host Controller Interface'''. Describes the register-level interface for a SATA host controller.
* http://en.wikipedia.org/wiki/AHCI
* http://www.intel.com/technology/serialata/ahci.htm

=== APIC ===
'''Advanced Programmable Interrupt Controller'''. An advanced version of a [[Glossary#PIC|PIC]] that can handle interrupts from and for multiple CPUs. Modern systems usually have several APICs: Local APICs are CPU-bound, IO-APICs are bridge-bound.
* http://www.computer-dictionary-online.org/index.asp?q=Advanced%20Programmable%20Interrupt%20Controller
* http://osdev.berlios.de/pic.html

== B ==

=== BAR ===
Base Address Register (on PCI device).

=== BIOS ===
Basic Input/Output System.

== C ==

=== CAR ===
Cache as RAM.

=== CMOS ===
Complementary metal oxyde semiconductor.

=== CPU ===
Central processing unit (e.g. an Athlon64)

== D ==

=== DCR ===
Decode Control Register.

=== DID ===
Device ID, a way of identifying the hardware in question. See [[Glossary#VID|VID]] for more info.

=== DMA ===
Direct Memory Access. Allows certain hardware subsystems within a computer to access system memory for reading and/or writing independently of the main CPU. Examples of systems that use DMA: Hard Disk Controller, Disk Drive Controller, Graphics Card, Sound Card.
DMA is an essential feature of all modern computers, as it allows devices of different speeds to communicate without subjecting the CPU to a massive interrupt load.
* http://en.wikipedia.org/wiki/Direct_memory_access

=== DSDT ===
Differentiated System Descriptor Table, generated by BIOS and necessary for ACPI, see mailing list also. Implementation of ACPI for the needs to be done in a "cleanroom" development process to avoid legal issues.
* http://acpi.sourceforge.net/dsdt/index.php

== E ==

=== EEPROM ===
Electrically erasable programmable ROM (common mistake: electrical erasable programmable ROM).

=== EHCI ===
Enhanced Host Controller Interface (USB host controller).

== F ==

=== Flashing ===
Flashing means writing of flash memory. The BIOS on modern mainboards is stored in a flash memory chip, which can be 128 Kilobytes to 4 Megabytes big.

=== Framebuffer ===
The '''Framebuffer''' is a part of RAM in a computer allocated to hold the graphics information for one frame or picture. This information typically consists of color values for every pixel on the screen.
A framebuffer is either:
* Off-screen, meaning that writes to the framebuffer don't appear on the visible screen
* On-screen, meaning that the framebuffer is directly coupled to the visible display

* http://en.wikipedia.org/wiki/Framebuffer

== G ==

=== GART ===
Graphics Address Relocation Table.
* http://www.linuxelectrons.com/article.php/20031021142247752

=== GATT ===
Graphics Aperture Translation Table.
* http://www.linuxelectrons.com/article.php/20031021142247752

=== GPIO ===
General Purpose Input/Output.
* http://en.wikipedia.org/wiki/GPIO

=== GSoC ===
[[GSoC|Google Summer of Code]].

== H ==

=== Hypertransport ===
A high-speed electrical interconnection protocol between CPU, memory and peripheral devices.
* http://en.wikipedia.org/wiki/Hypertransport
* http://www.hypertransport.org

== I ==

=== I2C ===
'''Inter-Integrated-Circuit''', a bidirectional 2-wire bus for efficient inter-IC control.
* http://www.esacademy.com/faq/i2c/index.htm

=== IDSEL/AD ===
Initialization Device SELect/Address and Data. Each PCI slot has a signal called IDSEL. It is used to differentiate between the different cards?
* http://www.techfest.com/hardware/bus/pci.htm
* http://www.fpga4fun.com/PCI4.html

=== IRQ ===
Interrupt ReQuest (Handler).

== J ==

=== JTAG ===
Debugging and test 4-wire interface named after an organization which defined it.

== L ==

=== LAR ===
is the LinuxBIOS [[LAR_Design|Archiver]]. It is a small utility that we use to create and change LinuxBIOS images and their modules.

=== LPC ===
'''Low Pin Count''', an interface aimed at replacing the ISA bus.
* http://www.intel.com/design/chipsets/industry/lpc.htm

=== LRU ===
'''Least Recently Used''', a rule used in operating systems that utilises a paging system. LRU selects a page to be paged out if it has been used less recently than any other page. This may be applied to a cache system as well.
* http://computer.laborlawtalk.com/Least%20Recently%20Used

== M ==

=== MII ===
'''Media Independent Interface'''. This is a chip commonly found on ethernet devices, together with a PHY.
* http://en.wikipedia.org/wiki/MII

=== MMIO ===
'''Memory-mapped I/O''' and port I/O (also called port-mapped I/O or PMIO) are two complementary methods of performing input/output between the CPU and I/O devices in a computer.
* http://en.wikipedia.org/wiki/MMIO

=== MPTable ===
'''Multi Processor Table'''. Intel MP specification is a hardware compatibility guide for machine hardware designers and OS software writers to produce SMP-capable machines and OSes in a vendor-independent manner. v1.1 and v1.4 versions exist.
* http://www.uruk.org/mps/
* http://www.intel.com/design/pentium/datashts/242016.htm

=== MTRR ===
'''Memory Type Range Register'''. This can be used to control the way a processor accesses memory ranges.
* http://en.wikipedia.org/wiki/MTRR

== O ==

=== OHCI ===
'''Open Host Controller Interface'''. IEEE1394 (Firewire) and USB standard (mostly used by other companies than Intel).
* http://en.wikipedia.org/wiki/Ohci
* http://developer.intel.com/technology/1394/download/ohci_11.htm

== P ==

=== PAM ===
'''Programmable Attribute Map'''. Hardware registers that describe how certain memory areas are accessed. The '''BIOS''' areas have a flash chip mapped on top of a piece of memory. By changing the '''PAM''' registers, accesses to these memory areas can be mapped to either the RAM or the flash device. '''Shadowing''' is implemented by setting read accesses to the flash device and write accesses to the same address space are mapped to RAM. Walking over the address space, each byte is read and immediately written from/to each address. Afterwards write accesses are ignored and read accesses are mapped to RAM. Usually the '''PAM''' registers are part of the southbridge of a system.

=== PAT ===
'''Page Attribute Table'''. Can be used independently or in combination with MTRR to setup memory type access ranges. Allows more finely-grained control than MTRR.
* http://www.intel.com/design/pentium4/manuals/index_new.htm
* http://66.102.9.104/search?q=cache:k5pI7x36u1kJ:www-gtr.iutv.univ-paris13.fr/Cours/Mat/Architecture/Docs/System.pdf+%22page+attribute+table%22&hl=en&start=10

=== PAT ===
Performance Acceleration Technology.
* http://www.intel.com/design/chipsets/pat.htm

=== PCI ===
Peripheral Component Interconnect.
* http://en.wikipedia.org/wiki/Peripheral_Component_Interconnect

=== PCI Configuration Space ===
* http://en.wikipedia.org/wiki/PCI_Configuration_Space
* http://www.techfest.com/hardware/bus/pci.htm

=== PCI Express / PCIe ===
* http://en.wikipedia.org/wiki/Pci_express

=== PHY ===
'''PHY layer device'''. A device that provides low level access to the physical layer.
* http://en.wikipedia.org/wiki/PHY
* http://foldoc.doc.ic.ac.uk/foldoc/foldoc.cgi?physical+layer

=== PIC ===
A '''Programmable Interrupt Controller''' is a device to control peripheral devices, offloading the main CPU.
* http://www.computer-dictionary-online.org/index.asp?q=programmable%20interrupt%20controller
* http://www.interq.or.jp/japan/se-inoue/e_pic1.htm

=== PIO ===
'''Programmed Input/Output''' interface is the original method used to transfer data between the CPU (through the IDE controller) and an IDE/ATA device.
* http://en.wikipedia.org/wiki/Programmed_input/output

=== PIR ===
Programmable Interrupt Routing?

=== PIRQ ===
PCI IRQ routing table,
* http://www.microsoft.com/whdc/archive/pciirq.mspx
* http://www.soundonsound.com/sos/jul04/articles/qa0704-1.htm
* Interesting tool?: https://bugzilla.redhat.com/bugzilla/attachment.cgi?id=93717&action=view

=== PLCC ===
'''Plastic Leaded Chip Carrier''', a square surface-mount chip package.
* http://www.webopedia.com/TERM/P/PLCC.html

=== PLL ===
'''Phase Locked Loop''' is a device to keep (electrical) signals synchronised throughout the system.
* http://en.wikipedia.org/wiki/PLL

=== POST ===
The '''Power On Self Test''' is a test to check that devices the computer will rely on are functioning, and initializes devices.
* http://en.wikipedia.org/wiki/Power-on_self_test

== R ==

=== RDMA ===
'''Remote Direct Memory Access''' is a concept whereby two or more computers communicate via DMA directly from main memory of one system to the main memory of another.
* http://en.wikipedia.org/wiki/Remote_Direct_Memory_Access

=== RCS ===
Revision control systems.

== S ==

=== SB ===
'''Southbridge'''. Chip on the mainboard that is usually responsible for handling the flash device, IDE controller, ...

=== SBA ===
SideBand Addressing.
* http://www.linuxelectrons.com/article.php/20031021142247752

=== Shadow RAM ===
RAM which content is copied from ROM residing at the same address for speedup purposes.

=== SIO ===
Serial Input/Output.
* http://www.acronymfinder.com/af-query.asp?String=off&Acronym=sio&Find=Find&sourceid=mozilla-search

=== SMBus ===
The '''System Management Bus''' is a simple two-wire bus used for communication with low-bandwidth devices on a motherboard. It is based on (actually a subset of) I2C.
* http://www.smbus.org/
* http://www.computer-dictionary-online.org/index.asp?q=System%20Management%20Bus

=== SMM ===
'''System Management Mode'''. Processor mode that is mainly used for power management purposes.

=== SMRAM ===
System Management Random Access Memory.

=== SPD ===
'''Serial Presence Detect'''. On every (?) memory module there's an EPROM that provides the BIOS with information on how to properly configure the memory module.
* http://www.simmtester.com/page/news/showpubnews.asp?num=101

=== SPI ===
The '''Serial Peripheral Interface Bus''' is a very loose standard for controlling almost any digital electronics that accepts a clocked serial stream of bits.
* http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus

=== SuperIO ===
The '''SuperIO''' is the chip that provides floppy, serial and parallel functionality/ports.
* http://www.simtec.co.uk/products/EB7500ATX/files/EB7500ATX-mmap.html

== T ==

=== TLB ===
'''Translation Lookaside Buffer'''. The TLB stores the most recently used page-directory and page-table entries, which translates into speedier access to said memory.
* http://www.linuxelectrons.com/article.php/20031021142247752
* For more details see IA-32 Intel256 Architecture Software Developer's Manual: Vol3 Section 10.1

== U ==

=== UC ===
Strong '''UnCacheable'''. Memory type setting in MTRR/PAT.

=== UC ===
'''UnCacheable'''. Memory type setting in MTRR/PAT.
* For more details see IA-32 Intel256 Architecture Software Developer's Manual: Vol3 Section 10.3

=== UHCI ===
'''Universal Host Controller Interface'''. USB standard.
* http://en.wikipedia.org/wiki/UHCI
* http://developer.intel.com/technology/usb/uhci11d.htm

== V ==

=== VGAcon ===
The purpose of the '''VGAcon''' (VGA controller) is to isolate the details of VGA signal generation from all the other modules in a (hardware) design. It allows the pixel information to be written into its video memory using a very simple interface, while it is alone responsible for generating the required signals for displaying the pixel information on a VGA monitor. (Note: This is mostly relevant to a hardware design - the text is copied from a students FPGA project).
* http://www.eecg.utoronto.ca/~singhd/241/vgacon.htm

=== VID ===
'''Vendor ID''', a way of identifying the hardware manufacturer.
* http://www.microsoft.com/whdc/system/bus/PCI/infreq.mspx
* http://pciids.sourceforge.net/
A way of obtaining info for your hardware is through the 'lspci' command. Simply type 'lspci -n' in the console (or an xterm) or 'lspci -vn' for more verbose output.

=== VMEBus ===
'''VERSAmodule Eurocard Bus''' or '''Versa Module Europa Bus'''. A computer bus originally developed for the Motorola 68000.
* http://en.wikipedia.org/wiki/VMEbus

== W ==

=== WB ===
Write-Back. Memory type setting in MTRR/PAT.

=== WC ===
Write-Combining. Memory type setting in MTRR/PAT.

=== WP ===
Write Protected. Memory type setting in MTRR/PAT.

=== WT ===
Write-Through. Memory type setting in MTRR/PAT.
* For more details see IA-32 Intel256 Architecture Software Developer's Manual: Vol3 Section 10.3

ASUS A8N-E

2007-08-16T23:05:44Z

Quux: /* Before you begin */ Biostar NF4-A9A

Documentation

2007-08-16T21:41:08Z

Quux: /* Other Documentation */ linkfix Booting_Windows_using_LinuxBIOS

This page contains information on how to get started building and installing LinuxBIOS, as well as build tutorials for various specific motherboards.

== Build Tutorials ==

* [[IWILL DK8-HTX Build Tutorial]] (LinuxBIOSv2)
* [[GIGABYTE GA-M57SLI-S4 Build Tutorial]] (LinuxBIOSv2)
* [[QEMU Build Tutorial]] (LinuxBIOSv2)
* [[Tyan S2881 Build Tutorial]] (LinuxBIOSv2)
* [[Tyan S2882 Build Tutorial]] (LinuxBIOSv2)
* [[Tyan S2892 Build Tutorial]] — the OLPC way (LinuxBIOSv2)
* [[ASI MB-5BLMP Build Tutorial]] (LinuxBIOSv2)
* [[BCOM WINNET100 Build Tutorial]] (LinuxBIOSv2)
* [[ASUS A8N-E Build Tutorial]] (LinuxBIOSv2)
* [[AXUS WINTERM Build Tutorial]] (LinuxBIOSv2)

* [[SiS630]] (LinuxBIOSv1)

== Port Guides ==

Here are some port guides and experiences.

* [http://www.openbios.org/LinuxBIOS-AMD64.pdf LinuxBIOS on AMD64 (PDF)] (LinuxBIOSv2)
* [[The EPIA-M/MII]] (LinuxBIOSv2)
* [[The Technoland SBC 710]] (LinuxBIOSv1)
* [[The PC CHIPS M810LR]] (LinuxBIOSv1)

== Other Documentation ==

* [[JTAG/BSDL Guide]]
* [[VGA support]]
* [[X11 on EPIA-M]]
* [[lxbios|Lxbios documentation]]
* [http://www.linuxbios.org/data/docs/configmanual.ps Configuration tool manual] (from freebios/Documentation/configmanual.ps)
* [http://www.linuxbios.org/data/lbdoc Project Book, Mangrove LinuxBios] from Mathieu Deschamps
* LinuxBIOS [[Glossary]]
* The USB [[EHCI Debug Port]] may be the easiest way to do early debugging without a legacy serial port.
* [http://web.archive.org/web/20040414101354/http://www.lysator.liu.se/upplysning/fa/linuxbios.pdf Christer Weinigel: Doing Linux programming close to the hardware] (PDF)
* [http://snapshots.linuxbios.org/docs/doxygen/ Doxygen generated build documentation]
* [[Creating Valid IRQ Tables]]
* Some documentation on "piggybacking" using PLCC chips: [[:Image:Tivo_prom_piggy_back_socket_installation.pdf|1]], [[:Image:How_to_build_the_tivo_prom_piggy_socket.pdf|2]], [[:Image:Tivo_piggyback_prom.pdf|3]].
* [http://www.linuxbios.org/Booting_Windows_using_LinuxBIOS Booting Windows using LinuxBIOS]
* [[LinuxBIOSv3]]
* [[Support_Tools]]
* [[Booting_Windows_using_LinuxBIOS]]

== External articles ==

* [http://www.linuxjournal.com/article/7170 LinuxBIOS at Four]
* [http://plan9.bell-labs.com/wiki/plan9/Integrating_9load_into_the_linuxbios/index.html Integrating 9load into the LinuxBIOS]
* [http://blog.slightlyhackish.com/2007/03/26/building-and-testing-linuxbiosv2-step-by-step.aspx Building and testing LinuxBIOSv2, step by step]
* [http://blog.perlplexity.org/?p=13 How to get the Iwill DK8-HTX running with LinuxBIOS]

== Papers/Articles/Slides ==

=== Breaking the Chains -- Using LinuxBIOS to Liberate Embedded x86 Processors ===
* Jordan H. Crouse, Marc E. Jones, Ronald G. Minnich
* Proceedings of the Linux Symposium, June 27th-30th, 2007, Ottawa, Ontario, Canada
* [ [https://ols2006.108.redhat.com/2007/Reprints/crouse-Reprint.pdf pdf] | [http://linuxbios.org/images/8/88/Crouse-Reprint.pdf pdf (local copy)] ]

=== LinuxBIOS - Freedom for your motherboard ===
* Alan Carvalho de Assis
* FISL 8.0 (8th Forum Internacional de Software Livre)
* [ [[Media:LinuxBIOS-FISL8.pdf|pdf]] ]

=== FSF is moving towards LinuxBIOS deployment (Russian article) ===
* Anton Borisov
* SAMAG, 02-2006 (http://www.samag.ru)
* [ [[Media:LX2%40FSF_4a.pdf|pdf]] | [http://ps.kaos.ru/download/FSF_migrates_to_LinuxBIOS_technology.pdf alternative PDF] ]

=== FreeVGA: Architecture Independent Video Graphics Initialization for LinuxBIOS ===
* Li-Ta Lo, Gregory R. Watson, Ronald G. Minnich
* Usenix, February 25 2005 (??)
* [ [http://www.linuxbios.org/data/vgabios/ html] | [[Media:vgabios.pdf|pdf]] ]

=== Flexibility in ROM: A Stackable Open Source BIOS ===
* Adam Agnew, Adam Sulmicki, Ronald Minnich, William Arbaugh
* USENIX 2003 Annual Technical Conference, FREENIX Track
* [ [http://www.usenix.org/events/usenix03/tech/freenix03/agnew/agnew_html/index.html HTML] ]

=== Supermon: High performance monitoring for Linux clusters ===
* Ron Minnich, Los Alamos National Laboratory, and Karen Reid, University of Toronto
* The [http://www.linuxshowcase.org/2001/ Fifth Annual Linux Showcase and Conference], Oakland, CA, November 5-10 2001
* [ [[Media:supermon.ps|ps]] ]

=== LOBOS and LinuxBIOS ===
* Cluster Research Brochure
* prepared for SC 2000, November 4-10 2000
* [ [[Media:sc00.pdf|pdf]] ]

=== The Linux BIOS ===
* Ron Minnich, James Hendricks, and Dale Webster, Los Alamos National Laboratory
* The [http://www.linuxshowcase.org/2000/ Fourth Annual Linux Showcase and Conference], Atlanta, GA, October 4-11 2000
* [ [[Media:linuxbios.pdf|pdf]] | [[Media:linuxbios.ps|ps]] ]

=== LOBOS (Linux OS Boots Linux OS): Booting a Kernel in 32-bit Mode ===
* Ron Minnich, Los Alamos National Laboratory
* The [http://www.linuxshowcase.org/2000/ Fourth Annual Linux Showcase and Conference], Atlanta, GA, October 4-11 2000
* [ [[Media:lobos.pdf|pdf]] | [[Media:lobos.ps|ps]] ]

=== Putting Linux on your motherboard ===
* Antony Stone
* [http://www.linux-magazine.com/ Linux Magazine], March, 2003, Pg. 76
* [ [[Media:LinuxBIOS.pdf|pdf]] ]

=== Look Ma, No Bios ===
* Oleg Goldshmidt
* IBM Haifa Research Laboratory, July 2006
* [http://www.goldshmidt.org/about/lectures.html Oleg's talks]
* [ [http://www.goldshmidt.org/about/LinuxBIOS/LinuxBIOSHaifux.html html] | [http://www.goldshmidt.org/about/LinuxBIOS/LinuxBIOSHaifux.html.zip html.zip] | [http://www.goldshmidt.org/about/LinuxBIOS/LinuxBIOSHaifux.ppt.zip ppt.zip] | [[Media:LookMaNoBIOS.pdf|pdf]] ]

=== A Framework for Using Processor Cache as RAM (CAR) ===
* Eswaramoorthi Nallusamy
* University of New Mexico
* [ [[Media:LBCar.ppt|ppt]] | [[Media:LBCar.pdf|pdf]]]

== Books ==

These books do not address LinuxBIOS specifically but provide background information useful for BIOS-level programming on PC hardware.

* [http://www.mindshare.com/protected/link.asp?type=documents&id=48&section=PCI|TM PCI System Architecture]
* [http://www.mindshare.com/protected/link.asp?type=documents&id=27&section=HyperTransport|TM HyperTransport System Architecture]
* [http://www.mindshare.com/protected/link.asp?type=documents&id=24&section=AMD%20Opteron|TM%20Processor AMD K8 Processor Architecture] (white paper/book excerpt)

Documentation

2007-08-16T21:40:02Z

Quux: /* Other Documentation */ Support_Tools de-orphaned

This page contains information on how to get started building and installing LinuxBIOS, as well as build tutorials for various specific motherboards.

== Build Tutorials ==

* [[IWILL DK8-HTX Build Tutorial]] (LinuxBIOSv2)
* [[GIGABYTE GA-M57SLI-S4 Build Tutorial]] (LinuxBIOSv2)
* [[QEMU Build Tutorial]] (LinuxBIOSv2)
* [[Tyan S2881 Build Tutorial]] (LinuxBIOSv2)
* [[Tyan S2882 Build Tutorial]] (LinuxBIOSv2)
* [[Tyan S2892 Build Tutorial]] — the OLPC way (LinuxBIOSv2)
* [[ASI MB-5BLMP Build Tutorial]] (LinuxBIOSv2)
* [[BCOM WINNET100 Build Tutorial]] (LinuxBIOSv2)
* [[ASUS A8N-E Build Tutorial]] (LinuxBIOSv2)
* [[AXUS WINTERM Build Tutorial]] (LinuxBIOSv2)

* [[SiS630]] (LinuxBIOSv1)

== Port Guides ==

Here are some port guides and experiences.

* [http://www.openbios.org/LinuxBIOS-AMD64.pdf LinuxBIOS on AMD64 (PDF)] (LinuxBIOSv2)
* [[The EPIA-M/MII]] (LinuxBIOSv2)
* [[The Technoland SBC 710]] (LinuxBIOSv1)
* [[The PC CHIPS M810LR]] (LinuxBIOSv1)

== Other Documentation ==

* [[JTAG/BSDL Guide]]
* [[VGA support]]
* [[X11 on EPIA-M]]
* [[lxbios|Lxbios documentation]]
* [http://www.linuxbios.org/data/docs/configmanual.ps Configuration tool manual] (from freebios/Documentation/configmanual.ps)
* [http://www.linuxbios.org/data/lbdoc Project Book, Mangrove LinuxBios] from Mathieu Deschamps
* LinuxBIOS [[Glossary]]
* The USB [[EHCI Debug Port]] may be the easiest way to do early debugging without a legacy serial port.
* [http://web.archive.org/web/20040414101354/http://www.lysator.liu.se/upplysning/fa/linuxbios.pdf Christer Weinigel: Doing Linux programming close to the hardware] (PDF)
* [http://snapshots.linuxbios.org/docs/doxygen/ Doxygen generated build documentation]
* [[Creating Valid IRQ Tables]]
* Some documentation on "piggybacking" using PLCC chips: [[:Image:Tivo_prom_piggy_back_socket_installation.pdf|1]], [[:Image:How_to_build_the_tivo_prom_piggy_socket.pdf|2]], [[:Image:Tivo_piggyback_prom.pdf|3]].
* [http://www.linuxbios.org/Booting_Windows_using_LinuxBIOS Booting Windows using LinuxBIOS]
* [[LinuxBIOSv3]]
* [[Support_Tools]]

== External articles ==

* [http://www.linuxjournal.com/article/7170 LinuxBIOS at Four]
* [http://plan9.bell-labs.com/wiki/plan9/Integrating_9load_into_the_linuxbios/index.html Integrating 9load into the LinuxBIOS]
* [http://blog.slightlyhackish.com/2007/03/26/building-and-testing-linuxbiosv2-step-by-step.aspx Building and testing LinuxBIOSv2, step by step]
* [http://blog.perlplexity.org/?p=13 How to get the Iwill DK8-HTX running with LinuxBIOS]

== Papers/Articles/Slides ==

=== Breaking the Chains -- Using LinuxBIOS to Liberate Embedded x86 Processors ===
* Jordan H. Crouse, Marc E. Jones, Ronald G. Minnich
* Proceedings of the Linux Symposium, June 27th-30th, 2007, Ottawa, Ontario, Canada
* [ [https://ols2006.108.redhat.com/2007/Reprints/crouse-Reprint.pdf pdf] | [http://linuxbios.org/images/8/88/Crouse-Reprint.pdf pdf (local copy)] ]

=== LinuxBIOS - Freedom for your motherboard ===
* Alan Carvalho de Assis
* FISL 8.0 (8th Forum Internacional de Software Livre)
* [ [[Media:LinuxBIOS-FISL8.pdf|pdf]] ]

=== FSF is moving towards LinuxBIOS deployment (Russian article) ===
* Anton Borisov
* SAMAG, 02-2006 (http://www.samag.ru)
* [ [[Media:LX2%40FSF_4a.pdf|pdf]] | [http://ps.kaos.ru/download/FSF_migrates_to_LinuxBIOS_technology.pdf alternative PDF] ]

=== FreeVGA: Architecture Independent Video Graphics Initialization for LinuxBIOS ===
* Li-Ta Lo, Gregory R. Watson, Ronald G. Minnich
* Usenix, February 25 2005 (??)
* [ [http://www.linuxbios.org/data/vgabios/ html] | [[Media:vgabios.pdf|pdf]] ]

=== Flexibility in ROM: A Stackable Open Source BIOS ===
* Adam Agnew, Adam Sulmicki, Ronald Minnich, William Arbaugh
* USENIX 2003 Annual Technical Conference, FREENIX Track
* [ [http://www.usenix.org/events/usenix03/tech/freenix03/agnew/agnew_html/index.html HTML] ]

=== Supermon: High performance monitoring for Linux clusters ===
* Ron Minnich, Los Alamos National Laboratory, and Karen Reid, University of Toronto
* The [http://www.linuxshowcase.org/2001/ Fifth Annual Linux Showcase and Conference], Oakland, CA, November 5-10 2001
* [ [[Media:supermon.ps|ps]] ]

=== LOBOS and LinuxBIOS ===
* Cluster Research Brochure
* prepared for SC 2000, November 4-10 2000
* [ [[Media:sc00.pdf|pdf]] ]

=== The Linux BIOS ===
* Ron Minnich, James Hendricks, and Dale Webster, Los Alamos National Laboratory
* The [http://www.linuxshowcase.org/2000/ Fourth Annual Linux Showcase and Conference], Atlanta, GA, October 4-11 2000
* [ [[Media:linuxbios.pdf|pdf]] | [[Media:linuxbios.ps|ps]] ]

=== LOBOS (Linux OS Boots Linux OS): Booting a Kernel in 32-bit Mode ===
* Ron Minnich, Los Alamos National Laboratory
* The [http://www.linuxshowcase.org/2000/ Fourth Annual Linux Showcase and Conference], Atlanta, GA, October 4-11 2000
* [ [[Media:lobos.pdf|pdf]] | [[Media:lobos.ps|ps]] ]

=== Putting Linux on your motherboard ===
* Antony Stone
* [http://www.linux-magazine.com/ Linux Magazine], March, 2003, Pg. 76
* [ [[Media:LinuxBIOS.pdf|pdf]] ]

=== Look Ma, No Bios ===
* Oleg Goldshmidt
* IBM Haifa Research Laboratory, July 2006
* [http://www.goldshmidt.org/about/lectures.html Oleg's talks]
* [ [http://www.goldshmidt.org/about/LinuxBIOS/LinuxBIOSHaifux.html html] | [http://www.goldshmidt.org/about/LinuxBIOS/LinuxBIOSHaifux.html.zip html.zip] | [http://www.goldshmidt.org/about/LinuxBIOS/LinuxBIOSHaifux.ppt.zip ppt.zip] | [[Media:LookMaNoBIOS.pdf|pdf]] ]

=== A Framework for Using Processor Cache as RAM (CAR) ===
* Eswaramoorthi Nallusamy
* University of New Mexico
* [ [[Media:LBCar.ppt|ppt]] | [[Media:LBCar.pdf|pdf]]]

== Books ==

These books do not address LinuxBIOS specifically but provide background information useful for BIOS-level programming on PC hardware.

* [http://www.mindshare.com/protected/link.asp?type=documents&id=48&section=PCI|TM PCI System Architecture]
* [http://www.mindshare.com/protected/link.asp?type=documents&id=27&section=HyperTransport|TM HyperTransport System Architecture]
* [http://www.mindshare.com/protected/link.asp?type=documents&id=24&section=AMD%20Opteron|TM%20Processor AMD K8 Processor Architecture] (white paper/book excerpt)

Glossary

2007-08-16T21:38:12Z

Quux: /* L */ LAR keeps getting mentioned in pipermail

== A ==

=== ACPI ===
The '''Advanced Configuration & Power Interface''' is an industry standard for letting the OS control power management.
* http://www.acpi.info/
* http://www.computer-dictionary-online.org/index.asp?q=Advanced%20Configuration%20and%20Power%20Interface
* http://kernelslacker.livejournal.com/88243.html acpitool to generate a C source (see mailing list also)

=== AGP ===
'''Advanced Graphics Port'''
* http://en.wikipedia.org/wiki/AGP

=== AGP Aperture ===
The memory range that is set aside for AGP access.
* http://en.wikipedia.org/wiki/AGP

=== AHCI ===
The '''Advanced Host Controller Interface'''. Describes the register-level interface for a SATA host controller.
* http://en.wikipedia.org/wiki/AHCI
* http://www.intel.com/technology/serialata/ahci.htm

=== APIC ===
'''Advanced Programmable Interrupt Controller'''. An advanced version of a [[Glossary#PIC|PIC]] that can handle interrupts from and for multiple CPUs. Modern systems usually have several APICs: Local APICs are CPU-bound, IO-APICs are bridge-bound.
* http://www.computer-dictionary-online.org/index.asp?q=Advanced%20Programmable%20Interrupt%20Controller
* http://osdev.berlios.de/pic.html

== B ==

=== BAR ===
Base Address Register (on PCI device).

=== BIOS ===
Basic Input/Output System.

== C ==

=== CAR ===
Cache as RAM.

=== CMOS ===
Complementary metal oxyde semiconductor.

=== CPU ===
Central processing unit (e.g. an Athlon64)

== D ==

=== DCR ===
Decode Control Register.

=== DID ===
Device ID, a way of identifying the hardware in question. See [[Glossary#VID|VID]] for more info.

=== DMA ===
Direct Memory Access. Allows certain hardware subsystems within a computer to access system memory for reading and/or writing independently of the main CPU. Examples of systems that use DMA: Hard Disk Controller, Disk Drive Controller, Graphics Card, Sound Card.
DMA is an essential feature of all modern computers, as it allows devices of different speeds to communicate without subjecting the CPU to a massive interrupt load.
* http://en.wikipedia.org/wiki/Direct_memory_access

=== DSDT ===
Differentiated System Descriptor Table, generated by BIOS and necessary for ACPI, see mailing list also
* http://acpi.sourceforge.net/dsdt/index.php

== E ==

=== EEPROM ===
Electrically erasable programmable ROM (common mistake: electrical erasable programmable ROM).

=== EHCI ===
Enhanced Host Controller Interface (USB host controller).

== F ==

=== Flashing ===
Flashing means writing of flash memory. The BIOS on modern mainboards is stored in a flash memory chip, which can be 128 Kilobytes to 4 Megabytes big.

=== Framebuffer ===
The '''Framebuffer''' is a part of RAM in a computer allocated to hold the graphics information for one frame or picture. This information typically consists of color values for every pixel on the screen.
A framebuffer is either:
* Off-screen, meaning that writes to the framebuffer don't appear on the visible screen
* On-screen, meaning that the framebuffer is directly coupled to the visible display

* http://en.wikipedia.org/wiki/Framebuffer

== G ==

=== GART ===
Graphics Address Relocation Table.
* http://www.linuxelectrons.com/article.php/20031021142247752

=== GATT ===
Graphics Aperture Translation Table.
* http://www.linuxelectrons.com/article.php/20031021142247752

=== GPIO ===
General Purpose Input/Output.
* http://en.wikipedia.org/wiki/GPIO

=== GSoC ===
[[GSoC|Google Summer of Code]].

== H ==

=== Hypertransport ===
A high-speed electrical interconnection protocol between CPU, memory and peripheral devices.
* http://en.wikipedia.org/wiki/Hypertransport
* http://www.hypertransport.org

== I ==

=== I2C ===
'''Inter-Integrated-Circuit''', a bidirectional 2-wire bus for efficient inter-IC control.
* http://www.esacademy.com/faq/i2c/index.htm

=== IDSEL/AD ===
Initialization Device SELect/Address and Data. Each PCI slot has a signal called IDSEL. It is used to differentiate between the different cards?
* http://www.techfest.com/hardware/bus/pci.htm
* http://www.fpga4fun.com/PCI4.html

=== IRQ ===
Interrupt ReQuest (Handler).

== J ==

=== JTAG ===
Debugging and test 4-wire interface named after an organization which defined it.

== L ==

=== LAR ===
is the LinuxBIOS [[LAR_Design|Archiver]]. It is a small utility that we use to create and change LinuxBIOS images and their modules.

=== LPC ===
'''Low Pin Count''', an interface aimed at replacing the ISA bus.
* http://www.intel.com/design/chipsets/industry/lpc.htm

=== LRU ===
'''Least Recently Used''', a rule used in operating systems that utilises a paging system. LRU selects a page to be paged out if it has been used less recently than any other page. This may be applied to a cache system as well.
* http://computer.laborlawtalk.com/Least%20Recently%20Used

== M ==

=== MII ===
'''Media Independent Interface'''. This is a chip commonly found on ethernet devices, together with a PHY.
* http://en.wikipedia.org/wiki/MII

=== MMIO ===
'''Memory-mapped I/O''' and port I/O (also called port-mapped I/O or PMIO) are two complementary methods of performing input/output between the CPU and I/O devices in a computer.
* http://en.wikipedia.org/wiki/MMIO

=== MPTable ===
'''Multi Processor Table'''. Intel MP specification is a hardware compatibility guide for machine hardware designers and OS software writers to produce SMP-capable machines and OSes in a vendor-independent manner. v1.1 and v1.4 versions exist.
* http://www.uruk.org/mps/
* http://www.intel.com/design/pentium/datashts/242016.htm

=== MTRR ===
'''Memory Type Range Register'''. This can be used to control the way a processor accesses memory ranges.
* http://en.wikipedia.org/wiki/MTRR

== O ==

=== OHCI ===
'''Open Host Controller Interface'''. IEEE1394 (Firewire) and USB standard (mostly used by other companies than Intel).
* http://en.wikipedia.org/wiki/Ohci
* http://developer.intel.com/technology/1394/download/ohci_11.htm

== P ==

=== PAM ===
'''Programmable Attribute Map'''. Hardware registers that describe how certain memory areas are accessed. The '''BIOS''' areas have a flash chip mapped on top of a piece of memory. By changing the '''PAM''' registers, accesses to these memory areas can be mapped to either the RAM or the flash device. '''Shadowing''' is implemented by setting read accesses to the flash device and write accesses to the same address space are mapped to RAM. Walking over the address space, each byte is read and immediately written from/to each address. Afterwards write accesses are ignored and read accesses are mapped to RAM. Usually the '''PAM''' registers are part of the southbridge of a system.

=== PAT ===
'''Page Attribute Table'''. Can be used independently or in combination with MTRR to setup memory type access ranges. Allows more finely-grained control than MTRR.
* http://www.intel.com/design/pentium4/manuals/index_new.htm
* http://66.102.9.104/search?q=cache:k5pI7x36u1kJ:www-gtr.iutv.univ-paris13.fr/Cours/Mat/Architecture/Docs/System.pdf+%22page+attribute+table%22&hl=en&start=10

=== PAT ===
Performance Acceleration Technology.
* http://www.intel.com/design/chipsets/pat.htm

=== PCI ===
Peripheral Component Interconnect.
* http://en.wikipedia.org/wiki/Peripheral_Component_Interconnect

=== PCI Configuration Space ===
* http://en.wikipedia.org/wiki/PCI_Configuration_Space
* http://www.techfest.com/hardware/bus/pci.htm

=== PCI Express / PCIe ===
* http://en.wikipedia.org/wiki/Pci_express

=== PHY ===
'''PHY layer device'''. A device that provides low level access to the physical layer.
* http://en.wikipedia.org/wiki/PHY
* http://foldoc.doc.ic.ac.uk/foldoc/foldoc.cgi?physical+layer

=== PIC ===
A '''Programmable Interrupt Controller''' is a device to control peripheral devices, offloading the main CPU.
* http://www.computer-dictionary-online.org/index.asp?q=programmable%20interrupt%20controller
* http://www.interq.or.jp/japan/se-inoue/e_pic1.htm

=== PIO ===
'''Programmed Input/Output''' interface is the original method used to transfer data between the CPU (through the IDE controller) and an IDE/ATA device.
* http://en.wikipedia.org/wiki/Programmed_input/output

=== PIR ===
Programmable Interrupt Routing?

=== PIRQ ===
PCI IRQ routing table,
* http://www.microsoft.com/whdc/archive/pciirq.mspx
* http://www.soundonsound.com/sos/jul04/articles/qa0704-1.htm
* Interesting tool?: https://bugzilla.redhat.com/bugzilla/attachment.cgi?id=93717&action=view

=== PLCC ===
'''Plastic Leaded Chip Carrier''', a square surface-mount chip package.
* http://www.webopedia.com/TERM/P/PLCC.html

=== PLL ===
'''Phase Locked Loop''' is a device to keep (electrical) signals synchronised throughout the system.
* http://en.wikipedia.org/wiki/PLL

=== POST ===
The '''Power On Self Test''' is a test to check that devices the computer will rely on are functioning, and initializes devices.
* http://en.wikipedia.org/wiki/Power-on_self_test

== R ==

=== RDMA ===
'''Remote Direct Memory Access''' is a concept whereby two or more computers communicate via DMA directly from main memory of one system to the main memory of another.
* http://en.wikipedia.org/wiki/Remote_Direct_Memory_Access

=== RCS ===
Revision control systems.

== S ==

=== SB ===
'''Southbridge'''. Chip on the mainboard that is usually responsible for handling the flash device, IDE controller, ...

=== SBA ===
SideBand Addressing.
* http://www.linuxelectrons.com/article.php/20031021142247752

=== Shadow RAM ===
RAM which content is copied from ROM residing at the same address for speedup purposes.

=== SIO ===
Serial Input/Output.
* http://www.acronymfinder.com/af-query.asp?String=off&Acronym=sio&Find=Find&sourceid=mozilla-search

=== SMBus ===
The '''System Management Bus''' is a simple two-wire bus used for communication with low-bandwidth devices on a motherboard. It is based on (actually a subset of) I2C.
* http://www.smbus.org/
* http://www.computer-dictionary-online.org/index.asp?q=System%20Management%20Bus

=== SMM ===
'''System Management Mode'''. Processor mode that is mainly used for power management purposes.

=== SMRAM ===
System Management Random Access Memory.

=== SPD ===
'''Serial Presence Detect'''. On every (?) memory module there's an EPROM that provides the BIOS with information on how to properly configure the memory module.
* http://www.simmtester.com/page/news/showpubnews.asp?num=101

=== SPI ===
The '''Serial Peripheral Interface Bus''' is a very loose standard for controlling almost any digital electronics that accepts a clocked serial stream of bits.
* http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus

=== SuperIO ===
The '''SuperIO''' is the chip that provides floppy, serial and parallel functionality/ports.
* http://www.simtec.co.uk/products/EB7500ATX/files/EB7500ATX-mmap.html

== T ==

=== TLB ===
'''Translation Lookaside Buffer'''. The TLB stores the most recently used page-directory and page-table entries, which translates into speedier access to said memory.
* http://www.linuxelectrons.com/article.php/20031021142247752
* For more details see IA-32 Intel256 Architecture Software Developer's Manual: Vol3 Section 10.1

== U ==

=== UC ===
Strong '''UnCacheable'''. Memory type setting in MTRR/PAT.

=== UC ===
'''UnCacheable'''. Memory type setting in MTRR/PAT.
* For more details see IA-32 Intel256 Architecture Software Developer's Manual: Vol3 Section 10.3

=== UHCI ===
'''Universal Host Controller Interface'''. USB standard.
* http://en.wikipedia.org/wiki/UHCI
* http://developer.intel.com/technology/usb/uhci11d.htm

== V ==

=== VGAcon ===
The purpose of the '''VGAcon''' (VGA controller) is to isolate the details of VGA signal generation from all the other modules in a (hardware) design. It allows the pixel information to be written into its video memory using a very simple interface, while it is alone responsible for generating the required signals for displaying the pixel information on a VGA monitor. (Note: This is mostly relevant to a hardware design - the text is copied from a students FPGA project).
* http://www.eecg.utoronto.ca/~singhd/241/vgacon.htm

=== VID ===
'''Vendor ID''', a way of identifying the hardware manufacturer.
* http://www.microsoft.com/whdc/system/bus/PCI/infreq.mspx
* http://pciids.sourceforge.net/
A way of obtaining info for your hardware is through the 'lspci' command. Simply type 'lspci -n' in the console (or an xterm) or 'lspci -vn' for more verbose output.

=== VMEBus ===
'''VERSAmodule Eurocard Bus''' or '''Versa Module Europa Bus'''. A computer bus originally developed for the Motorola 68000.
* http://en.wikipedia.org/wiki/VMEbus

== W ==

=== WB ===
Write-Back. Memory type setting in MTRR/PAT.

=== WC ===
Write-Combining. Memory type setting in MTRR/PAT.

=== WP ===
Write Protected. Memory type setting in MTRR/PAT.

=== WT ===
Write-Through. Memory type setting in MTRR/PAT.
* For more details see IA-32 Intel256 Architecture Software Developer's Manual: Vol3 Section 10.3

Desktops

2007-08-16T14:51:49Z

Quux: /* Candidate desktop mainboards for support in the future */

{| border="0" valign="top" width="100%"
| valign="top"|

Currently LinuxBIOS doesn't support too many desktop/workstation-type mainboards, but we [http://tracker.linuxbios.org/trac/LinuxBIOS/ticket/6 intend to support more of them] in the future.

This page documents which desktop motherboards are supported, which are being worked on, where you can buy them etc.

| valign="top" align="right"|

'''Color Legend'''
{| border="1" style="font-size: smaller"
|- bgcolor="#eeeeee"
| style="background:red" | Motherboard has not been started.
|-
| style="background:yellow" | Motherboard is work in progress.
|-
| style="background:lime" | Motherboard is fully supported.
|}

|}

== Supported Desktop Motherboards ==

Please see the "Desktops / Workstations" section of the [[Supported Motherboards|list of supported mainboards]]. You can also have a look at the "Server" section, as the differences between desktop/server are not always very big. The current "flagships" as far as LinuxBIOS-supported desktop mainboards are concerned are probably the [[GIGABYTE GA-M57SLI-S4 Build Tutorial|GIGABYTE GA-M57SLI-S4]] and the [[ASUS A8N-E]].

== Candidate desktop mainboards for support in the future ==

Mainboards with '''AMD K8''' northbridge and '''NVIDIA CK804''' or '''NVIDIA MCP55''' southbridge are good candidates for new mainboards. All or most components are supported already, so adding LinuxBIOS support for such a mainboard should be relatively easy. Please contact us on the [[Mailinglist|mailing list]] if you intend to work on such a board or if you want to help with testing.

{| border="0" style="font-size: smaller"
|- bgcolor="#6699dd"
! align="left" | Vendor
! align="left" | Mainboard
! align="left" | Northbridge
! align="left" | Southbridge
! align="left" | Super I/O
! align="left" | CPU
! align="left" | Socket
! align="left" | Status
! align="left" | Buy
! align="left" | Notes

|- bgcolor="#eeeeee"
| Abit
| [http://www.abit-usa.com/products/mb/techspec.php?categories=1&model=318 KN9S]
| AMD K8
| NVIDIA MCP55 (?)
| ?
| AMD Opteron™ / Athlon™ 64 / FX / X2
| Socket AM2
| style="background:red" | NS
| [http://www.newegg.com/Product/Product.asp?Item=N82E16813127007 NewEgg]
| —

|- bgcolor="#eeeeee"
| Abit
| [http://www.abit-usa.com/products/mb/techspec.php?categories=1&model=316 KN9 Ultra]
| AMD K8
| NVIDIA MCP55
| ?
| AMD Sempron / Athlon™ 64 / FX / X2
| Socket AM2
| style="background:red" | NS
| [http://www.newegg.com/Product/Product.asp?Item=N82E16813127008 NewEgg]
| [http://www.phoronix.net/forums/showthread.php?t=2077 lspci]. [http://www.unlimitpc.com/article/computex2006_day2/abit/big/IMG_3219.JPG Socketed BIOS]. [http://www.linuxbios.org/pipermail/linuxbios/2006-November/017018.html No serial port].

|- bgcolor="#eeeeee"
| ASUS
| [http://www.asus.com.tw/products.aspx?l1=3&l2=15&l3=148&l4=0&model=382&modelmenu=1 A8N-SLI]
| AMD K8
| NVIDIA CK804
| ?
| AMD Athlon™ 64 / FX / X2
| Socket 939
| style="background:red" | NS
| —
| [http://ubuntuforums.org/showthread.php?t=151773 lspci]. [http://www.egielda.com.pl/images/art/cache/b86601a9ce009b71faa27496009fdea1.jpg Socketed BIOS].

|- bgcolor="#eeeeee"
| ASUS
| [http://www.asus.com.tw/products.aspx?l1=3&l2=15&l3=148&l4=0&model=375&modelmenu=1 A8N-SLI Deluxe]
| AMD K8
| NVIDIA CK804
| ITE IT8712F
| AMD Athlon™ 64 / FX / X2
| Socket 939
| style="background:red" | NS<sup>4</sup>
| —
| [http://www.linuxquestions.org/hcl/showproduct.php/product/3410 lspci]. [http://www.pcper.com/images/reviews/98/board_side.jpg Socketed BIOS].

|- bgcolor="#eeeeee"
| ASUS
| [http://www.asus.com.tw/products.aspx?l1=3&l2=15&l3=148&l4=0&model=539&modelmenu=1 A8N-SLI Premium]
| AMD K8
| NVIDIA CK804
| ITE ITxxxx
| AMD Athlon™ 64 / FX / X2
| Socket 939
| style="background:red" | NS
| [http://www.newegg.com/Product/Product.aspx?Item=N82E16813131540 NewEgg]
| [http://www.abclinuxu.cz/hardware/zakladni-desky/socket-939/asus-a8n-sli-premium lspci]. [http://www.nvnews.net/articles/gpu_world_tour_2006/images/systems/3800/a8n_sli_premium_1.jpg Socketed BIOS].

|- bgcolor="#eeeeee"
| ASUS
| [http://www.asus.com.tw/products.aspx?l1=3&l2=15&l3=148&l4=0&model=789&modelmenu=1 A8N-SLI SE]
| AMD K8
| NVIDIA CK804
| ITE ITxxxx
| AMD Athlon™ 64 / FX / X2
| Socket 939
| style="background:red" | NS
| —
| [http://tracker.linuxbios.org/trac/LinuxBIOS/attachment/ticket/6/output.txt lspci]. [http://myarticle.enet.com.cn/images/200603/1142314731163/DSCN4750.jpg Socketed BIOS].

|- bgcolor="#eeeeee"
| ASUS
| [http://www.asus.com.tw/products.aspx?l1=3&l2=15&l3=148&l4=0&model=789&modelmenu=1 A8N E-FM/S]
| AMD K8
| NVIDIA CK804
| ITE ITxxxx
| AMD Athlon™ 64 / FX / X2
| Socket 939
| style="background:yellow" | WIP
| —
| [ lspci] Socketed BIOS.

|- bgcolor="#eeeeee"
| ASUS
| [http://www.asus.com/products4.aspx?modelmenu=2&model=1181&l1=3&l2=101&l3=308 M2N-E]
| AMD K8
| NVIDIA MCP55
| ?
| AMD Sempron / Athlon™ 64 / FX / X2
| Socket AM2
| style="background:red" | NS
| [http://www.newegg.com/Product/Product.asp?Item=N82E16813131022 NewEgg]
| [http://blog.tobias-olry.de/asus-m2n-e-vs-kubuntu-edgy/#comment-697 lspci]. [http://www.pclaunches.com/entry_images/1106/09/asus_m2ne-atx_1.jpg Socketed BIOS].

|- bgcolor="#eeeeee"
| ASUS
| [http://www.asus.com/products.aspx?l1=3&l2=101&l3=370&l4=0&model=1266&modelmenu=1 M2N4-SLI]
| AMD K8
| NVIDIA CK804
| ITE ITxxxx
| AMD Sempron / Athlon™ 64 / FX / X2
| Socket AM2
| style="background:red" | NS
| [http://www.newegg.com/Product/Product.aspx?Item=N82E16813131068 NewEgg]
| [http://www.phoronix.net/forums/archive/index.php/t-2079.html lspci]. [http://img5.pcpop.com/ProductImages/500x375/0/218/000218777.jpg Socketed BIOS].

|- bgcolor="#eeeeee"
| Biostar
| [http://www.biostar-usa.com/mbdetails.asp?model=TForce%20550 TFORCE 550]
| AMD K8
| NVIDIA MCP55 (?)
| ?
| AMD Athlon™ 64 / X2
| Socket AM2
| style="background:red" | NS
| [http://www.newegg.com/Product/Product.asp?Item=N82E16813138026 NewEgg]
| —

|- bgcolor="#eeeeee"
| MSI
| [http://global.msi.com.tw/index.php?func=proddesc&prod_no=249&maincat_no=1 K8N Neo4-F (MS-7125)]
| AMD K8
| NVIDIA CK804
| Winbond™ Wxxxxx
| AMD Opteron™ / Athlon™ 64 / FX / X2
| Socket 939
| style="background:red" | NS
| [http://www.newegg.com/Product/Product.aspx?Item=N82E16813130491R NewEgg]
| [http://linuxbios.org/pipermail/linuxbios/2006-May/014478.html lspci]. [http://www.egielda.com.pl/images/art/5094fd836a12d09ad70ce725cd9ef574.jpg Socketed BIOS].

|- bgcolor="#eeeeee"
| MSI
| [http://global.msi.com.tw/index.php?func=proddesc&prod_no=255&maincat_no=1&cat2_no=171 K9N Neo (MS-7260)]
| AMD K8
| NVIDIA MCP55
| Winbond™ Wxxxxx
| AMD Sempron / Athlon™ 64 / X2
| Socket AM2
| style="background:red" | NS
| —
| [http://tracker.linuxbios.org/trac/LinuxBIOS/attachment/ticket/6/lspci_ms-7260-msi-k9n-neo.out lspci]. [http://milans.pccentre.pl/publikacje/msi_k9neof/1a.jpg Socketed BIOS]. Same as MSI K9N Neo-F?

|- bgcolor="#eeeeee"
| MSI
| [http://www.msicomputer.com/product/p_spec.asp?model=K9N_Neo-F&class=mb K9N Neo-F (MS-7260)]
| AMD K8
| NVIDIA MCP55
| ?
| AMD Sempron / Athlon™ 64 / X2
| Socket AM2
| style="background:yellow" | WIP<sup>2</sup>
| [http://www.newegg.com/Product/Product.asp?Item=N82E16813130050 NewEgg]
| [http://forums.fedoraforum.org/showthread.php?t=120252#post587808 lspci]

|- bgcolor="#eeeeee"
| MSI
| [http://global.msi.com.tw/index.php?func=proddesc&prod_no=253&maincat_no=1 K9N Ultra (MS-7250)]
| AMD K8
| NVIDIA MCP55
| ?
| AMD Sempron / Athlon™ 64 / X2
| Socket AM2
| style="background:red" | NS
| —
| [http://help.lockergnome.com/linux/18-rc5-pata-drivers-MSI-K9N-Ultra-report-AMD64-ftopict369162.html lspci]

|- bgcolor="#eeeeee"
| MSI
| [http://www.msicomputer.com/product/p_spec.asp?model=K9N4_Ultra-F&class=mb K9N4 Ultra-F (MS-7310)]
| AMD K8
| NVIDIA MCP55 (?)
| ?
| AMD Sempron / Athlon™ 64 / X2
| Socket AM2
| style="background:red" | NS
| [http://www.newegg.com/Product/Product.asp?Item=N82E16813130063 NewEgg]
| —

|- bgcolor="#eeeeee"
| MSI
| [http://www.msicomputer.com/product/p_spec.asp?model=K9N_Platinum&class=mb K9N Platinum (MS-7250)]
| nFor| AMD K8
| NVIDIA MCP55
| ?
| AMD Athlon™ 64 / FX / X2
| Socket AM2
| style="background:yellow" | WIP<sup>3</sup>
| [http://www.newegg.com/Product/Product.asp?Item=N82E16813130049 NewEgg]
| [http://bugs.launchpad.net/ubuntu/+source/linux-source-2.6.20/+bug/94820 lspci]. [http://www.virtual-hideout.net/articles/AMD_Tech_Tour_2006_Seattle/MSI/06.JPG Socketed BIOS].

|}

<small>
<sup>2</sup> See http://www.openbios.org/pipermail/linuxbios/2006-November/016880.html.<br/>
<sup>3</sup> See http://linuxbios.org/pipermail/linuxbios/2006-November/017322.html.<br/>
<sup>4</sup> See http://www.openbios.org/pipermail/linuxbios/2006-December/017580.html.<br />
</small>

== HOWTOs ==

* [[GIGABYTE GA-M57SLI-S4 Build Tutorial]]
* [[ASUS A8N-E Build Tutorial]]

Desktops

2007-08-16T14:48:01Z

Quux: /* Candidate desktop mainboards for support in the future */

{| border="0" valign="top" width="100%"
| valign="top"|

Currently LinuxBIOS doesn't support too many desktop/workstation-type mainboards, but we [http://tracker.linuxbios.org/trac/LinuxBIOS/ticket/6 intend to support more of them] in the future.

This page documents which desktop motherboards are supported, which are being worked on, where you can buy them etc.

| valign="top" align="right"|

'''Color Legend'''
{| border="1" style="font-size: smaller"
|- bgcolor="#eeeeee"
| style="background:red" | Motherboard has not been started.
|-
| style="background:yellow" | Motherboard is work in progress.
|-
| style="background:lime" | Motherboard is fully supported.
|}

|}

== Supported Desktop Motherboards ==

Please see the "Desktops / Workstations" section of the [[Supported Motherboards|list of supported mainboards]]. You can also have a look at the "Server" section, as the differences between desktop/server are not always very big. The current "flagships" as far as LinuxBIOS-supported desktop mainboards are concerned are probably the [[GIGABYTE GA-M57SLI-S4 Build Tutorial|GIGABYTE GA-M57SLI-S4]] and the [[ASUS A8N-E]].

== Candidate desktop mainboards for support in the future ==

Mainboards with '''AMD K8''' northbridge and '''NVIDIA CK804''' or '''NVIDIA MCP55''' southbridge are good candidates for new mainboards. All or most components are supported already, so adding LinuxBIOS support for such a mainboard should be relatively easy. Please contact us on the [[Mailinglist|mailing list]] if you intend to work on such a board or if you want to help with testing.

{| border="0" style="font-size: smaller"
|- bgcolor="#6699dd"
! align="left" | Vendor
! align="left" | Mainboard
! align="left" | Northbridge
! align="left" | Southbridge
! align="left" | Super I/O
! align="left" | CPU
! align="left" | Socket
! align="left" | Status
! align="left" | Buy
! align="left" | Notes

|- bgcolor="#eeeeee"
| Abit
| [http://www.abit-usa.com/products/mb/techspec.php?categories=1&model=318 KN9S]
| AMD K8
| NVIDIA MCP55 (?)
| ?
| AMD Opteron™ / Athlon™ 64 / FX / X2
| Socket AM2
| style="background:red" | NS
| [http://www.newegg.com/Product/Product.asp?Item=N82E16813127007 NewEgg]
| —

|- bgcolor="#eeeeee"
| Abit
| [http://www.abit-usa.com/products/mb/techspec.php?categories=1&model=316 KN9 Ultra]
| AMD K8
| NVIDIA MCP55
| ?
| AMD Sempron / Athlon™ 64 / FX / X2
| Socket AM2
| style="background:red" | NS
| [http://www.newegg.com/Product/Product.asp?Item=N82E16813127008 NewEgg]
| [http://www.phoronix.net/forums/showthread.php?t=2077 lspci]. [http://www.unlimitpc.com/article/computex2006_day2/abit/big/IMG_3219.JPG Socketed BIOS]. [http://www.linuxbios.org/pipermail/linuxbios/2006-November/017018.html No serial port].

|- bgcolor="#eeeeee"
| ASUS
| [http://www.asus.com.tw/products.aspx?l1=3&l2=15&l3=148&l4=0&model=382&modelmenu=1 A8N-SLI]
| AMD K8
| NVIDIA CK804
| ?
| AMD Athlon™ 64 / FX / X2
| Socket 939
| style="background:red" | NS
| —
| [http://ubuntuforums.org/showthread.php?t=151773 lspci]. [http://www.egielda.com.pl/images/art/cache/b86601a9ce009b71faa27496009fdea1.jpg Socketed BIOS].

|- bgcolor="#eeeeee"
| ASUS
| [http://www.asus.com.tw/products.aspx?l1=3&l2=15&l3=148&l4=0&model=375&modelmenu=1 A8N-SLI Deluxe]
| AMD K8
| NVIDIA CK804
| ITE IT8712F
| AMD Athlon™ 64 / FX / X2
| Socket 939
| style="background:red" | NS<sup>4</sup>
| —
| [http://www.linuxquestions.org/hcl/showproduct.php/product/3410 lspci]. [http://www.pcper.com/images/reviews/98/board_side.jpg Socketed BIOS].

|- bgcolor="#eeeeee"
| ASUS
| [http://www.asus.com.tw/products.aspx?l1=3&l2=15&l3=148&l4=0&model=539&modelmenu=1 A8N-SLI Premium]
| AMD K8
| NVIDIA CK804
| ITE ITxxxx
| AMD Athlon™ 64 / FX / X2
| Socket 939
| style="background:yelllow" | WIP
| [http://www.newegg.com/Product/Product.aspx?Item=N82E16813131540 NewEgg]
| [http://www.abclinuxu.cz/hardware/zakladni-desky/socket-939/asus-a8n-sli-premium lspci]. [http://www.nvnews.net/articles/gpu_world_tour_2006/images/systems/3800/a8n_sli_premium_1.jpg Socketed BIOS].

|- bgcolor="#eeeeee"
| ASUS
| [http://www.asus.com.tw/products.aspx?l1=3&l2=15&l3=148&l4=0&model=789&modelmenu=1 A8N-SLI SE]
| AMD K8
| NVIDIA CK804
| ITE ITxxxx
| AMD Athlon™ 64 / FX / X2
| Socket 939
| style="background:red" | NS
| —
| [http://tracker.linuxbios.org/trac/LinuxBIOS/attachment/ticket/6/output.txt lspci]. [http://myarticle.enet.com.cn/images/200603/1142314731163/DSCN4750.jpg Socketed BIOS].

|- bgcolor="#eeeeee"
| ASUS
| [http://www.asus.com.tw/products.aspx?l1=3&l2=15&l3=148&l4=0&model=789&modelmenu=1 A8N E-FM/S]
| AMD K8
| NVIDIA CK804
| ITE ITxxxx
| AMD Athlon™ 64 / FX / X2
| Socket 939
| style="background:red" | NS
| —
| [http://tracker.linuxbios.org/trac/LinuxBIOS/attachment/ticket/6/output.txt lspci]. [http://myarticle.enet.com.cn/images/200603/1142314731163/DSCN4750.jpg Socketed BIOS].

|- bgcolor="#eeeeee"
| ASUS
| [http://www.asus.com/products4.aspx?modelmenu=2&model=1181&l1=3&l2=101&l3=308 M2N-E]
| AMD K8
| NVIDIA MCP55
| ?
| AMD Sempron / Athlon™ 64 / FX / X2
| Socket AM2
| style="background:red" | NS
| [http://www.newegg.com/Product/Product.asp?Item=N82E16813131022 NewEgg]
| [http://blog.tobias-olry.de/asus-m2n-e-vs-kubuntu-edgy/#comment-697 lspci]. [http://www.pclaunches.com/entry_images/1106/09/asus_m2ne-atx_1.jpg Socketed BIOS].

|- bgcolor="#eeeeee"
| ASUS
| [http://www.asus.com/products.aspx?l1=3&l2=101&l3=370&l4=0&model=1266&modelmenu=1 M2N4-SLI]
| AMD K8
| NVIDIA CK804
| ITE ITxxxx
| AMD Sempron / Athlon™ 64 / FX / X2
| Socket AM2
| style="background:red" | NS
| [http://www.newegg.com/Product/Product.aspx?Item=N82E16813131068 NewEgg]
| [http://www.phoronix.net/forums/archive/index.php/t-2079.html lspci]. [http://img5.pcpop.com/ProductImages/500x375/0/218/000218777.jpg Socketed BIOS].

|- bgcolor="#eeeeee"
| Biostar
| [http://www.biostar-usa.com/mbdetails.asp?model=TForce%20550 TFORCE 550]
| AMD K8
| NVIDIA MCP55 (?)
| ?
| AMD Athlon™ 64 / X2
| Socket AM2
| style="background:red" | NS
| [http://www.newegg.com/Product/Product.asp?Item=N82E16813138026 NewEgg]
| —

|- bgcolor="#eeeeee"
| MSI
| [http://global.msi.com.tw/index.php?func=proddesc&prod_no=249&maincat_no=1 K8N Neo4-F (MS-7125)]
| AMD K8
| NVIDIA CK804
| Winbond™ Wxxxxx
| AMD Opteron™ / Athlon™ 64 / FX / X2
| Socket 939
| style="background:red" | NS
| [http://www.newegg.com/Product/Product.aspx?Item=N82E16813130491R NewEgg]
| [http://linuxbios.org/pipermail/linuxbios/2006-May/014478.html lspci]. [http://www.egielda.com.pl/images/art/5094fd836a12d09ad70ce725cd9ef574.jpg Socketed BIOS].

|- bgcolor="#eeeeee"
| MSI
| [http://global.msi.com.tw/index.php?func=proddesc&prod_no=255&maincat_no=1&cat2_no=171 K9N Neo (MS-7260)]
| AMD K8
| NVIDIA MCP55
| Winbond™ Wxxxxx
| AMD Sempron / Athlon™ 64 / X2
| Socket AM2
| style="background:red" | NS
| —
| [http://tracker.linuxbios.org/trac/LinuxBIOS/attachment/ticket/6/lspci_ms-7260-msi-k9n-neo.out lspci]. [http://milans.pccentre.pl/publikacje/msi_k9neof/1a.jpg Socketed BIOS]. Same as MSI K9N Neo-F?

|- bgcolor="#eeeeee"
| MSI
| [http://www.msicomputer.com/product/p_spec.asp?model=K9N_Neo-F&class=mb K9N Neo-F (MS-7260)]
| AMD K8
| NVIDIA MCP55
| ?
| AMD Sempron / Athlon™ 64 / X2
| Socket AM2
| style="background:yellow" | WIP<sup>2</sup>
| [http://www.newegg.com/Product/Product.asp?Item=N82E16813130050 NewEgg]
| [http://forums.fedoraforum.org/showthread.php?t=120252#post587808 lspci]

|- bgcolor="#eeeeee"
| MSI
| [http://global.msi.com.tw/index.php?func=proddesc&prod_no=253&maincat_no=1 K9N Ultra (MS-7250)]
| AMD K8
| NVIDIA MCP55
| ?
| AMD Sempron / Athlon™ 64 / X2
| Socket AM2
| style="background:red" | NS
| —
| [http://help.lockergnome.com/linux/18-rc5-pata-drivers-MSI-K9N-Ultra-report-AMD64-ftopict369162.html lspci]

|- bgcolor="#eeeeee"
| MSI
| [http://www.msicomputer.com/product/p_spec.asp?model=K9N4_Ultra-F&class=mb K9N4 Ultra-F (MS-7310)]
| AMD K8
| NVIDIA MCP55 (?)
| ?
| AMD Sempron / Athlon™ 64 / X2
| Socket AM2
| style="background:red" | NS
| [http://www.newegg.com/Product/Product.asp?Item=N82E16813130063 NewEgg]
| —

|- bgcolor="#eeeeee"
| MSI
| [http://www.msicomputer.com/product/p_spec.asp?model=K9N_Platinum&class=mb K9N Platinum (MS-7250)]
| nFor| AMD K8
| NVIDIA MCP55
| ?
| AMD Athlon™ 64 / FX / X2
| Socket AM2
| style="background:yellow" | WIP<sup>3</sup>
| [http://www.newegg.com/Product/Product.asp?Item=N82E16813130049 NewEgg]
| [http://bugs.launchpad.net/ubuntu/+source/linux-source-2.6.20/+bug/94820 lspci]. [http://www.virtual-hideout.net/articles/AMD_Tech_Tour_2006_Seattle/MSI/06.JPG Socketed BIOS].

|}

<small>
<sup>2</sup> See http://www.openbios.org/pipermail/linuxbios/2006-November/016880.html.<br/>
<sup>3</sup> See http://linuxbios.org/pipermail/linuxbios/2006-November/017322.html.<br/>
<sup>4</sup> See http://www.openbios.org/pipermail/linuxbios/2006-December/017580.html.<br />
</small>

== HOWTOs ==

* [[GIGABYTE GA-M57SLI-S4 Build Tutorial]]
* [[ASUS A8N-E Build Tutorial]]

ASUS A8N-E

2007-08-16T14:45:03Z

Quux: /* Before you begin */ A8NE-FM/S started

Build coreboot using LBdistro

2007-08-14T23:06:33Z

Quux: biosdistro of gsoc

=== What is LBdistro? ===

LBdistro is an improvement on buildrom to let user customize what binaries will be at final ROM. Do not confuse it with [[biosdistro]].

=== How to getting started? ===

First you need download the toolchain used to compile some LBdistro packages:

wget http://lbdistro.sourceforge.net/tools/toolchain.tar.bz2

Extract it to /usr/local:

tar jxvf toolchain.tar.bz2 -C /usr/local

Get last LBdistro from SVN repository:

svn co https://lbdistro.svn.sourceforge.net/svnroot/lbdistro/trunk LBdistro

After that issue:

cd LBdistro
make menuconfig
make

For now only QEMU compilation is generating ROM, but other boards will be added after Kdrive and application works.

=== Known problems ===

There is some problems when compiling it on Debian and others (on Ubuntu 6.06 it works fine). This problem will be fixed ASAP.

In my system I need change the command "lzma e" to "lzma -z" to compress payload

Documentation

2007-08-13T17:21:36Z

Quux: /* Build Tutorials */ slim now

This page contains information on how to get started building and installing LinuxBIOS, as well as build tutorials for various specific motherboards.

== Build Tutorials ==

* [[IWILL DK8-HTX Build Tutorial]] (LinuxBIOSv2)
* [[GIGABYTE GA-M57SLI-S4 Build Tutorial]] (LinuxBIOSv2)
* [[QEMU Build Tutorial]] (LinuxBIOSv2)
* [[Tyan S2881 Build Tutorial]] (LinuxBIOSv2)
* [[Tyan S2882 Build Tutorial]] (LinuxBIOSv2)
* [[Tyan S2892 Build Tutorial]] — the OLPC way (LinuxBIOSv2)
* [[ASI MB-5BLMP Build Tutorial]] (LinuxBIOSv2)
* [[BCOM WINNET100 Build Tutorial]] (LinuxBIOSv2)
* [[ASUS A8N-E Build Tutorial]] (LinuxBIOSv2)
* [[AXUS WINTERM Build Tutorial]] (LinuxBIOSv2)

* [[SiS630]] (LinuxBIOSv1)

== Port Guides ==

Here are some port guides and experiences.

* [http://www.openbios.org/LinuxBIOS-AMD64.pdf LinuxBIOS on AMD64 (PDF)] (LinuxBIOSv2)
* [[The EPIA-M/MII]] (LinuxBIOSv2)
* [[The Technoland SBC 710]] (LinuxBIOSv1)
* [[The PC CHIPS M810LR]] (LinuxBIOSv1)

== Other Documentation ==

* [[JTAG/BSDL Guide]]
* [[VGA support]]
* [[X11 on EPIA-M]]
* [[lxbios|Lxbios documentation]]
* [http://www.linuxbios.org/data/docs/configmanual.ps Configuration tool manual] (from freebios/Documentation/configmanual.ps)
* [http://www.linuxbios.org/data/lbdoc Project Book, Mangrove LinuxBios] from Mathieu Deschamps
* LinuxBIOS [[Glossary]]
* The USB [[EHCI Debug Port]] may be the easiest way to do early debugging without a legacy serial port.
* [http://web.archive.org/web/20040414101354/http://www.lysator.liu.se/upplysning/fa/linuxbios.pdf Christer Weinigel: Doing Linux programming close to the hardware] (PDF)
* [http://snapshots.linuxbios.org/docs/doxygen/ Doxygen generated build documentation]
* [[Creating Valid IRQ Tables]]
* Some documentation on "piggybacking" using PLCC chips: [[:Image:Tivo_prom_piggy_back_socket_installation.pdf|1]], [[:Image:How_to_build_the_tivo_prom_piggy_socket.pdf|2]], [[:Image:Tivo_piggyback_prom.pdf|3]].
* [http://www.linuxbios.org/Booting_Windows_using_LinuxBIOS Booting Windows using LinuxBIOS]
* [[LinuxBIOSv3]]

== External articles ==

* [http://www.linuxjournal.com/article/7170 LinuxBIOS at Four]
* [http://plan9.bell-labs.com/wiki/plan9/Integrating_9load_into_the_linuxbios/index.html Integrating 9load into the LinuxBIOS]
* [http://blog.slightlyhackish.com/2007/03/26/building-and-testing-linuxbiosv2-step-by-step.aspx Building and testing LinuxBIOSv2, step by step]
* [http://blog.perlplexity.org/?p=13 How to get the Iwill DK8-HTX running with LinuxBIOS]

== Papers/Articles/Slides ==

=== Breaking the Chains -- Using LinuxBIOS to Liberate Embedded x86 Processors ===
* Jordan H. Crouse, Marc E. Jones, Ronald G. Minnich
* Proceedings of the Linux Symposium, June 27th-30th, 2007, Ottawa, Ontario, Canada
* [ [https://ols2006.108.redhat.com/2007/Reprints/crouse-Reprint.pdf pdf] | [http://linuxbios.org/images/8/88/Crouse-Reprint.pdf pdf (local copy)] ]

=== LinuxBIOS - Freedom for your motherboard ===
* Alan Carvalho de Assis
* FISL 8.0 (8th Forum Internacional de Software Livre)
* [ [[Media:LinuxBIOS-FISL8.pdf|pdf]] ]

=== FSF is moving towards LinuxBIOS deployment (Russian article) ===
* Anton Borisov
* SAMAG, 02-2006 (http://www.samag.ru)
* [ [[Media:LX2%40FSF_4a.pdf|pdf]] | [http://ps.kaos.ru/download/FSF_migrates_to_LinuxBIOS_technology.pdf alternative PDF] ]

=== FreeVGA: Architecture Independent Video Graphics Initialization for LinuxBIOS ===
* Li-Ta Lo, Gregory R. Watson, Ronald G. Minnich
* Usenix, February 25 2005 (??)
* [ [http://www.linuxbios.org/data/vgabios/ html] | [[Media:vgabios.pdf|pdf]] ]

=== Flexibility in ROM: A Stackable Open Source BIOS ===
* Adam Agnew, Adam Sulmicki, Ronald Minnich, William Arbaugh
* USENIX 2003 Annual Technical Conference, FREENIX Track
* [ [http://www.usenix.org/events/usenix03/tech/freenix03/agnew/agnew_html/index.html HTML] ]

=== Supermon: High performance monitoring for Linux clusters ===
* Ron Minnich, Los Alamos National Laboratory, and Karen Reid, University of Toronto
* The [http://www.linuxshowcase.org/2001/ Fifth Annual Linux Showcase and Conference], Oakland, CA, November 5-10 2001
* [ [[Media:supermon.ps|ps]] ]

=== LOBOS and LinuxBIOS ===
* Cluster Research Brochure
* prepared for SC 2000, November 4-10 2000
* [ [[Media:sc00.pdf|pdf]] ]

=== The Linux BIOS ===
* Ron Minnich, James Hendricks, and Dale Webster, Los Alamos National Laboratory
* The [http://www.linuxshowcase.org/2000/ Fourth Annual Linux Showcase and Conference], Atlanta, GA, October 4-11 2000
* [ [[Media:linuxbios.pdf|pdf]] | [[Media:linuxbios.ps|ps]] ]

=== LOBOS (Linux OS Boots Linux OS): Booting a Kernel in 32-bit Mode ===
* Ron Minnich, Los Alamos National Laboratory
* The [http://www.linuxshowcase.org/2000/ Fourth Annual Linux Showcase and Conference], Atlanta, GA, October 4-11 2000
* [ [[Media:lobos.pdf|pdf]] | [[Media:lobos.ps|ps]] ]

=== Putting Linux on your motherboard ===
* Antony Stone
* [http://www.linux-magazine.com/ Linux Magazine], March, 2003, Pg. 76
* [ [[Media:LinuxBIOS.pdf|pdf]] ]

=== Look Ma, No Bios ===
* Oleg Goldshmidt
* IBM Haifa Research Laboratory, July 2006
* [http://www.goldshmidt.org/about/lectures.html Oleg's talks]
* [ [http://www.goldshmidt.org/about/LinuxBIOS/LinuxBIOSHaifux.html html] | [http://www.goldshmidt.org/about/LinuxBIOS/LinuxBIOSHaifux.html.zip html.zip] | [http://www.goldshmidt.org/about/LinuxBIOS/LinuxBIOSHaifux.ppt.zip ppt.zip] | [[Media:LookMaNoBIOS.pdf|pdf]] ]

=== A Framework for Using Processor Cache as RAM (CAR) ===
* Eswaramoorthi Nallusamy
* University of New Mexico
* [ [[Media:LBCar.ppt|ppt]] | [[Media:LBCar.pdf|pdf]]]

== Books ==

These books do not address LinuxBIOS specifically but provide background information useful for BIOS-level programming on PC hardware.

* [http://www.mindshare.com/protected/link.asp?type=documents&id=48&section=PCI|TM PCI System Architecture]
* [http://www.mindshare.com/protected/link.asp?type=documents&id=27&section=HyperTransport|TM HyperTransport System Architecture]
* [http://www.mindshare.com/protected/link.asp?type=documents&id=24&section=AMD%20Opteron|TM%20Processor AMD K8 Processor Architecture] (white paper/book excerpt)

Confirmed working svn revisions

2007-08-13T16:53:16Z

Quux:

Also see the page on how to [[Download LinuxBIOS]].

{| border="0"
|- bgcolor="#6699dd"
! align="left" | Board
! align="left" | Directory
! align="left" | SVN Revision
! align="left" | Comment
|- bgcolor="#eeeeee"
| VIA EPIA-M || via/epia-m || 2100 || Extract the video BIOS while running factory BIOS:
dd if=/dev/mem of=video.bios.bin.4 bs=65536 count=1 skip=12
|- bgcolor="#dddddd"
| VIA EPIA-M10000 (PCB.rev.B) || via/epia-m || 2184 || Extract the video BIOS while running factory BIOS 1.13:
dd if=/dev/mem of=video.bios.bin.4 bs=65536 count=1 skip=12

In src/mainboard/via/epia-m/mainboard.c, line 33:
- dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3123, 0);
+ dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3122, 0);
|-
|- bgcolor="#eeeeee"
| Tyan S2881 || tyan/s2881 || 2251-2287<br />2296 and higher || See the [[Tyan S2881 Build Tutorial]].
|-
|- bgcolor="#dddddd"
| ASUS A8N-E || asus/a8ne || * || upcoming
|- bgcolor="#eeeeee"
| Gigabyte M57 SLI || **/m57sli || * || upcoming
|- bgcolor="#dddddd"
| Tyan S2881 || tyan/s2881 || 2251-2287<br />2296 and higher || See the [[Tyan S2881 Build Tutorial]].
|}

Confirmed working svn revisions

2007-08-13T16:51:46Z

Quux:

Also see the page on how to [[Download LinuxBIOS]].

{| border="0"
|- bgcolor="#6699dd"
! align="left" | Board
! align="left" | Directory
! align="left" | SVN Revision
! align="left" | Comment
|- bgcolor="#eeeeee"
| VIA EPIA-M || via/epia-m || 2100 || Extract the video BIOS while running factory BIOS:
dd if=/dev/mem of=video.bios.bin.4 bs=65536 count=1 skip=12
|- bgcolor="#dddddd"
| VIA EPIA-M10000 (PCB.rev.B) || via/epia-m || 2184 || Extract the video BIOS while running factory BIOS 1.13:
dd if=/dev/mem of=video.bios.bin.4 bs=65536 count=1 skip=12

In src/mainboard/via/epia-m/mainboard.c, line 33:
- dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3123, 0);
+ dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3122, 0);
|-
|- bgcolor="#eeeeee"
| Tyan S2881 || tyan/s2881 || 2251-2287<br />2296 and higher || See the [[Tyan S2881 Build Tutorial]].
|-
|- bgcolor="#dddddd"
| ASUS A8N-E || **/a8ne || * || upcoming
|- bgcolor="#eeeeee"
| Gigabyte M57 SLI || **/m57sli || * || upcoming
|- bgcolor="#dddddd"
| Tyan S2881 || tyan/s2881 || 2251-2287<br />2296 and higher || See the [[Tyan S2881 Build Tutorial]].
|}

Confirmed working svn revisions

2007-08-13T16:49:57Z

Quux: A8NE added

Also see the page on how to [[Download LinuxBIOS]].

{| border="0"
|- bgcolor="#6699dd"
! align="left" | Board
! align="left" | Directory
! align="left" | SVN Revision
! align="left" | Comment
|- bgcolor="#eeeeee"
| VIA EPIA-M || via/epia-m || 2100 || Extract the video BIOS while running factory BIOS:
dd if=/dev/mem of=video.bios.bin.4 bs=65536 count=1 skip=12
|- bgcolor="#dddddd"
| VIA EPIA-M10000 (PCB.rev.B) || via/epia-m || 2184 || Extract the video BIOS while running factory BIOS 1.13:
dd if=/dev/mem of=video.bios.bin.4 bs=65536 count=1 skip=12

In src/mainboard/via/epia-m/mainboard.c, line 33:
- dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3123, 0);
+ dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3122, 0);
|-
|- bgcolor="#eeeeee"
| Tyan S2881 || tyan/s2881 || 2251-2287<br />2296 and higher || See the [[Tyan S2881 Build Tutorial]].
|-
|- bgcolor="#dddddd"
| ASUS A8N-E || **/a8ne || * || upcoming
|- bgcolor="#eeeeee"
| Tyan S2881 || tyan/s2881 || 2251-2287<br />2296 and higher || See the [[Tyan S2881 Build Tutorial]].
|}

ASUS A8N-E

2007-08-12T21:05:55Z

Quux: /* Before you begin */

{{GPL}}

===Before you begin===

The Asus A8N-E is a Athlon64 Socket 939 board (nforce 4 ultra) with socketed BIOS sold around €120 (mostly out of stock in 8/2007) (used items at ebay ~ €20-35 possible). It already boots LinuxBIOS. Latest legacy BIOS is from May 2006 v.1013. Socket 939 Athlons do not have Pacifica Virtualization.

The plcc32 BIOS chip is of type SST 49LF004B of which you need a spare pre-programmed piece.

[[Image:Chip_lb.png|thumb|flash type 4 Mbit SST 49LF004B]]

A8N-sli deluxe, an "nforce 4 sli" board probably shares the same pcb design with more solder pads populated (pls cnfirm), and is also out of stock mostly.
Supporting more recent A8N boards is considered, but there is no confirmation about any one already [[Desktops|working]].

===known issues===
currently PS/2 keyboards do not work, but USB keyboards do.

single DIMM support only

===Payload===

===Building the payload===

===Your menu.list entry===

===Current status of the LBv2 tree===

===Building LinuxBIOS===

===Burning LinuxBIOS===

===Running LinuxBIOS===

===Help?===

===TODO===

If you can help out with this, please join the [[Mailinglist|mailing list]] and let us know!

ASUS A8N-E

2007-08-12T14:19:13Z

Quux: /* Before you begin */

{{GPL}}

===Before you begin===

The Asus A8N-E is a Athlon64 Socket 939 board (nforce 4 ultra) with socketed BIOS sold around €120 (mostly out of stock in 8/2007) (used at ebay €30-50 possible). It already boots LinuxBIOS. Latest legacy BIOS is from May 2006 v.1013. Socket 939 Athlons do not have Pacifica Virtualization.

The plcc32 BIOS chip is of type SST 49LF004B of which you need a spare pre-programmed piece.

[[Image:Chip_lb.png|thumb|flash type 4 Mbit SST 49LF004B]]

A8N-sli deluxe, an "nforce 4 sli" board probably shares the same pcb design with more solder pads populated (pls cnfirm), and is also out of stock mostly.
Supporting more recent A8N boards is considered, but there is no confirmation about any one already [[Desktops|working]].

===known issues===
currently PS/2 keyboards do not work, but USB keyboards do.

single DIMM support only

===Payload===

===Building the payload===

===Your menu.list entry===

===Current status of the LBv2 tree===

===Building LinuxBIOS===

===Burning LinuxBIOS===

===Running LinuxBIOS===

===Help?===

===TODO===

If you can help out with this, please join the [[Mailinglist|mailing list]] and let us know!

ASUS A8N-E

2007-08-12T14:18:37Z

Quux: /* Before you begin */ SST49LF004B

{{GPL}}

===Before you begin===

The Asus A8N-E is a Athlon64 Socket 939 board (nforce 4 ultra) with socketed BIOS sold around €120 (mostly out of stock in 8/2007) (used at ebay €30-50 possible). It already boots LinuxBIOS. Latest legacy BIOS is from May 2006 v.1013. Socket 939 Athlons do not have Pacifica Virtualization.

The plcc32 BIOS chip is of type SST49LF004B of which you need a spare pre-programmed piece.

[[Image:Chip_lb.png|thumb|flash type 4 Mbit ______]]

A8N-sli deluxe, an "nforce 4 sli" board probably shares the same pcb design with more solder pads populated (pls cnfirm), and is also out of stock mostly.
Supporting more recent A8N boards is considered, but there is no confirmation about any one already [[Desktops|working]].

===known issues===
currently PS/2 keyboards do not work, but USB keyboards do.

single DIMM support only

===Payload===

===Building the payload===

===Your menu.list entry===

===Current status of the LBv2 tree===

===Building LinuxBIOS===

===Burning LinuxBIOS===

===Running LinuxBIOS===

===Help?===

===TODO===

If you can help out with this, please join the [[Mailinglist|mailing list]] and let us know!