https://www.coreboot.org/api.php?action=feedcontributions&user=Ruik&feedformat=atomcoreboot - User contributions [en]2024-03-19T13:45:05ZUser contributionsMediaWiki 1.40.0https://www.coreboot.org/index.php?title=Binary_situation&diff=17688Binary situation2016-01-09T21:30:06Z<p>Ruik: Fix the first occurence in the family 15h/family16h.</p>
<hr />
<div>While we aim for a 100% free boot process, recent developments (and general unwillingness by some hardware companies to provide specifications) make it hard to achieve.<br />
<br />
= Intel =<br />
On Intel based chipsets (since Intel 5 Series) the following binary components persist:<br />
* <span style="background:red">'''Panic level: 9000+'''</span> <u>[[Intel_Management_Engine|Management Engine firmware]]</u>: The management engine is a separate CPU that does various management tasks and needs its own firmware. This firmware exists in a 1.5MB and a 5MB version, where the latter provides the "Intel AMT" functions (ie. remote access, "anti-theft", ...). Probably signed with an Intel key. It's unlikely that this is ever replaced by something open source. Firmware that runs on an ARC core inside the chipset. It runs entirely out-of-band with the main CPU. It has DMA access to the entire system memory and can access the networking adapters in a way transparent to the OS (separate MAC and IP). (can be removed on GM45. See ich9gen notes on the [http://www.coreboot.org/Board:lenovo/x200 X200 page] or on [http://libreboot.org/docs/hcl/gm45_remove_me.html#ich9gen libreboot.org])<br />
<br />
* <span style="background:orange">'''Panic level: 8999'''</span> <u>[[Memory Reference Code]]</u>: (Sandybridge and newer). This is code that runs on the CPU and initializes RAM. Can be reverse engineered with enough persistence, but not done so far. The "Memory Reference Code", initializes memory and USB power states (other functions are yet unknown). It is provided by Google, and is wrapper for Intel PEI modules.<br />
<br />
* <span style="background:yellow">'''Panic level: medium'''</span> <u>[[VGA support|VGA BIOS]]</u>: Runs on the CPU. Unless you can live with staying in the dark until Linux takes over, you'll need this. Luckily there's work in progress to replace it with open source code on many systems (some systems already have a free replacement. 'native graphics initialization'). Until then you can at least somehow contain it by emulation (see [[VGA_support#YABEL|YABEL]]).<br />
<br />
* <span style="background:lime">'''Panic level: small'''</span> <u>[[CPU microcode]]</u>: Intel provides this as redistributable binary, the format is partially reverse engineered, it's covered by a 2048b RSA signature. Unlikely that it can be replaced. Depending on the CPU (incl. its stepping) it might be possible to get by without it. Check http://inertiawar.com/microcode/ for details.<br />
<br />
* <span style="background:lime">'''Panic level: small'''</span> <u>[[Intel 82573 Ethernet controller|Gigabit Ethernet Firmware]]</u>: If your board uses the on-chipset GbE, it requires a small binary (8KB), which contains configuration data (but no executable code) for the onboard ethernet chipset (also contains configuration data for the ME/AMT on some systems). (reverse engineered on GM45. See ich9gen notes on the [http://www.coreboot.org/Board:lenovo/x200 X200 page] or on [http://libreboot.org/docs/hcl/gm45_remove_me.html#ich9gen libreboot.org])<br />
<br />
= recent AMD =<br />
* <u>[[AMD IMC|IMC]]</u>: An embedded controller of sorts in the southbridge. 8051-based, can probably be reimplemented (partially done, but unpublished) Check the [[AMD_IMC]] page. The controller is either enabled by hardware strap option. Or if you provide a firmware, the controller is enabled via soft strapping the chipset. It is 8051 controller.<br />
<br />
* XHCI: Controller for USB 3.0 controllers. Analysis has shown that the firmware used in AMD system is most likely Renesas USB 3.0 IP Core. It seems it is V850 compatible controller If not present, USB3 (and related USB ports) won't work. Partial documentation is at [[AMD_XHCI]].<br />
<br />
* NIC Firmware: If your board uses the on-chip broadcom NIC, you need this firmware. Luckily few boards do (thanks to Broadcom seemingly having some "interesting" terms and conditions on its use) Check http://review.coreboot.org/#/c/2831/ for partial documentation<br />
<br />
* <span style="background:lime">'''Panic level: small'''</span> CPU microcode: AMD provides this as redistributable binary, the format is partially reverse engineered, it's covered by a 2048b RSA signature. Unlikely that it can be replaced. Depending on the CPU (incl. its stepping) it might be possible to get by without it. Older microcode described http://www.securiteam.com/securityreviews/5FP0M1PDFO.html<br />
<br />
* <span style="background:orange">'''Panic level: medium-high'''</span> SMU: Another embedded controller, The SMU seems to be handling PCIe power management stuff in AMD northbridges (from RS880 onwards?) the firmware is loaded during system boot. It is unknown if the firmware has to be loaded. The SMU is most likely Altera LM32 CPU.<br />
<br />
* <u>[[VGA support|VGA BIOS]]</u>: The VGA BIOS contains bytecode which is motherboard/layout specific. Open source efforts here http://sourceforge.net/projects/openradeonbios/?source=dlp<br />
<br />
In theory it might be possible to successfully boot an AMD board without all these binaries, with potentially reduced capabilities (no NIC, USB3, fan control)<br />
<br />
* <span style="background:red">'''Panic level: high'''</span> PSP: The Cortex A8 running trustzone firmware, implemented from family 15h model 60h (Carrizo) and family 16h model 30h (Mullins) and up. It is running Trustonic TEE OS licensed by AMD. PSP Boot ROM runs *before* x86 core. Then non-bootrom PSP parts are stored (zlib-compressed) in the main flash. Bypass mechanism available via strap pin, but dummy and AMD signed bypass binaries needs to be always run. It is expected that newer CPUs will offload part of AGESA to the PSP, making memory init even part of the PSP :(<br />
<br />
<br />
== Classification of blobs ==<br />
<br />
=== ISA vs non-ISA blobs ===<br />
<br />
We use the term '''ISA blob''' (Instruction Set Architecture) to denote a blob which<br />
# Contains a set of instructions in the main processor's instruction set<br />
# Those instructions are executed on the main CPU<br />
For example, MRC is a blob which contains x86 instructions on some Intel CPUs (x86) to initialize memory. It is considered an ISA blob. A video BIOS is also an ISA blob. On the other hand, CPU microcode is a non-ISA blob as it is not a set of x86 (or ARMv7) instructions, <br />
despite it residing in the main CPU.<br />
<br />
=== Axis 1: Essential vs non-essential blobs ===<br />
<br />
We consider a blob '''essential''' if the machine cannot fulfill its intended purpose without the blob. For example, if memory initialization is done by a blob, then that blob is essential, as the machine will never be able to boot an operating system.<br />
<br />
Whether a certain blob is essential or non-essential depends on both the nature of the machine, and the nature of the blob. For example, a VBIOS on a laptop is normally considered essential, as the laptop will be useless without the display. However, if the operating system can initialize the graphics hardware without the VBIOS, then the laptop can be used normally, and the blob is considered non-essential. However, in the case of a headless server, the blob is always non-essential, as the display functionality is neither needed, nor used, regardless of the OS's ability to initialize the graphics hardware.<br />
<br />
Blobs for certain subsystems, such as USB 3.0 firmware blobs, are also non-essential, as the machine can function normally without USB 3.0 functionality.<br />
<br />
=== Axis 2: Replaceable blobs ===<br />
<br />
A blob is considered reasonably '''replaceable''' if it can be replaced with a free alternative, by community effort, in a reasonable timeframe, with a reasonable amount of effort. For this to be possible, the following conditions must usually be met:<br />
# The hardware is reasonably documented<br />
# The process of loading the blob is well understood<br />
# The blob can be loaded without the need to circumvent cryptographic protections<br />
<br />
Point (1) ensures that tools, such as compilers, are easily available, and that super-human effort is not required in order to reverse-engineer the blob and understand its function.<br />
Point (2) ensures that once a free replacement is available, it can be uploaded to the hardware and executed. Proprietary and undocumented checksumming algorithms, for example, would make the replacement impossible to upload until such algorithm is understood. Also, if the blob is loaded automatically by hardware, the form in which it must be presented to the hardware must be understood and reproducible.<br />
Point (3) ensures that any free replacement can be executed without needing approval and/or verification from the hardware manufacturer. This is important in ensuring that the user, not the vendor, controls the hardware.<br />
<br />
For example, a video BIOS for a documented GPU is reasonably replaceable. Since a VBIOS usually consists of x86 instructions, compilers are readily available, and the register map is documented, satisfying point (1). Although the structure of a PCI option ROM, and thus a VBIOS is well understood and documented, it is not required, as a VBIOS replacement is usually implemented as native VGA initialization. This satisfies point (2). Point (3) is irrelevant, as the free replacement would be implemented as native coreboot code.<br />
<br />
On the other hand, a Management Engine blob is not replaceable as it is cryptographically signed. the hardware will not execute any ME blob which is not signed by the manufacturer (Intel), thus violating point (3).<br />
<br />
=== Axis 3: Always-on blobs ===<br />
<br />
A blob is considered '''always-on''' if the blob continues to be active and capable of execution after the system is brought up. If a blob only runs briefly to initialize a certain component during system bring-up, then that blob is not always-on.<br />
<br />
For example ME or USB 3.0 firmwares are always-on, as they operate concurrently with the OS.<br />
<br />
Always-on blobs are especially troublesome for platform security because they expose new attack surfaces. For example, arbitrary code execution vulnerabilities have been demonstrated in both ME and SMU. Since the majority of always-on blobs control hardware with DMA access, these vulnerabilities present a hidden risk to system security. Enabling features such as IOMMU may alleviate such risks, but does not eliminate them entirely.<br />
<br />
= References =<br />
<br />
* Brief [http://www.youtube.com/watch?v=TdUsyXQ8Wrs explanation] of what a blob is.<br />
* Brief [http://www.youtube.com/watch?v=SiMHTK15Pik explanation] of "panic level" rating system.<br />
<br />
[[Category:Blobs|Blobs]]</div>Ruikhttps://www.coreboot.org/index.php?title=Binary_situation&diff=17687Binary situation2016-01-09T21:16:07Z<p>Ruik: Add PSP</p>
<hr />
<div>While we aim for a 100% free boot process, recent developments (and general unwillingness by some hardware companies to provide specifications) make it hard to achieve.<br />
<br />
= Intel =<br />
On Intel based chipsets (since Intel 5 Series) the following binary components persist:<br />
* <span style="background:red">'''Panic level: 9000+'''</span> <u>[[Intel_Management_Engine|Management Engine firmware]]</u>: The management engine is a separate CPU that does various management tasks and needs its own firmware. This firmware exists in a 1.5MB and a 5MB version, where the latter provides the "Intel AMT" functions (ie. remote access, "anti-theft", ...). Probably signed with an Intel key. It's unlikely that this is ever replaced by something open source. Firmware that runs on an ARC core inside the chipset. It runs entirely out-of-band with the main CPU. It has DMA access to the entire system memory and can access the networking adapters in a way transparent to the OS (separate MAC and IP). (can be removed on GM45. See ich9gen notes on the [http://www.coreboot.org/Board:lenovo/x200 X200 page] or on [http://libreboot.org/docs/hcl/gm45_remove_me.html#ich9gen libreboot.org])<br />
<br />
* <span style="background:orange">'''Panic level: 8999'''</span> <u>[[Memory Reference Code]]</u>: (Sandybridge and newer). This is code that runs on the CPU and initializes RAM. Can be reverse engineered with enough persistence, but not done so far. The "Memory Reference Code", initializes memory and USB power states (other functions are yet unknown). It is provided by Google, and is wrapper for Intel PEI modules.<br />
<br />
* <span style="background:yellow">'''Panic level: medium'''</span> <u>[[VGA support|VGA BIOS]]</u>: Runs on the CPU. Unless you can live with staying in the dark until Linux takes over, you'll need this. Luckily there's work in progress to replace it with open source code on many systems (some systems already have a free replacement. 'native graphics initialization'). Until then you can at least somehow contain it by emulation (see [[VGA_support#YABEL|YABEL]]).<br />
<br />
* <span style="background:lime">'''Panic level: small'''</span> <u>[[CPU microcode]]</u>: Intel provides this as redistributable binary, the format is partially reverse engineered, it's covered by a 2048b RSA signature. Unlikely that it can be replaced. Depending on the CPU (incl. its stepping) it might be possible to get by without it. Check http://inertiawar.com/microcode/ for details.<br />
<br />
* <span style="background:lime">'''Panic level: small'''</span> <u>[[Intel 82573 Ethernet controller|Gigabit Ethernet Firmware]]</u>: If your board uses the on-chipset GbE, it requires a small binary (8KB), which contains configuration data (but no executable code) for the onboard ethernet chipset (also contains configuration data for the ME/AMT on some systems). (reverse engineered on GM45. See ich9gen notes on the [http://www.coreboot.org/Board:lenovo/x200 X200 page] or on [http://libreboot.org/docs/hcl/gm45_remove_me.html#ich9gen libreboot.org])<br />
<br />
= recent AMD =<br />
* <u>[[AMD IMC|IMC]]</u>: An embedded controller of sorts in the southbridge. 8051-based, can probably be reimplemented (partially done, but unpublished) Check the [[AMD_IMC]] page. The controller is either enabled by hardware strap option. Or if you provide a firmware, the controller is enabled via soft strapping the chipset. It is 8051 controller.<br />
<br />
* XHCI: Controller for USB 3.0 controllers. Analysis has shown that the firmware used in AMD system is most likely Renesas USB 3.0 IP Core. It seems it is V850 compatible controller If not present, USB3 (and related USB ports) won't work. Partial documentation is at [[AMD_XHCI]].<br />
<br />
* NIC Firmware: If your board uses the on-chip broadcom NIC, you need this firmware. Luckily few boards do (thanks to Broadcom seemingly having some "interesting" terms and conditions on its use) Check http://review.coreboot.org/#/c/2831/ for partial documentation<br />
<br />
* <span style="background:lime">'''Panic level: small'''</span> CPU microcode: AMD provides this as redistributable binary, the format is partially reverse engineered, it's covered by a 2048b RSA signature. Unlikely that it can be replaced. Depending on the CPU (incl. its stepping) it might be possible to get by without it. Older microcode described http://www.securiteam.com/securityreviews/5FP0M1PDFO.html<br />
<br />
* <span style="background:orange">'''Panic level: medium-high'''</span> SMU: Another embedded controller, The SMU seems to be handling PCIe power management stuff in AMD northbridges (from RS880 onwards?) the firmware is loaded during system boot. It is unknown if the firmware has to be loaded. The SMU is most likely Altera LM32 CPU.<br />
<br />
* <u>[[VGA support|VGA BIOS]]</u>: The VGA BIOS contains bytecode which is motherboard/layout specific. Open source efforts here http://sourceforge.net/projects/openradeonbios/?source=dlp<br />
<br />
In theory it might be possible to successfully boot an AMD board without all these binaries, with potentially reduced capabilities (no NIC, USB3, fan control)<br />
<br />
* <span style="background:red">'''Panic level: high'''</span> PSP: The Cortex A8 running trustzone firmware, implemented from family 17h (Carrizo) and up. It is running Trustonic TEE OS licensed by AMD. PSP Boot ROM runs *before* x86 core. Then non-bootrom PSP parts are stored (zlib-compressed) in the main flash. Bypass mechanism available via strap pin, but dummy and AMD signed bypass binaries needs to be always run. It is expected that newer CPUs will offload part of AGESA to the PSP, making memory init even part of the PSP :(<br />
<br />
<br />
== Classification of blobs ==<br />
<br />
=== ISA vs non-ISA blobs ===<br />
<br />
We use the term '''ISA blob''' (Instruction Set Architecture) to denote a blob which<br />
# Contains a set of instructions in the main processor's instruction set<br />
# Those instructions are executed on the main CPU<br />
For example, MRC is a blob which contains x86 instructions on some Intel CPUs (x86) to initialize memory. It is considered an ISA blob. A video BIOS is also an ISA blob. On the other hand, CPU microcode is a non-ISA blob as it is not a set of x86 (or ARMv7) instructions, <br />
despite it residing in the main CPU.<br />
<br />
=== Axis 1: Essential vs non-essential blobs ===<br />
<br />
We consider a blob '''essential''' if the machine cannot fulfill its intended purpose without the blob. For example, if memory initialization is done by a blob, then that blob is essential, as the machine will never be able to boot an operating system.<br />
<br />
Whether a certain blob is essential or non-essential depends on both the nature of the machine, and the nature of the blob. For example, a VBIOS on a laptop is normally considered essential, as the laptop will be useless without the display. However, if the operating system can initialize the graphics hardware without the VBIOS, then the laptop can be used normally, and the blob is considered non-essential. However, in the case of a headless server, the blob is always non-essential, as the display functionality is neither needed, nor used, regardless of the OS's ability to initialize the graphics hardware.<br />
<br />
Blobs for certain subsystems, such as USB 3.0 firmware blobs, are also non-essential, as the machine can function normally without USB 3.0 functionality.<br />
<br />
=== Axis 2: Replaceable blobs ===<br />
<br />
A blob is considered reasonably '''replaceable''' if it can be replaced with a free alternative, by community effort, in a reasonable timeframe, with a reasonable amount of effort. For this to be possible, the following conditions must usually be met:<br />
# The hardware is reasonably documented<br />
# The process of loading the blob is well understood<br />
# The blob can be loaded without the need to circumvent cryptographic protections<br />
<br />
Point (1) ensures that tools, such as compilers, are easily available, and that super-human effort is not required in order to reverse-engineer the blob and understand its function.<br />
Point (2) ensures that once a free replacement is available, it can be uploaded to the hardware and executed. Proprietary and undocumented checksumming algorithms, for example, would make the replacement impossible to upload until such algorithm is understood. Also, if the blob is loaded automatically by hardware, the form in which it must be presented to the hardware must be understood and reproducible.<br />
Point (3) ensures that any free replacement can be executed without needing approval and/or verification from the hardware manufacturer. This is important in ensuring that the user, not the vendor, controls the hardware.<br />
<br />
For example, a video BIOS for a documented GPU is reasonably replaceable. Since a VBIOS usually consists of x86 instructions, compilers are readily available, and the register map is documented, satisfying point (1). Although the structure of a PCI option ROM, and thus a VBIOS is well understood and documented, it is not required, as a VBIOS replacement is usually implemented as native VGA initialization. This satisfies point (2). Point (3) is irrelevant, as the free replacement would be implemented as native coreboot code.<br />
<br />
On the other hand, a Management Engine blob is not replaceable as it is cryptographically signed. the hardware will not execute any ME blob which is not signed by the manufacturer (Intel), thus violating point (3).<br />
<br />
=== Axis 3: Always-on blobs ===<br />
<br />
A blob is considered '''always-on''' if the blob continues to be active and capable of execution after the system is brought up. If a blob only runs briefly to initialize a certain component during system bring-up, then that blob is not always-on.<br />
<br />
For example ME or USB 3.0 firmwares are always-on, as they operate concurrently with the OS.<br />
<br />
Always-on blobs are especially troublesome for platform security because they expose new attack surfaces. For example, arbitrary code execution vulnerabilities have been demonstrated in both ME and SMU. Since the majority of always-on blobs control hardware with DMA access, these vulnerabilities present a hidden risk to system security. Enabling features such as IOMMU may alleviate such risks, but does not eliminate them entirely.<br />
<br />
= References =<br />
<br />
* Brief [http://www.youtube.com/watch?v=TdUsyXQ8Wrs explanation] of what a blob is.<br />
* Brief [http://www.youtube.com/watch?v=SiMHTK15Pik explanation] of "panic level" rating system.<br />
<br />
[[Category:Blobs|Blobs]]</div>Ruikhttps://www.coreboot.org/index.php?title=Board:asus/f2a85-m&diff=13784Board:asus/f2a85-m2014-07-22T20:41:25Z<p>Ruik: /* TODOs */</p>
<hr />
<div>== Status ==<br />
<br />
=== Supported Board Variants ===<br />
<br />
Only the Asus F2A85-M and Asus F2A85-M CSM are supported. However there is a chance that "PRO" or other variants could be easily supported (contact via mailing list for details).<br />
<br />
=== Supported CPUs ===<br />
<br />
Note: Only Trinity CPUs are supported (see list below) but with a hack also Richland CPUs might work (contact via mailing list for details).<br />
<br />
* AMD Athlon X2 340<br />
* AMD Athlon X4 740<br />
* AMD Athlon X4 750k<br />
* AMD FirePro A300<br />
* AMD FirePro A320<br />
* AMD A4-5300<br />
* AMD A4-5300B<br />
* AMD A6-5400K<br />
* AMD A6-5400B<br />
* AMD A8-5500<br />
* AMD A8-5500B<br />
* AMD A8-5600K<br />
* AMD A10-5700<br />
* AMD A10-5800B<br />
* AMD A10-5800K<br />
<br />
Wikipedia's [http://en.wikipedia.org/wiki/List_of_AMD_Accelerated_Processing_Unit_microprocessors#Virgo_-_.22Trinity.22_.282012.2C_32_nm.29 list of Trinity processors] might be more actively maintained.<br />
<br />
=== Notes ===<br />
<br />
* Retrieve the VGA optionrom from the vendor EFI binary by running:<br />
<br />
dd if=/dev/mem of=vgabios.bin bs=1k count=64 skip=768<br />
<br />
([http://www.coreboot.org/pipermail/coreboot/2012-December/073133.html source])<br />
<br />
For internal VGA:<br />
Boot the legacy BIOS, and use [[VGA_support]] chapter <br />
<br />
* Add the extracted VGA optionrom in menuconfig. The device ID for the APU graphics varies, run 'lspci -nn | grep VGA' to find the right ID.<br />
* If you use PS/2 de-select legacy free<br />
* De-select running option ROMs, Seabios will run the ROMs that coreboot loads into memory so you should get a text display from Seabios<br />
* It is required that seabios is the coreboot payload for the F2A85-M or the internal VGA will not be initialized. But read [[SeaBIOS]] for how to add payloads to SeaBIOS and set SeaBIOS' boot order to run your payload.<br />
** its internal VGA comes up just fine (using Change ID I9e0df1669d73863c95c36a3a7fee40d58f6f097e), with unpatched SeaBIOS and these settings:<br />
** CONFIG_VGA_ROM_RUN=y<br />
** CONFIG_PCI_ROM_RUN=y<br />
** CONFIG_ON_DEVICE_ROM_RUN=y<br />
* Hotswapping the PDIP BIOS chip has some issues (most likely USB3 XHCI, disable it in original bios before hot-flashing to coreboot). Drop a mail to mailing list if you have issues.<br />
<br />
=== TODOs ===<br />
* test virtualization<br />
* test HDMI: video over hdmi works with the extracted vga optionrom, audio is untested.<br />
* blink in suspend mode (GP43, program LDN7 F8=23 and blink with F9=2 for 1s blinks)<br />
* fix mptable<br />
* fix resume with USB3.0 used (perhaps there is a bug in resume.c)<br />
* fix immediate resume after suspend (perhaps PCIe STS needs to be cleared)<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = the board will start with an AMD A8-5500<br />
|CPU_L1_status = OK<br />
|CPU_L2_status = OK<br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = OK<br />
|CPU_multicore_status = OK<br />
|CPU_virt_status = Untested<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = N/A<br />
|RAM_DDR3_status = OK <br />
|RAM_DDR3_comments = Please select right voltage in menuconfig! Default is 1.5V but some DIMMs need more or less!<br />
|RAM_dualchannel_status = OK<br />
|RAM_ecc_status = N/A<br />
<br />
|IDE_status = N/A<br />
|IDE_25_status = N/A<br />
|IDE_CF_status = N/A<br />
|CDROM_DVD_status = Untested<br />
|SATA_status = OK<br />
|SATA_comments = Tested all ports of sixpack.<br />
|USB_status = OK<br />
|USB_comments = Issues with XHCI exist with Asus' BIOS as well<br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = Use dd to [[VGA_support|extract the legacy BIOS]], HDMI untested<br />
|Onboard_SCSI_status = N/A<br />
|Onboard_ethernet_status = OK<br />
|Onboard_audio_status = OK<br />
|Onboard_audio_comments = tested with headphones in line-out (lime colored)<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = N/A<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = OK<br />
|PCIE_x1_status = OK<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = OK<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = OK<br />
|PCIE_x32_status = N/A<br />
|Mini_PCI_cards_status = N/A<br />
|PCIX_cards_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = N/A<br />
|COM1_status = OK<br />
|COM2_status = N/A<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = Untested<br />
|PP_status = N/A<br />
|Game_port_status = N/A<br />
|IR_status = ?<br />
|Speaker_status = OK<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = Untested<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = OK<br />
|Powersave_status = ?<br />
|ACPI_status = OK<br />
|ACPI_comments = ACPI power button event works, suspend is WIP (work in progress).<br />
|Reboot_status = OK<br />
|Reboot_comments = warm reboot from Asus' BIOS to coreboot does not work, use reset button after the first time you flash coreboot<br />
|Poweroff_status = OK<br />
|Suspend_status = OK<br />
|LEDs_status = OK<br />
|HPET_status = OK<br />
|RNG_status = ?<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
<br />
}}<br />
<br />
== UEFI builds that allow flash chip access ==<br />
<br />
* v5016 is untested, but expected to work as well<br />
* v5018<br />
* v5103<br />
* v5104<br />
* v5107<br />
* v5202<br />
* v6002<br />
* v6004<br />
* v6102<br />
* v6402 <br />
* v6404 (requires downgrading to v6402 to flash coreboot)<br />
* v6501 (requires downgrading to v6402 to flash coreboot)<br />
* v6502 (requires downgrading to v6402 to flash coreboot)<br />
<br />
Build v6502, v6501 and v6404 do not allow access to the flash chip.<br />
<br />
Fortunately it is possible to downgrade build v6502, v6501 and v6404 to v6402, with EZFlash.<br />
<br />
Downgrading is done by downloading build v6402 from [https://www.asus.com/Motherboards/F2A85M/HelpDesk_Download/ ASUS' F2A85-M download page] and copying it to (the root directory of) a FAT32 formatted USB flash drive.<br />
<br />
Enter the EFI setup, switch to advanced mode if necessary, open the 'Tool' tab and select "ASUS EZ Flash 2 Utility".<br />
<br />
== Hardware info ==<br />
<br />
This board ships with a socketed Winbond 25Q64F, 64 Mbit (8 Mbyte) chip, in PDIP 300 mil package:<br />
<br />
{|<br />
|| [[Image:IMG_20130522_084444.jpg|thumb|Winbond 25Q64F]] <br />
|}<br />
<br />
The chip manual is available [http://www.nexflash.com/hq/enu/ProductAndSales/ProductLines/FlashMemory/SerialFlash/W25Q64FV.htm here]<br />
<br />
For out of band flashing, I use a<br />
<br />
3M test clip model 923739-08-ND<br />
<br />
It has .300" spacing, 8 pin DIP clip, gold finish and 'headless heads'. I hook this up to a [http://flashrom.org/Bus_Pirate bus pirate]. This works but reading and writing take forever:<br />
<br />
<pre><br />
# time /usr/src/flashrom/flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -w 20130826-coreboot.rom<br />
flashrom v0.9.6.1-r1669 on Linux 3.8-2-amd64 (x86_64)<br />
flashrom is free software, get the source code at http://www.flashrom.org<br />
<br />
Calibrating delay loop... OK.<br />
Found Winbond flash chip "W25Q64" (8192 kB, SPI) on buspirate_spi.<br />
Reading old flash chip contents... done.<br />
Erasing and writing flash chip... Erase/write done.<br />
Verifying flash... VERIFIED.<br />
<br />
real 35m35.409s<br />
user 0m55.976s<br />
sys 0m12.920s<br />
</pre><br />
<br />
=== DDR voltage controller ===<br />
<br />
The DDR voltage controller is accessible through the AUX SMBUS device 0x15 and it is most likely driven by programmable current source NCT3933U (datasheet on nuvoton website).<br />
<br />
=== The ASUS digi VRM ===<br />
<br />
The ASUS digi voltage controller is accessible through the SMBUS device 0x20 and it is most likely driven by CHL8318 or similar chip (re-branded)<br />
<br />
== Memory ==<br />
<br />
If you use single dimm plug it to DIMM_A2 or DIMM_B2.<br />
<br />
I use:<br />
<br />
2x 2GB DDR3 modules in blue slots:<br />
<br />
<pre><br />
#modprobe i2c-piix4<br />
#modprobe eeprom<br />
#decode-dimms<br />
<br />
---=== Memory Characteristics ===--- <br />
Fine time base 2.500 ps <br />
Medium time base 0.125 ns <br />
Maximum module speed 1333MHz (PC3-10666) <br />
Size 2048 MB <br />
Banks x Rows x Columns x Bits 8 x 14 x 10 x 64 <br />
Ranks 2 <br />
SDRAM Device Width 8 bits <br />
tCL-tRCD-tRP-tRAS 8-8-8-24 <br />
Supported CAS Latencies (tCL) 9T, 8T, 7T, 6T <br />
</pre></div>Ruikhttps://www.coreboot.org/index.php?title=Board:asus/f2a85-m&diff=13781Board:asus/f2a85-m2014-07-22T20:22:29Z<p>Ruik: /* TODOs */</p>
<hr />
<div>== Status ==<br />
<br />
=== Supported Board Variants ===<br />
<br />
Only the Asus F2A85-M and Asus F2A85-M CSM are supported. However there is a chance that "PRO" or other variants could be easily supported (contact via mailing list for details).<br />
<br />
=== Supported CPUs ===<br />
<br />
Note: Only the trinity CPU are supported (see list below) but with a hack also Richland CPUs might work (contact via mailing list for details).<br />
<br />
* AMD Athlon X2 340<br />
* AMD Athlon X4 740<br />
* AMD Athlon X4 750k<br />
* AMD FirePro A300<br />
* AMD FirePro A320<br />
* AMD A4-5300<br />
* AMD A4-5300B<br />
* AMD A6-5400K<br />
* AMD A6-5400B<br />
* AMD A8-5500<br />
* AMD A8-5500B<br />
* AMD A8-5600K<br />
* AMD A10-5700<br />
* AMD A10-5800B<br />
* AMD A10-5800K<br />
<br />
This list might be maintained more actively: http://en.wikipedia.org/wiki/List_of_AMD_Accelerated_Processing_Unit_microprocessors#Virgo_-_.22Trinity.22_.282012.2C_32_nm.29<br />
<br />
=== Notes ===<br />
<br />
* Retrieve the VGA optionrom from the vendor EFI binary by running:<br />
<br />
dd if=/dev/mem of=vgabios.bin bs=1k count=64 skip=768<br />
<br />
(source: http://www.coreboot.org/pipermail/coreboot/2012-December/073133.html )<br />
<br />
For internal VGA:<br />
Boot the legacy BIOS, and use [[VGA_support]] chapter <br />
<br />
* Add the extracted VGA optionrom in menuconfig. The device ID for the APU graphics varies, run 'lspci -nn | grep VGA' to find the right ID.<br />
* If you use PS/2 de-select legacy free<br />
* De-select running option ROMs, Seabios will run the ROMs that coreboot loads into memory so you should get a text display from Seabios<br />
* It is required that seabios is the coreboot payload for the F2A85-M or the internal VGA will not be initialized. But read [[SeaBIOS]] for how to add payloads to SeaBIOS and set SeaBIOS' boot order to run your payload.<br />
** its internal VGA comes up just fine (using Change ID I9e0df1669d73863c95c36a3a7fee40d58f6f097e), with unpatched SeaBIOS and these settings:<br />
** CONFIG_VGA_ROM_RUN=y<br />
** CONFIG_PCI_ROM_RUN=y<br />
** CONFIG_ON_DEVICE_ROM_RUN=y<br />
* Hotswapping the PDIP BIOS chip has some issues (most likely USB3 XHCI, disable it in original bios before hot-flashing to coreboot). Drop a mail to mailing list if you have issues.<br />
<br />
=== TODOs ===<br />
* test virtualization<br />
* test HDMI: video over hdmi works with the extracted vga optionrom, audio is untested.<br />
* blink in suspend mode<br />
* fix mptable<br />
* fix resume with USB3.0 used (perhaps there is a bug in resume.c)<br />
* fix immediate resume after suspend (perhaps PCIe STS needs to be cleared)<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = the board will start with an AMD A8-5500<br />
|CPU_L1_status = OK<br />
|CPU_L2_status = OK<br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = OK<br />
|CPU_multicore_status = OK<br />
|CPU_virt_status = Untested<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = N/A<br />
|RAM_DDR3_status = OK <br />
|RAM_DDR3_comments = Please select right voltage in menuconfig! Default is 1.5V but some DIMMs need more or less!<br />
|RAM_dualchannel_status = OK<br />
|RAM_ecc_status = N/A<br />
<br />
|IDE_status = N/A<br />
|IDE_25_status = N/A<br />
|IDE_CF_status = N/A<br />
|CDROM_DVD_status = Untested<br />
|SATA_status = OK<br />
|SATA_comments = Tested all ports of sixpack.<br />
|USB_status = OK<br />
|USB_comments = Issues with XHCI exist with Asus' BIOS as well<br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = Use dd to [[VGA_support|extract the legacy BIOS]], HDMI untested<br />
|Onboard_SCSI_status = N/A<br />
|Onboard_ethernet_status = OK<br />
|Onboard_audio_status = OK<br />
|Onboard_audio_comments = tested with headphones in line-out (lime colored)<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = N/A<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = OK<br />
|PCIE_x1_status = OK<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = OK<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = OK<br />
|PCIE_x32_status = N/A<br />
|Mini_PCI_cards_status = N/A<br />
|PCIX_cards_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = N/A<br />
|COM1_status = OK<br />
|COM2_status = N/A<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = Untested<br />
|PP_status = N/A<br />
|Game_port_status = N/A<br />
|IR_status = ?<br />
|Speaker_status = OK<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = Untested<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = OK<br />
|Powersave_status = ?<br />
|ACPI_status = OK<br />
|ACPI_comments = ACPI power button event works, suspend is WIP (work in progress).<br />
|Reboot_status = OK<br />
|Reboot_comments = warm reboot from Asus' BIOS to coreboot does not work, use reset button after the first time you flash coreboot<br />
|Poweroff_status = OK<br />
|Suspend_status = OK<br />
|LEDs_status = OK<br />
|HPET_status = OK<br />
|RNG_status = ?<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
<br />
}}<br />
<br />
== UEFI builds that allow flash chip access ==<br />
<br />
* v5016 is untested, but expected to work as well<br />
* v5018<br />
* v5103<br />
* v5104<br />
* v5107<br />
* v5202<br />
* v6002<br />
* v6004<br />
* v6102<br />
* v6402 <br />
* v6404 (requires downgrading to v6402 to flash coreboot)<br />
* v6501 (requires downgrading to v6402 to flash coreboot)<br />
* v6502 (requires downgrading to v6402 to flash coreboot)<br />
<br />
Build v6502, v6501 and v6404 do not allow access to the flash chip.<br />
<br />
Fortunately it is possible to downgrade build v6502, v6501 and v6404 to v6402, with EZFlash.<br />
<br />
Downgrading is done by downloading build v6402 from [https://www.asus.com/Motherboards/F2A85M/HelpDesk_Download/ ASUS' F2A85-M download page] and copying it to (the root directory of) a FAT32 formatted USB flash drive.<br />
<br />
Enter the EFI setup, switch to advanced mode if necessary, open the 'Tool' tab and select "ASUS EZ Flash 2 Utility".<br />
<br />
== Hardware info ==<br />
<br />
This board ships with a socketed Winbond 25Q64F, 64 Mbit (8 Mbyte) chip, in PDIP 300 mil package:<br />
<br />
{|<br />
|| [[Image:IMG_20130522_084444.jpg|thumb|Winbond 25Q64F]] <br />
|}<br />
<br />
The chip manual is available [http://www.nexflash.com/hq/enu/ProductAndSales/ProductLines/FlashMemory/SerialFlash/W25Q64FV.htm here]<br />
<br />
For out of band flashing, I use a<br />
<br />
3M test clip model 923739-08-ND<br />
<br />
It has .300" spacing, 8 pin DIP clip, gold finish and 'headless heads'. I hook this up to a [http://flashrom.org/Bus_Pirate bus pirate]. This works but reading and writing take forever:<br />
<br />
<pre><br />
# time /usr/src/flashrom/flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -w 20130826-coreboot.rom<br />
flashrom v0.9.6.1-r1669 on Linux 3.8-2-amd64 (x86_64)<br />
flashrom is free software, get the source code at http://www.flashrom.org<br />
<br />
Calibrating delay loop... OK.<br />
Found Winbond flash chip "W25Q64" (8192 kB, SPI) on buspirate_spi.<br />
Reading old flash chip contents... done.<br />
Erasing and writing flash chip... Erase/write done.<br />
Verifying flash... VERIFIED.<br />
<br />
real 35m35.409s<br />
user 0m55.976s<br />
sys 0m12.920s<br />
</pre><br />
<br />
=== DDR voltage controller ===<br />
<br />
The DDR voltage controller is accessible through the AUX SMBUS device 0x15 and it is most likely driven by programmable current source NCT3933U (datasheet on nuvoton website).<br />
<br />
=== The ASUS digi VRM ===<br />
<br />
The ASUS digi voltage controller is accessible through the SMBUS device 0x20 and it is most likely driven by CHL8318 or similar chip (re-branded)<br />
<br />
== Memory ==<br />
<br />
If you use single dimm plug it to DIMM_A2 or DIMM_B2.<br />
<br />
I use:<br />
<br />
2x 2GB DDR3 modules in blue slots:<br />
<br />
<pre><br />
#modprobe i2c-piix4<br />
#modprobe eeprom<br />
#decode-dimms<br />
<br />
---=== Memory Characteristics ===--- <br />
Fine time base 2.500 ps <br />
Medium time base 0.125 ns <br />
Maximum module speed 1333MHz (PC3-10666) <br />
Size 2048 MB <br />
Banks x Rows x Columns x Bits 8 x 14 x 10 x 64 <br />
Ranks 2 <br />
SDRAM Device Width 8 bits <br />
tCL-tRCD-tRP-tRAS 8-8-8-24 <br />
Supported CAS Latencies (tCL) 9T, 8T, 7T, 6T <br />
</pre></div>Ruikhttps://www.coreboot.org/index.php?title=Welcome_to_coreboot&diff=13769Welcome to coreboot2014-07-13T17:45:44Z<p>Ruik: Add coreboot hackaton in prague invitation</p>
<hr />
<div><table width="100%" valign="top"><tr valign="top"><td width="80%"><br />
<br />
<div style="margin-top:0.5em; margin-bottom:0.5em; padding:0.5em 0.5em 0.5em 0.5em; background-color:#efefff; align:right; border:1px solid #aabbcc;"><br />
'''coreboot''' is a Free Software project aimed at replacing the proprietary [http://wikipedia.org/wiki/BIOS BIOS] (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a [[Payloads|payload]].<br />
<br />
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly from firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like [[SeaBIOS | PC BIOS services]] or [[TianoCore | UEFI]]. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.<br />
<br />
coreboot currently supports over '''[[Supported Motherboards|230]]''' different mainboards. Check the [[Support]] page to see if your system is supported.<br />
<br />
<small><br />
coreboot was formerly known as [http://www.coreboot.org/pipermail/coreboot/2008-January/029135.html LinuxBIOS]. <br />
</small><br />
</div><br />
<br />
<div style="margin-top:0.5em; margin-bottom:0.5em; padding:0.5em 0.5em 0.5em 0.5em; background-color:#efefff; align:right; border:1px solid #aabbcc;"><br />
coreboot uses [[git]] for source control and [http://review.coreboot.org gerrit] as the patch review tool.<br />
</div><br />
<br />
{| cellspacing=0 cellpadding=8 border=0 margin=0 padding=0 align="top" width=100%<br />
|-<br />
|style="vertical-align:top"|<br />
<br />
{{Box|<br />
BORDER = #8898bf|<br />
BACKGROUND = yellow|<br />
WIDTH = 100%|<br />
ICON = <small>[[Benefits|More...]]</small>|<br />
HEADING = <span style="font-variant:small-caps; font-size:120%">[[Benefits]]</span>|<br />
CONTENT =<br />
<small><br />
* 100% Free Software (GPL), no royalties, no license fees!<br />
* Fast boot times (500 milliseconds to verified Linux kernel)<br />
<!-- * Avoids the need for a slow/buggy/proprietary BIOS --><br />
<!-- * Runs in 32-Bit protected mode almost from the start --><br />
<!-- * Written in C, contains virtually no assembly code --><br />
* Supports many [[Supported Motherboards|mainboards]], [[Supported Chipsets and Devices|chipsets]], and [[payloads]]<br />
<!-- * Further features: netboot, serial console, remote flashing, ... --><br />
</small><br />
}}<br />
<br />
|style="vertical-align:top"|<br />
<br />
{{Box|<br />
BORDER = #8898bf|<br />
BACKGROUND = #d1adf6|<br />
WIDTH = 100%|<br />
ICON = <small>[[Use Cases|More...]]</small>|<br />
HEADING = <span style="font-variant:small-caps; font-size:120%">[[Use Cases]]</span>|<br />
CONTENT =<br />
<small><br />
* Desktop PCs, servers, [[Laptop|laptops]]<br />
* [[Clusters]]<br />
<!-- * Set-Top-Boxes, thin clients --><br />
* Embedded solutions<br />
<!-- * [http://en.wikipedia.org/wiki/Small_form_factor Small form factor computers], [http://en.wikipedia.org/wiki/Home_theater_PC Home-theater PCs] --><br />
<!-- * No-moving-parts solutions (ROM chip as "disk") --><br />
<!-- * Non-standard scenarios (e.g. FPGA in Opteron socket) --><br />
</small><br />
}}<br />
<br />
|style="vertical-align:top"|<br />
<br />
{{Box|<br />
BORDER = #8898bf|<br />
BACKGROUND = lime|<br />
WIDTH = 100%|<br />
ICON = <small>[[Payloads|More...]]</small>|<br />
HEADING = <span style="font-variant:small-caps; font-size:120%">[[Payloads]]</span>|<br />
CONTENT =<br />
<small><br />
* [[SeaBIOS]] / [[FILO]] / [[GRUB2]] / [[Payloads|...]] <!-- / [[OpenFirmware]] / [[OpenBIOS]] --><br />
* [[Linux]] / [[Windows]] / [[FreeBSD]] / [[NetBSD]] / [[Payloads|...]] <!-- / [http://openbsd.org/ OpenBSD]--><br />
* [[Etherboot]] / [[GPXE]] / [[iPXE]] / [[Payloads|...]]<br />
<!--* [[Memtest86]]<br />
* [[Bayou]] / [[Coreinfo]] / [[Tint]] / [[Libpayload]]--><br />
</small><br />
}}<br />
<br />
|}<br />
<br />
{| cellspacing=5 cellpadding=15 border=0 valign="top" width=100%<br />
| width=50% style="vertical-align:top"|<br />
<br />
{|<br />
|style="vertical-align:top"|<br />
[[Image:chip_cb.png]]<br />
|style="vertical-align:top"|<br />
'''<span style="font-variant:small-caps; font-size:150%">About</span>'''<br /><small>Find out more about coreboot.</small><small><hr />[[Press]] | [[Logo]] | [[History]] | [[Screenshots|Screenshots/Videos]] | [[Contributors]] | [[Sponsors]] | [[Products]] | [[Vendors]]</small><br />
|}<br />
<br />
|style="vertical-align:top"|<br />
<br />
{|<br />
|style="vertical-align:top"|<br />
[[Image:chip_devel.png]]<br />
|style="vertical-align:top"|<br />
'''<span style="font-variant:small-caps; font-size:150%">Developers</span>'''<br /><small>Get involved! Help us make coreboot better.</small><small><hr />[[Development Guidelines]] | [[Developer Manual]] | [http://qa.coreboot.org/docs/doxygen.php Doxygen] | [http://review.coreboot.org/gitweb?p=coreboot.git;a=tree Browse Source] | [[GSoC]] | [[Where to start]] | [[Distributed and Automated Testsystem|Testsystem]]</small><br />
|}<br />
<br />
|-<br />
| width=50% style="vertical-align:top"|<br />
<br />
{|<br />
|style="vertical-align:top"|<br />
[[Image:chip_status.png]]<br />
|style="vertical-align:top"|<br />
'''<span style="font-variant:small-caps; font-size:150%">Status</span>'''<br /><small>Find out whether your hardware is already supported.</small><small><hr />[[Supported Motherboards|Supported Boards]] | [[Supported Chipsets and Devices|Supported Chipsets]] | [[:Category:Tutorials|Board Status Pages]] | [[Blob Matrix|Blob Matrix]] | [http://qa.coreboot.org Build Status]</small><br />
|}<br />
<br />
|style="vertical-align:top"|<br />
<br />
{|<br />
|style="vertical-align:top"|<br />
[[Image:chip_tools.png]]<br />
|style="vertical-align:top"|<br />
'''<span style="font-variant:small-caps; font-size:150%">Related Tools</span>'''<br /><small>Tools and libraries related to coreboot.</small><small><hr />[http://www.flashrom.org flashrom] | [[Superiotool]] | [[Nvramtool]] | [[Buildrom]] | [[Mkelfimage]] | [[Inteltool]] | [[Msrtool]] | [[Ectool]] | [[Developer_Manual/Tools|Hardware tools]] | [[Abuild]] | [http://serialice.com SerialICE]</small><br />
|}<br />
<br />
|-<br />
| width=50% style="vertical-align:top"|<br />
<br />
{|<br />
|style="vertical-align:top"|<br />
[[Image:chip_101.png]]<br />
|style="vertical-align:top"|<br />
'''<span style="font-variant:small-caps; font-size:150%">Getting Started</span>'''<br /><small>Download coreboot and get started.</small><small><hr />[[Build HOWTO]] | [[Download coreboot|Downloads]] | [[Documentation]] | [[QEMU]] | [[AMD SimNow]] | [[Build from Windows]]</small><br />
|}<br />
<br />
|style="vertical-align:top"|<br />
<br />
{|<br />
|style="vertical-align:top"|<br />
[[Image:chip_support.png]]<br />
|style="vertical-align:top"|<br />
'''<span style="font-variant:small-caps; font-size:150%">Support</span>'''<br /><small>Learn how to contact us and find help and support.</small><small><hr />[[FAQ]] | [[Mailinglist]] | [[IRC]] | [[Glossary]] | [[coreboot Options|coreboot Options]]</small><br />
|}<br />
<br />
|}<br />
</td><td width="20%"><br />
<br />
[[File:Coreboot menuconfig.png|center|thumb|[[Build HOWTO|make menuconfig]] in coreboot]]<br />
<br />
<br clear=all /><br />
<br />
'''<span style="font-variant:small-caps; font-size:120%">[http://blogs.coreboot.org News (blog)]</span>'''<hr /><br />
<small><br />
<rss max=5>http://blogs.coreboot.org/feed/</rss><br />
</small><br />
<br />
<br />
'''<span style="font-variant:small-caps; font-size:120%">[[Current events|Upcoming Events]]</span>'''<hr /><br />
<!-- List of upcoming events (remove events after they have taken place). --><br />
<small><br />
<!--* '''2014/mon/day:''' coreboot event at [[Link]] in somecity --><br />
* '''2014/10/16-19:''' coreboot meeting/hackaton in Prague, [http://www.coreboot.org/pipermail/coreboot/2014-July/078296.html Invitation thread]<br />
</small><br />
<br />
<br />
<br clear=all /><br />
{{#widget:Ohloh Project|id=coreboot|type=partner_badge}}<br />
{{#widget:Ohloh Project|id=coreboot|type=cocomo}}<br />
<br />
<br />
</td></tr></table><br />
<br />
__NOTOC__<br />
__NOEDITSECTION__</div>Ruikhttps://www.coreboot.org/index.php?title=Current_events&diff=13768Current events2014-07-13T17:35:59Z<p>Ruik: Post a link to the meeting</p>
<hr />
<div></div>Ruikhttps://www.coreboot.org/index.php?title=Board:asus/f2a85-m&diff=13656Board:asus/f2a85-m2014-05-04T12:05:29Z<p>Ruik: /* UEFI builds that allow flash chip access */</p>
<hr />
<div>== Status ==<br />
<br />
=== Supported Board Variants ===<br />
<br />
Only the Asus F2A85-M and Asus F2A85-M CSM are supported. However there is a chance that "PRO" or other variants could be easily supported (contact via mailing list for details).<br />
<br />
=== Supported CPUs ===<br />
<br />
Note: Only the trinity CPU are supported (see list below) but with a hack also Richland CPUs might work (contact via mailing list for details).<br />
<br />
* AMD Athlon X2 340<br />
* AMD Athlon X4 740<br />
* AMD Athlon X4 750k<br />
* AMD FirePro A300<br />
* AMD FirePro A320<br />
* AMD A4-5300<br />
* AMD A4-5300B<br />
* AMD A6-5400K<br />
* AMD A6-5400B<br />
* AMD A8-5500<br />
* AMD A8-5500B<br />
* AMD A8-5600K<br />
* AMD A10-5700<br />
* AMD A10-5800B<br />
* AMD A10-5800K<br />
<br />
This list might be maintained more actively: http://en.wikipedia.org/wiki/List_of_AMD_Accelerated_Processing_Unit_microprocessors#Virgo_-_.22Trinity.22_.282012.2C_32_nm.29<br />
<br />
=== Notes ===<br />
<br />
* Retrieve the VGA optionrom from the vendor EFI binary by running 'dd if=/dev/mem of=vgabios.bin bs=1k count=64 skip=768' (source: http://www.coreboot.org/pipermail/coreboot/2012-December/073133.html )<br />
<br />
For internal VGA:<br />
Boot the legacy BIOS, and use [[VGA_support]] chapter <br />
<br />
* Add the extracted VGA optionrom in menuconfig. The device ID for the APU graphics varies, run 'lspci -nn | grep VGA' to find the right ID.<br />
* If you use PS/2 de-select legacy free<br />
* De-select running option ROMs, Seabios will run the ROMs that coreboot loads into memory so you should get a text display from Seabios<br />
* It is required that seabios is the coreboot payload for the F2A85-M or the internal VGA will not be initialized. But read [[SeaBIOS]] for how to add payloads to SeaBIOS and set SeaBIOS' boot order to run your payload.<br />
** its internal VGA comes up just fine (using Change ID I9e0df1669d73863c95c36a3a7fee40d58f6f097e), with unpatched SeaBIOS and these settings:<br />
** CONFIG_VGA_ROM_RUN=y<br />
** CONFIG_PCI_ROM_RUN=y<br />
** CONFIG_ON_DEVICE_ROM_RUN=y<br />
* Hotswapping the PDIP BIOS chip has some issues (most likely USB3 XHCI, disable it in original bios before hot-flashing to coreboot). Drop a mail to mailing list if you have issues.<br />
<br />
=== TODOs ===<br />
* test virtualization<br />
* test HDMI: video over hdmi works with the extracted vga optionrom, audio is untested.<br />
* blink in suspend mode<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = the board will start with an AMD A8-5500<br />
|CPU_L1_status = OK<br />
|CPU_L2_status = OK<br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = OK<br />
|CPU_multicore_status = OK<br />
|CPU_virt_status = Untested<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = N/A<br />
|RAM_DDR3_status = OK <br />
|RAM_DDR3_comments = Please select right voltage in menuconfig! Default is 1.5V but some DIMMs need more or less!<br />
|RAM_dualchannel_status = OK<br />
|RAM_ecc_status = N/A<br />
<br />
|IDE_status = N/A<br />
|IDE_25_status = N/A<br />
|IDE_CF_status = N/A<br />
|CDROM_DVD_status = Untested<br />
|SATA_status = OK<br />
|SATA_comments = Tested all ports of sixpack.<br />
|USB_status = OK<br />
|USB_comments = Issues with XHCI exist with Asus' BIOS as well<br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = Use dd to [[VGA_support|extract the legacy BIOS]], HDMI untested<br />
|Onboard_SCSI_status = N/A<br />
|Onboard_ethernet_status = OK<br />
|Onboard_audio_status = OK<br />
|Onboard_audio_comments = tested with headphones in line-out (lime colored)<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = N/A<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = OK<br />
|PCIE_x1_status = OK<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = OK<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = OK<br />
|PCIE_x32_status = N/A<br />
|Mini_PCI_cards_status = N/A<br />
|PCIX_cards_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = N/A<br />
|COM1_status = OK<br />
|COM2_status = N/A<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = Untested<br />
|PP_status = N/A<br />
|Game_port_status = N/A<br />
|IR_status = ?<br />
|Speaker_status = OK<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = Untested<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = OK<br />
|Powersave_status = ?<br />
|ACPI_status = OK<br />
|ACPI_comments = ACPI power button event works, suspend is WIP (work in progress).<br />
|Reboot_status = OK<br />
|Reboot_comments = warm reboot from Asus' BIOS to coreboot does not work, use reset button after the first time you flash coreboot<br />
|Poweroff_status = OK<br />
|Suspend_status = OK<br />
|LEDs_status = OK<br />
|HPET_status = OK<br />
|RNG_status = ?<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
<br />
}}<br />
<br />
== UEFI builds that allow flash chip access ==<br />
<br />
* v5016 is untested, but expected to work as well<br />
* v5018<br />
* v5103<br />
* v5104<br />
* v5107<br />
* v5202<br />
* v6002<br />
* v6004<br />
* v6102<br />
* v6402 <br />
* v6404 (requires downgrading to v6402 to flash coreboot)<br />
* v6501 (requires downgrading to v6402 to flash coreboot)<br />
* v6502 (requires downgrading to v6402 to flash coreboot)<br />
<br />
Build v6502, v6501 and v6404 do not allow access to the flash chip.<br />
<br />
Fortunately it is possible to downgrade build v6502, v6501 and v6404 to v6402, with EZFlash.<br />
<br />
Downgrading is done by downloading build v6402 from http://www.asus.com/support/Download/1/43/F2A85M/8/ and copying it to (the root directory of) a FAT32 formatted USB flash drive.<br />
<br />
Enter the EFI setup, switch to advanced mode if necessary, open the 'Tool' tab and select "ASUS EZ Flash 2 Utility".<br />
<br />
== Hardware info ==<br />
<br />
This board ships with a socketed Winbond 25Q64F, 64 Mbit (8 Mbyte) chip, in PDIP 300 mil package:<br />
<br />
{|<br />
|| [[Image:IMG_20130522_084444.jpg|thumb|Winbond 25Q64F]] <br />
|}<br />
<br />
The chip manual is available [http://www.nexflash.com/hq/enu/ProductAndSales/ProductLines/FlashMemory/SerialFlash/W25Q64FV.htm here]<br />
<br />
For out of band flashing, I use a<br />
<br />
3M test clip model 923739-08-ND<br />
<br />
It has .300" spacing, 8 pin DIP clip, gold finish and 'headless heads'. I hook this up to a bus pirate. This works but reading and writing take forever:<br />
<br />
<pre><br />
# time /usr/src/flashrom/flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -w 20130826-coreboot.rom<br />
flashrom v0.9.6.1-r1669 on Linux 3.8-2-amd64 (x86_64)<br />
flashrom is free software, get the source code at http://www.flashrom.org<br />
<br />
Calibrating delay loop... OK.<br />
Found Winbond flash chip "W25Q64" (8192 kB, SPI) on buspirate_spi.<br />
Reading old flash chip contents... done.<br />
Erasing and writing flash chip... Erase/write done.<br />
Verifying flash... VERIFIED.<br />
<br />
real 35m35.409s<br />
user 0m55.976s<br />
sys 0m12.920s<br />
</pre><br />
<br />
=== DDR voltage controller ===<br />
<br />
The DDR voltage controller is accessible through the AUX SMBUS device 0x15 and it is most likely driven by programmable current source NCT3933U (datasheet on nuvoton website).<br />
<br />
=== The ASUS digi VRM ===<br />
<br />
The ASUS digi voltage controller is accessible through the SMBUS device 0x20 and it is most likely driven by CHL8318 or similar chip (re-branded)<br />
<br />
== Memory ==<br />
<br />
If you use single dimm plug it to DIMM_A2 or DIMM_B2.<br />
<br />
I use:<br />
<br />
2x 2GB DDR3 modules in blue slots:<br />
<br />
<pre><br />
#modprobe i2c-piix4<br />
#modprobe eeprom<br />
#decode-dimms<br />
<br />
---=== Memory Characteristics ===--- <br />
Fine time base 2.500 ps <br />
Medium time base 0.125 ns <br />
Maximum module speed 1333MHz (PC3-10666) <br />
Size 2048 MB <br />
Banks x Rows x Columns x Bits 8 x 14 x 10 x 64 <br />
Ranks 2 <br />
SDRAM Device Width 8 bits <br />
tCL-tRCD-tRP-tRAS 8-8-8-24 <br />
Supported CAS Latencies (tCL) 9T, 8T, 7T, 6T <br />
</pre></div>Ruikhttps://www.coreboot.org/index.php?title=Board:asus/f2a85-m&diff=13655Board:asus/f2a85-m2014-05-04T12:04:57Z<p>Ruik: /* UEFI builds that allow flash chip access */</p>
<hr />
<div>== Status ==<br />
<br />
=== Supported Board Variants ===<br />
<br />
Only the Asus F2A85-M and Asus F2A85-M CSM are supported. However there is a chance that "PRO" or other variants could be easily supported (contact via mailing list for details).<br />
<br />
=== Supported CPUs ===<br />
<br />
Note: Only the trinity CPU are supported (see list below) but with a hack also Richland CPUs might work (contact via mailing list for details).<br />
<br />
* AMD Athlon X2 340<br />
* AMD Athlon X4 740<br />
* AMD Athlon X4 750k<br />
* AMD FirePro A300<br />
* AMD FirePro A320<br />
* AMD A4-5300<br />
* AMD A4-5300B<br />
* AMD A6-5400K<br />
* AMD A6-5400B<br />
* AMD A8-5500<br />
* AMD A8-5500B<br />
* AMD A8-5600K<br />
* AMD A10-5700<br />
* AMD A10-5800B<br />
* AMD A10-5800K<br />
<br />
This list might be maintained more actively: http://en.wikipedia.org/wiki/List_of_AMD_Accelerated_Processing_Unit_microprocessors#Virgo_-_.22Trinity.22_.282012.2C_32_nm.29<br />
<br />
=== Notes ===<br />
<br />
* Retrieve the VGA optionrom from the vendor EFI binary by running 'dd if=/dev/mem of=vgabios.bin bs=1k count=64 skip=768' (source: http://www.coreboot.org/pipermail/coreboot/2012-December/073133.html )<br />
<br />
For internal VGA:<br />
Boot the legacy BIOS, and use [[VGA_support]] chapter <br />
<br />
* Add the extracted VGA optionrom in menuconfig. The device ID for the APU graphics varies, run 'lspci -nn | grep VGA' to find the right ID.<br />
* If you use PS/2 de-select legacy free<br />
* De-select running option ROMs, Seabios will run the ROMs that coreboot loads into memory so you should get a text display from Seabios<br />
* It is required that seabios is the coreboot payload for the F2A85-M or the internal VGA will not be initialized. But read [[SeaBIOS]] for how to add payloads to SeaBIOS and set SeaBIOS' boot order to run your payload.<br />
** its internal VGA comes up just fine (using Change ID I9e0df1669d73863c95c36a3a7fee40d58f6f097e), with unpatched SeaBIOS and these settings:<br />
** CONFIG_VGA_ROM_RUN=y<br />
** CONFIG_PCI_ROM_RUN=y<br />
** CONFIG_ON_DEVICE_ROM_RUN=y<br />
* Hotswapping the PDIP BIOS chip has some issues (most likely USB3 XHCI, disable it in original bios before hot-flashing to coreboot). Drop a mail to mailing list if you have issues.<br />
<br />
=== TODOs ===<br />
* test virtualization<br />
* test HDMI: video over hdmi works with the extracted vga optionrom, audio is untested.<br />
* blink in suspend mode<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = the board will start with an AMD A8-5500<br />
|CPU_L1_status = OK<br />
|CPU_L2_status = OK<br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = OK<br />
|CPU_multicore_status = OK<br />
|CPU_virt_status = Untested<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = N/A<br />
|RAM_DDR3_status = OK <br />
|RAM_DDR3_comments = Please select right voltage in menuconfig! Default is 1.5V but some DIMMs need more or less!<br />
|RAM_dualchannel_status = OK<br />
|RAM_ecc_status = N/A<br />
<br />
|IDE_status = N/A<br />
|IDE_25_status = N/A<br />
|IDE_CF_status = N/A<br />
|CDROM_DVD_status = Untested<br />
|SATA_status = OK<br />
|SATA_comments = Tested all ports of sixpack.<br />
|USB_status = OK<br />
|USB_comments = Issues with XHCI exist with Asus' BIOS as well<br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = Use dd to [[VGA_support|extract the legacy BIOS]], HDMI untested<br />
|Onboard_SCSI_status = N/A<br />
|Onboard_ethernet_status = OK<br />
|Onboard_audio_status = OK<br />
|Onboard_audio_comments = tested with headphones in line-out (lime colored)<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = N/A<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = OK<br />
|PCIE_x1_status = OK<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = OK<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = OK<br />
|PCIE_x32_status = N/A<br />
|Mini_PCI_cards_status = N/A<br />
|PCIX_cards_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = N/A<br />
|COM1_status = OK<br />
|COM2_status = N/A<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = Untested<br />
|PP_status = N/A<br />
|Game_port_status = N/A<br />
|IR_status = ?<br />
|Speaker_status = OK<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = Untested<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = OK<br />
|Powersave_status = ?<br />
|ACPI_status = OK<br />
|ACPI_comments = ACPI power button event works, suspend is WIP (work in progress).<br />
|Reboot_status = OK<br />
|Reboot_comments = warm reboot from Asus' BIOS to coreboot does not work, use reset button after the first time you flash coreboot<br />
|Poweroff_status = OK<br />
|Suspend_status = OK<br />
|LEDs_status = OK<br />
|HPET_status = OK<br />
|RNG_status = ?<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
<br />
}}<br />
<br />
== UEFI builds that allow flash chip access ==<br />
<br />
* v5016 is untested, but expected to work as well<br />
* v5018<br />
* v5103<br />
* v5104<br />
* v5107<br />
* v5202<br />
* v6002<br />
* v6004<br />
* v6102<br />
* v6402 <br />
* v6404 (requires downgrading to v6402 to flash coreboot)<br />
* v6501 (requires downgrading to v6402 to flash coreboot)<br />
* v6502 (requires downgrading to v6402 to flash coreboot)<br />
<br />
Build v6502, v6501 and v6404 do not allow access to the flash chip.<br />
<br />
Fortunately it is possible to downgrade build v6501 and v6404 to v6402, with EZFlash.<br />
<br />
Downgrading is done by downloading build v6402 from http://www.asus.com/support/Download/1/43/F2A85M/8/ and copying it to (the root directory of) a FAT32 formatted USB flash drive.<br />
<br />
Enter the EFI setup, switch to advanced mode if necessary, open the 'Tool' tab and select "ASUS EZ Flash 2 Utility".<br />
<br />
== Hardware info ==<br />
<br />
This board ships with a socketed Winbond 25Q64F, 64 Mbit (8 Mbyte) chip, in PDIP 300 mil package:<br />
<br />
{|<br />
|| [[Image:IMG_20130522_084444.jpg|thumb|Winbond 25Q64F]] <br />
|}<br />
<br />
The chip manual is available [http://www.nexflash.com/hq/enu/ProductAndSales/ProductLines/FlashMemory/SerialFlash/W25Q64FV.htm here]<br />
<br />
For out of band flashing, I use a<br />
<br />
3M test clip model 923739-08-ND<br />
<br />
It has .300" spacing, 8 pin DIP clip, gold finish and 'headless heads'. I hook this up to a bus pirate. This works but reading and writing take forever:<br />
<br />
<pre><br />
# time /usr/src/flashrom/flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -w 20130826-coreboot.rom<br />
flashrom v0.9.6.1-r1669 on Linux 3.8-2-amd64 (x86_64)<br />
flashrom is free software, get the source code at http://www.flashrom.org<br />
<br />
Calibrating delay loop... OK.<br />
Found Winbond flash chip "W25Q64" (8192 kB, SPI) on buspirate_spi.<br />
Reading old flash chip contents... done.<br />
Erasing and writing flash chip... Erase/write done.<br />
Verifying flash... VERIFIED.<br />
<br />
real 35m35.409s<br />
user 0m55.976s<br />
sys 0m12.920s<br />
</pre><br />
<br />
=== DDR voltage controller ===<br />
<br />
The DDR voltage controller is accessible through the AUX SMBUS device 0x15 and it is most likely driven by programmable current source NCT3933U (datasheet on nuvoton website).<br />
<br />
=== The ASUS digi VRM ===<br />
<br />
The ASUS digi voltage controller is accessible through the SMBUS device 0x20 and it is most likely driven by CHL8318 or similar chip (re-branded)<br />
<br />
== Memory ==<br />
<br />
If you use single dimm plug it to DIMM_A2 or DIMM_B2.<br />
<br />
I use:<br />
<br />
2x 2GB DDR3 modules in blue slots:<br />
<br />
<pre><br />
#modprobe i2c-piix4<br />
#modprobe eeprom<br />
#decode-dimms<br />
<br />
---=== Memory Characteristics ===--- <br />
Fine time base 2.500 ps <br />
Medium time base 0.125 ns <br />
Maximum module speed 1333MHz (PC3-10666) <br />
Size 2048 MB <br />
Banks x Rows x Columns x Bits 8 x 14 x 10 x 64 <br />
Ranks 2 <br />
SDRAM Device Width 8 bits <br />
tCL-tRCD-tRP-tRAS 8-8-8-24 <br />
Supported CAS Latencies (tCL) 9T, 8T, 7T, 6T <br />
</pre></div>Ruikhttps://www.coreboot.org/index.php?title=Board:asus/f2a85-m&diff=13654Board:asus/f2a85-m2014-05-04T12:04:07Z<p>Ruik: /* UEFI builds that allow flash chip access */</p>
<hr />
<div>== Status ==<br />
<br />
=== Supported Board Variants ===<br />
<br />
Only the Asus F2A85-M and Asus F2A85-M CSM are supported. However there is a chance that "PRO" or other variants could be easily supported (contact via mailing list for details).<br />
<br />
=== Supported CPUs ===<br />
<br />
Note: Only the trinity CPU are supported (see list below) but with a hack also Richland CPUs might work (contact via mailing list for details).<br />
<br />
* AMD Athlon X2 340<br />
* AMD Athlon X4 740<br />
* AMD Athlon X4 750k<br />
* AMD FirePro A300<br />
* AMD FirePro A320<br />
* AMD A4-5300<br />
* AMD A4-5300B<br />
* AMD A6-5400K<br />
* AMD A6-5400B<br />
* AMD A8-5500<br />
* AMD A8-5500B<br />
* AMD A8-5600K<br />
* AMD A10-5700<br />
* AMD A10-5800B<br />
* AMD A10-5800K<br />
<br />
This list might be maintained more actively: http://en.wikipedia.org/wiki/List_of_AMD_Accelerated_Processing_Unit_microprocessors#Virgo_-_.22Trinity.22_.282012.2C_32_nm.29<br />
<br />
=== Notes ===<br />
<br />
* Retrieve the VGA optionrom from the vendor EFI binary by running 'dd if=/dev/mem of=vgabios.bin bs=1k count=64 skip=768' (source: http://www.coreboot.org/pipermail/coreboot/2012-December/073133.html )<br />
<br />
For internal VGA:<br />
Boot the legacy BIOS, and use [[VGA_support]] chapter <br />
<br />
* Add the extracted VGA optionrom in menuconfig. The device ID for the APU graphics varies, run 'lspci -nn | grep VGA' to find the right ID.<br />
* If you use PS/2 de-select legacy free<br />
* De-select running option ROMs, Seabios will run the ROMs that coreboot loads into memory so you should get a text display from Seabios<br />
* It is required that seabios is the coreboot payload for the F2A85-M or the internal VGA will not be initialized. But read [[SeaBIOS]] for how to add payloads to SeaBIOS and set SeaBIOS' boot order to run your payload.<br />
** its internal VGA comes up just fine (using Change ID I9e0df1669d73863c95c36a3a7fee40d58f6f097e), with unpatched SeaBIOS and these settings:<br />
** CONFIG_VGA_ROM_RUN=y<br />
** CONFIG_PCI_ROM_RUN=y<br />
** CONFIG_ON_DEVICE_ROM_RUN=y<br />
* Hotswapping the PDIP BIOS chip has some issues (most likely USB3 XHCI, disable it in original bios before hot-flashing to coreboot). Drop a mail to mailing list if you have issues.<br />
<br />
=== TODOs ===<br />
* test virtualization<br />
* test HDMI: video over hdmi works with the extracted vga optionrom, audio is untested.<br />
* blink in suspend mode<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = the board will start with an AMD A8-5500<br />
|CPU_L1_status = OK<br />
|CPU_L2_status = OK<br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = OK<br />
|CPU_multicore_status = OK<br />
|CPU_virt_status = Untested<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = N/A<br />
|RAM_DDR3_status = OK <br />
|RAM_DDR3_comments = Please select right voltage in menuconfig! Default is 1.5V but some DIMMs need more or less!<br />
|RAM_dualchannel_status = OK<br />
|RAM_ecc_status = N/A<br />
<br />
|IDE_status = N/A<br />
|IDE_25_status = N/A<br />
|IDE_CF_status = N/A<br />
|CDROM_DVD_status = Untested<br />
|SATA_status = OK<br />
|SATA_comments = Tested all ports of sixpack.<br />
|USB_status = OK<br />
|USB_comments = Issues with XHCI exist with Asus' BIOS as well<br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = Use dd to [[VGA_support|extract the legacy BIOS]], HDMI untested<br />
|Onboard_SCSI_status = N/A<br />
|Onboard_ethernet_status = OK<br />
|Onboard_audio_status = OK<br />
|Onboard_audio_comments = tested with headphones in line-out (lime colored)<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = N/A<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = OK<br />
|PCIE_x1_status = OK<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = OK<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = OK<br />
|PCIE_x32_status = N/A<br />
|Mini_PCI_cards_status = N/A<br />
|PCIX_cards_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = N/A<br />
|COM1_status = OK<br />
|COM2_status = N/A<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = Untested<br />
|PP_status = N/A<br />
|Game_port_status = N/A<br />
|IR_status = ?<br />
|Speaker_status = OK<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = Untested<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = OK<br />
|Powersave_status = ?<br />
|ACPI_status = OK<br />
|ACPI_comments = ACPI power button event works, suspend is WIP (work in progress).<br />
|Reboot_status = OK<br />
|Reboot_comments = warm reboot from Asus' BIOS to coreboot does not work, use reset button after the first time you flash coreboot<br />
|Poweroff_status = OK<br />
|Suspend_status = OK<br />
|LEDs_status = OK<br />
|HPET_status = OK<br />
|RNG_status = ?<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
<br />
}}<br />
<br />
== UEFI builds that allow flash chip access ==<br />
<br />
* v5016 is untested, but expected to work as well<br />
* v5018<br />
* v5103<br />
* v5104<br />
* v5107<br />
* v5202<br />
* v6002<br />
* v6004<br />
* v6102<br />
* v6402 <br />
* v6404 (requires downgrading to v6402 to flash coreboot)<br />
* v6501 (requires downgrading to v6402 to flash coreboot)<br />
* v6502 (requires downgrading to v6402 to flash coreboot)<br />
<br />
Build v6404 and v6501 do not allow access to the flash chip.<br />
<br />
Fortunately it is possible to downgrade build v6501 and v6404 to v6402, with EZFlash.<br />
<br />
Downgrading is done by downloading build v6402 from http://www.asus.com/support/Download/1/43/F2A85M/8/ and copying it to (the root directory of) a FAT32 formatted USB flash drive.<br />
<br />
Enter the EFI setup, switch to advanced mode if necessary, open the 'Tool' tab and select "ASUS EZ Flash 2 Utility".<br />
<br />
== Hardware info ==<br />
<br />
This board ships with a socketed Winbond 25Q64F, 64 Mbit (8 Mbyte) chip, in PDIP 300 mil package:<br />
<br />
{|<br />
|| [[Image:IMG_20130522_084444.jpg|thumb|Winbond 25Q64F]] <br />
|}<br />
<br />
The chip manual is available [http://www.nexflash.com/hq/enu/ProductAndSales/ProductLines/FlashMemory/SerialFlash/W25Q64FV.htm here]<br />
<br />
For out of band flashing, I use a<br />
<br />
3M test clip model 923739-08-ND<br />
<br />
It has .300" spacing, 8 pin DIP clip, gold finish and 'headless heads'. I hook this up to a bus pirate. This works but reading and writing take forever:<br />
<br />
<pre><br />
# time /usr/src/flashrom/flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -w 20130826-coreboot.rom<br />
flashrom v0.9.6.1-r1669 on Linux 3.8-2-amd64 (x86_64)<br />
flashrom is free software, get the source code at http://www.flashrom.org<br />
<br />
Calibrating delay loop... OK.<br />
Found Winbond flash chip "W25Q64" (8192 kB, SPI) on buspirate_spi.<br />
Reading old flash chip contents... done.<br />
Erasing and writing flash chip... Erase/write done.<br />
Verifying flash... VERIFIED.<br />
<br />
real 35m35.409s<br />
user 0m55.976s<br />
sys 0m12.920s<br />
</pre><br />
<br />
=== DDR voltage controller ===<br />
<br />
The DDR voltage controller is accessible through the AUX SMBUS device 0x15 and it is most likely driven by programmable current source NCT3933U (datasheet on nuvoton website).<br />
<br />
=== The ASUS digi VRM ===<br />
<br />
The ASUS digi voltage controller is accessible through the SMBUS device 0x20 and it is most likely driven by CHL8318 or similar chip (re-branded)<br />
<br />
== Memory ==<br />
<br />
If you use single dimm plug it to DIMM_A2 or DIMM_B2.<br />
<br />
I use:<br />
<br />
2x 2GB DDR3 modules in blue slots:<br />
<br />
<pre><br />
#modprobe i2c-piix4<br />
#modprobe eeprom<br />
#decode-dimms<br />
<br />
---=== Memory Characteristics ===--- <br />
Fine time base 2.500 ps <br />
Medium time base 0.125 ns <br />
Maximum module speed 1333MHz (PC3-10666) <br />
Size 2048 MB <br />
Banks x Rows x Columns x Bits 8 x 14 x 10 x 64 <br />
Ranks 2 <br />
SDRAM Device Width 8 bits <br />
tCL-tRCD-tRP-tRAS 8-8-8-24 <br />
Supported CAS Latencies (tCL) 9T, 8T, 7T, 6T <br />
</pre></div>Ruikhttps://www.coreboot.org/index.php?title=Board:asus/f2a85-m&diff=13465Board:asus/f2a85-m2014-03-11T09:44:58Z<p>Ruik: /* Notes */</p>
<hr />
<div>== Status ==<br />
<br />
=== Supported Board Variants ===<br />
<br />
Only the Asus F2A85-M and Asus F2A85-M CSM are supported. However there is a chance that "PRO" or other variants could be easily supported (contact via mailing list for details).<br />
<br />
=== Supported CPUs ===<br />
<br />
Note: Only the trinity CPU are supported (see list below) but with a hack also Richland CPUs might work (contact via mailing list for details).<br />
<br />
* AMD Athlon X2 340<br />
* AMD Athlon X2 740<br />
* AMD Athlon X2 750k<br />
* AMD FirePro A300<br />
* AMD FirePro A320<br />
* AMD A4-5300<br />
* AMD A4-5300B<br />
* AMD A6-5400K<br />
* AMD A6-5400B<br />
* AMD A8-5500<br />
* AMD A8-5500B<br />
* AMD A8-5600K<br />
* AMD A10-5700<br />
* AMD A10-5800B<br />
* AMD A10-5800K<br />
<br />
This list might be maintained more actively: http://en.wikipedia.org/wiki/List_of_AMD_Accelerated_Processing_Unit_microprocessors#Virgo_-_.22Trinity.22_.282012.2C_32_nm.29<br />
<br />
=== Notes ===<br />
<br />
* Retrieve the VGA optionrom from the vendor EFI binary by running 'dd if=/dev/mem of=vgabios.bin bs=1k count=64 skip=768' (source: http://www.coreboot.org/pipermail/coreboot/2012-December/073133.html )<br />
<br />
For internal VGA:<br />
Boot the legacy BIOS, and use [[VGA_support]] chapter <br />
<br />
* Add the extracted VGA optionrom in menuconfig. The device ID for the APU graphics varies, run 'lspci -nn | grep VGA' to find the right ID.<br />
* If you use PS/2 de-select legacy free<br />
* De-select running option ROMs, Seabios will run the ROMs that coreboot loads into memory so you should get a text display from Seabios<br />
* It is required that seabios is the coreboot payload for the F2A85-M or the internal VGA will not be initialized. But read [[SeaBIOS]] for how to add payloads to SeaBIOS and set SeaBIOS' boot order to run your payload.<br />
** its internal VGA comes up just fine (using Change ID I9e0df1669d73863c95c36a3a7fee40d58f6f097e), with unpatched SeaBIOS and these settings:<br />
** CONFIG_VGA_ROM_RUN=y<br />
** CONFIG_PCI_ROM_RUN=y<br />
** CONFIG_ON_DEVICE_ROM_RUN=y<br />
* Hotswapping the PDIP BIOS chip has some issues (most likely USB3 XHCI, disable it in original bios before hot-flashing to coreboot). Drop a mail to mailing list if you have issues.<br />
<br />
=== TODOs ===<br />
* test virtualization<br />
* test HDMI: video over hdmi works with the extracted vga optionrom, audio is untested.<br />
* blink in suspend mode<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = the board will start with an AMD A8-5500<br />
|CPU_L1_status = OK<br />
|CPU_L2_status = OK<br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = OK<br />
|CPU_multicore_status = OK<br />
|CPU_virt_status = Untested<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = N/A<br />
|RAM_DDR3_status = OK <br />
|RAM_DDR3_comments = Please select right voltage in menuconfig! Default is 1.5V but some DIMMs need more or less!<br />
|RAM_dualchannel_status = OK<br />
|RAM_ecc_status = N/A<br />
<br />
|IDE_status = N/A<br />
|IDE_25_status = N/A<br />
|IDE_CF_status = N/A<br />
|CDROM_DVD_status = Untested<br />
|SATA_status = OK<br />
|SATA_comments = Tested all ports of sixpack.<br />
|USB_status = OK<br />
|USB_comments = Issues with XHCI exist with Asus' BIOS as well<br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = Use dd to [[VGA_support|extract the legacy BIOS]], HDMI untested<br />
|Onboard_SCSI_status = N/A<br />
|Onboard_ethernet_status = OK<br />
|Onboard_audio_status = OK<br />
|Onboard_audio_comments = tested with headphones in line-out (lime colored)<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = N/A<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = OK<br />
|PCIE_x1_status = OK<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = OK<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = OK<br />
|PCIE_x32_status = N/A<br />
|Mini_PCI_cards_status = N/A<br />
|PCIX_cards_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = N/A<br />
|COM1_status = OK<br />
|COM2_status = N/A<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = Untested<br />
|PP_status = N/A<br />
|Game_port_status = N/A<br />
|IR_status = ?<br />
|Speaker_status = OK<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = Untested<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = OK<br />
|Powersave_status = ?<br />
|ACPI_status = OK<br />
|ACPI_comments = ACPI power button event works, suspend is WIP (work in progress).<br />
|Reboot_status = OK<br />
|Reboot_comments = warm reboot from Asus' BIOS to coreboot does not work, use reset button after the first time you flash coreboot<br />
|Poweroff_status = OK<br />
|Suspend_status = OK<br />
|LEDs_status = OK<br />
|HPET_status = OK<br />
|RNG_status = ?<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
<br />
}}<br />
<br />
== UEFI builds that allow flash chip access ==<br />
<br />
* v5016 is untested, but expected to work as well<br />
* v5018<br />
* v5103<br />
* v5104<br />
* v5107<br />
* v5202<br />
* v6002<br />
* v6004<br />
* v6102<br />
* v6402 <br />
* v6404 (requires downgrading to v6402 to flash coreboot)<br />
* v6501 (requires downgrading to v6402 to flash coreboot)<br />
<br />
Build v6404 and v6501 do not allow access to the flash chip.<br />
<br />
Fortunately it is possible to downgrade build v6501 and v6404 to v6402, with EZFlash.<br />
<br />
Downgrading is done by downloading build v6402 from http://www.asus.com/support/Download/1/43/F2A85M/8/ and copying it to (the root directory of) a FAT32 formatted USB flash drive.<br />
<br />
Enter the EFI setup, switch to advanced mode if necessary, open the 'Tool' tab and select "ASUS EZ Flash 2 Utility".<br />
<br />
== Hardware info ==<br />
<br />
This board ships with a socketed Winbond 25Q64F, 64 Mbit (8 Mbyte) chip, in PDIP 300 mil package:<br />
<br />
{|<br />
|| [[Image:IMG_20130522_084444.jpg|thumb|Winbond 25Q64F]] <br />
|}<br />
<br />
The chip manual is available [http://www.nexflash.com/hq/enu/ProductAndSales/ProductLines/FlashMemory/SerialFlash/W25Q64FV.htm here]<br />
<br />
For out of band flashing, I use a<br />
<br />
3M test clip model 923739-08-ND<br />
<br />
It has .300" spacing, 8 pin DIP clip, gold finish and 'headless heads'. I hook this up to a bus pirate. This works but reading and writing take forever:<br />
<br />
<pre><br />
# time /usr/src/flashrom/flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -w 20130826-coreboot.rom<br />
flashrom v0.9.6.1-r1669 on Linux 3.8-2-amd64 (x86_64)<br />
flashrom is free software, get the source code at http://www.flashrom.org<br />
<br />
Calibrating delay loop... OK.<br />
Found Winbond flash chip "W25Q64" (8192 kB, SPI) on buspirate_spi.<br />
Reading old flash chip contents... done.<br />
Erasing and writing flash chip... Erase/write done.<br />
Verifying flash... VERIFIED.<br />
<br />
real 35m35.409s<br />
user 0m55.976s<br />
sys 0m12.920s<br />
</pre><br />
<br />
=== DDR voltage controller ===<br />
<br />
The DDR voltage controller is accessible through the AUX SMBUS device 0x15 and it is most likely driven by programmable current source NCT3933U (datasheet on nuvoton website).<br />
<br />
=== The ASUS digi VRM ===<br />
<br />
The ASUS digi voltage controller is accessible through the SMBUS device 0x20 and it is most likely driven by CHL8318 or similar chip (re-branded)<br />
<br />
== Memory ==<br />
<br />
If you use single dimm plug it to DIMM_A2 or DIMM_B2.<br />
<br />
I use:<br />
<br />
2x 2GB DDR3 modules in blue slots:<br />
<br />
<pre><br />
#modprobe i2c-piix4<br />
#modprobe eeprom<br />
#decode-dimms<br />
<br />
---=== Memory Characteristics ===--- <br />
Fine time base 2.500 ps <br />
Medium time base 0.125 ns <br />
Maximum module speed 1333MHz (PC3-10666) <br />
Size 2048 MB <br />
Banks x Rows x Columns x Bits 8 x 14 x 10 x 64 <br />
Ranks 2 <br />
SDRAM Device Width 8 bits <br />
tCL-tRCD-tRP-tRAS 8-8-8-24 <br />
Supported CAS Latencies (tCL) 9T, 8T, 7T, 6T <br />
</pre></div>Ruikhttps://www.coreboot.org/index.php?title=Board:asus/f2a85-m&diff=13464Board:asus/f2a85-m2014-03-11T09:44:43Z<p>Ruik: /* Supported CPUs */</p>
<hr />
<div>== Status ==<br />
<br />
=== Supported Board Variants ===<br />
<br />
Only the Asus F2A85-M and Asus F2A85-M CSM are supported. However there is a chance that "PRO" or other variants could be easily supported (contact via mailing list for details).<br />
<br />
=== Supported CPUs ===<br />
<br />
Note: Only the trinity CPU are supported (see list below) but with a hack also Richland CPUs might work (contact via mailing list for details).<br />
<br />
* AMD Athlon X2 340<br />
* AMD Athlon X2 740<br />
* AMD Athlon X2 750k<br />
* AMD FirePro A300<br />
* AMD FirePro A320<br />
* AMD A4-5300<br />
* AMD A4-5300B<br />
* AMD A6-5400K<br />
* AMD A6-5400B<br />
* AMD A8-5500<br />
* AMD A8-5500B<br />
* AMD A8-5600K<br />
* AMD A10-5700<br />
* AMD A10-5800B<br />
* AMD A10-5800K<br />
<br />
This list might be maintained more actively: http://en.wikipedia.org/wiki/List_of_AMD_Accelerated_Processing_Unit_microprocessors#Virgo_-_.22Trinity.22_.282012.2C_32_nm.29<br />
<br />
=== Notes ===<br />
<br />
* The ASUS F2A85-M CSM is identical to the F2A85-M.<br />
* Retrieve the VGA optionrom from the vendor EFI binary by running 'dd if=/dev/mem of=vgabios.bin bs=1k count=64 skip=768' (source: http://www.coreboot.org/pipermail/coreboot/2012-December/073133.html )<br />
<br />
For internal VGA:<br />
Boot the legacy BIOS, and use [[VGA_support]] chapter <br />
<br />
* Add the extracted VGA optionrom in menuconfig. The device ID for the APU graphics varies, run 'lspci -nn | grep VGA' to find the right ID.<br />
* If you use PS/2 de-select legacy free<br />
* De-select running option ROMs, Seabios will run the ROMs that coreboot loads into memory so you should get a text display from Seabios<br />
* It is required that seabios is the coreboot payload for the F2A85-M or the internal VGA will not be initialized. But read [[SeaBIOS]] for how to add payloads to SeaBIOS and set SeaBIOS' boot order to run your payload.<br />
** its internal VGA comes up just fine (using Change ID I9e0df1669d73863c95c36a3a7fee40d58f6f097e), with unpatched SeaBIOS and these settings:<br />
** CONFIG_VGA_ROM_RUN=y<br />
** CONFIG_PCI_ROM_RUN=y<br />
** CONFIG_ON_DEVICE_ROM_RUN=y<br />
* Hotswapping the PDIP BIOS chip has some issues (most likely USB3 XHCI, disable it in original bios before hot-flashing to coreboot). Drop a mail to mailing list if you have issues.<br />
<br />
=== TODOs ===<br />
* test virtualization<br />
* test HDMI: video over hdmi works with the extracted vga optionrom, audio is untested.<br />
* blink in suspend mode<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = the board will start with an AMD A8-5500<br />
|CPU_L1_status = OK<br />
|CPU_L2_status = OK<br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = OK<br />
|CPU_multicore_status = OK<br />
|CPU_virt_status = Untested<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = N/A<br />
|RAM_DDR3_status = OK <br />
|RAM_DDR3_comments = Please select right voltage in menuconfig! Default is 1.5V but some DIMMs need more or less!<br />
|RAM_dualchannel_status = OK<br />
|RAM_ecc_status = N/A<br />
<br />
|IDE_status = N/A<br />
|IDE_25_status = N/A<br />
|IDE_CF_status = N/A<br />
|CDROM_DVD_status = Untested<br />
|SATA_status = OK<br />
|SATA_comments = Tested all ports of sixpack.<br />
|USB_status = OK<br />
|USB_comments = Issues with XHCI exist with Asus' BIOS as well<br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = Use dd to [[VGA_support|extract the legacy BIOS]], HDMI untested<br />
|Onboard_SCSI_status = N/A<br />
|Onboard_ethernet_status = OK<br />
|Onboard_audio_status = OK<br />
|Onboard_audio_comments = tested with headphones in line-out (lime colored)<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = N/A<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = OK<br />
|PCIE_x1_status = OK<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = OK<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = OK<br />
|PCIE_x32_status = N/A<br />
|Mini_PCI_cards_status = N/A<br />
|PCIX_cards_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = N/A<br />
|COM1_status = OK<br />
|COM2_status = N/A<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = Untested<br />
|PP_status = N/A<br />
|Game_port_status = N/A<br />
|IR_status = ?<br />
|Speaker_status = OK<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = Untested<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = OK<br />
|Powersave_status = ?<br />
|ACPI_status = OK<br />
|ACPI_comments = ACPI power button event works, suspend is WIP (work in progress).<br />
|Reboot_status = OK<br />
|Reboot_comments = warm reboot from Asus' BIOS to coreboot does not work, use reset button after the first time you flash coreboot<br />
|Poweroff_status = OK<br />
|Suspend_status = OK<br />
|LEDs_status = OK<br />
|HPET_status = OK<br />
|RNG_status = ?<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
<br />
}}<br />
<br />
== UEFI builds that allow flash chip access ==<br />
<br />
* v5016 is untested, but expected to work as well<br />
* v5018<br />
* v5103<br />
* v5104<br />
* v5107<br />
* v5202<br />
* v6002<br />
* v6004<br />
* v6102<br />
* v6402 <br />
* v6404 (requires downgrading to v6402 to flash coreboot)<br />
* v6501 (requires downgrading to v6402 to flash coreboot)<br />
<br />
Build v6404 and v6501 do not allow access to the flash chip.<br />
<br />
Fortunately it is possible to downgrade build v6501 and v6404 to v6402, with EZFlash.<br />
<br />
Downgrading is done by downloading build v6402 from http://www.asus.com/support/Download/1/43/F2A85M/8/ and copying it to (the root directory of) a FAT32 formatted USB flash drive.<br />
<br />
Enter the EFI setup, switch to advanced mode if necessary, open the 'Tool' tab and select "ASUS EZ Flash 2 Utility".<br />
<br />
== Hardware info ==<br />
<br />
This board ships with a socketed Winbond 25Q64F, 64 Mbit (8 Mbyte) chip, in PDIP 300 mil package:<br />
<br />
{|<br />
|| [[Image:IMG_20130522_084444.jpg|thumb|Winbond 25Q64F]] <br />
|}<br />
<br />
The chip manual is available [http://www.nexflash.com/hq/enu/ProductAndSales/ProductLines/FlashMemory/SerialFlash/W25Q64FV.htm here]<br />
<br />
For out of band flashing, I use a<br />
<br />
3M test clip model 923739-08-ND<br />
<br />
It has .300" spacing, 8 pin DIP clip, gold finish and 'headless heads'. I hook this up to a bus pirate. This works but reading and writing take forever:<br />
<br />
<pre><br />
# time /usr/src/flashrom/flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -w 20130826-coreboot.rom<br />
flashrom v0.9.6.1-r1669 on Linux 3.8-2-amd64 (x86_64)<br />
flashrom is free software, get the source code at http://www.flashrom.org<br />
<br />
Calibrating delay loop... OK.<br />
Found Winbond flash chip "W25Q64" (8192 kB, SPI) on buspirate_spi.<br />
Reading old flash chip contents... done.<br />
Erasing and writing flash chip... Erase/write done.<br />
Verifying flash... VERIFIED.<br />
<br />
real 35m35.409s<br />
user 0m55.976s<br />
sys 0m12.920s<br />
</pre><br />
<br />
=== DDR voltage controller ===<br />
<br />
The DDR voltage controller is accessible through the AUX SMBUS device 0x15 and it is most likely driven by programmable current source NCT3933U (datasheet on nuvoton website).<br />
<br />
=== The ASUS digi VRM ===<br />
<br />
The ASUS digi voltage controller is accessible through the SMBUS device 0x20 and it is most likely driven by CHL8318 or similar chip (re-branded)<br />
<br />
== Memory ==<br />
<br />
If you use single dimm plug it to DIMM_A2 or DIMM_B2.<br />
<br />
I use:<br />
<br />
2x 2GB DDR3 modules in blue slots:<br />
<br />
<pre><br />
#modprobe i2c-piix4<br />
#modprobe eeprom<br />
#decode-dimms<br />
<br />
---=== Memory Characteristics ===--- <br />
Fine time base 2.500 ps <br />
Medium time base 0.125 ns <br />
Maximum module speed 1333MHz (PC3-10666) <br />
Size 2048 MB <br />
Banks x Rows x Columns x Bits 8 x 14 x 10 x 64 <br />
Ranks 2 <br />
SDRAM Device Width 8 bits <br />
tCL-tRCD-tRP-tRAS 8-8-8-24 <br />
Supported CAS Latencies (tCL) 9T, 8T, 7T, 6T <br />
</pre></div>Ruikhttps://www.coreboot.org/index.php?title=Board:asus/f2a85-m&diff=13462Board:asus/f2a85-m2014-03-10T17:29:39Z<p>Ruik: /* Memory */</p>
<hr />
<div>== Status ==<br />
<br />
=== Supported CPUs ===<br />
<br />
Note: Only the trinity CPU are supported (see list below) but with a hack also Richland CPUs might work (contact via mailing list for details).<br />
<br />
* AMD Athlon X2 340<br />
* AMD Athlon X2 740<br />
* AMD Athlon X2 750k<br />
* AMD FirePro A300<br />
* AMD FirePro A320<br />
* AMD A4-5300<br />
* AMD A4-5300B<br />
* AMD A6-5400K<br />
* AMD A6-5400B<br />
* AMD A8-5500<br />
* AMD A8-5500B<br />
* AMD A8-5600K<br />
* AMD A10-5700<br />
* AMD A10-5800B<br />
* AMD A10-5800K<br />
<br />
This list might be maintained more actively: http://en.wikipedia.org/wiki/List_of_AMD_Accelerated_Processing_Unit_microprocessors#Virgo_-_.22Trinity.22_.282012.2C_32_nm.29<br />
<br />
=== Notes ===<br />
<br />
* The ASUS F2A85-M CSM is identical to the F2A85-M.<br />
* Retrieve the VGA optionrom from the vendor EFI binary by running 'dd if=/dev/mem of=vgabios.bin bs=1k count=64 skip=768' (source: http://www.coreboot.org/pipermail/coreboot/2012-December/073133.html )<br />
<br />
For internal VGA:<br />
Boot the legacy BIOS, and use [[VGA_support]] chapter <br />
<br />
* Add the extracted VGA optionrom in menuconfig. The device ID for the APU graphics varies, run 'lspci -nn | grep VGA' to find the right ID.<br />
* If you use PS/2 de-select legacy free<br />
* De-select running option ROMs, Seabios will run the ROMs that coreboot loads into memory so you should get a text display from Seabios<br />
* It is required that seabios is the coreboot payload for the F2A85-M or the internal VGA will not be initialized. But read [[SeaBIOS]] for how to add payloads to SeaBIOS and set SeaBIOS' boot order to run your payload.<br />
** its internal VGA comes up just fine (using Change ID I9e0df1669d73863c95c36a3a7fee40d58f6f097e), with unpatched SeaBIOS and these settings:<br />
** CONFIG_VGA_ROM_RUN=y<br />
** CONFIG_PCI_ROM_RUN=y<br />
** CONFIG_ON_DEVICE_ROM_RUN=y<br />
* Hotswapping the PDIP BIOS chip has some issues (most likely USB3 XHCI, disable it in original bios before hot-flashing to coreboot). Drop a mail to mailing list if you have issues.<br />
<br />
=== TODOs ===<br />
* test virtualization<br />
* test HDMI: video over hdmi works with the extracted vga optionrom, audio is untested.<br />
* blink in suspend mode<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = the board will start with an AMD A8-5500<br />
|CPU_L1_status = OK<br />
|CPU_L2_status = OK<br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = OK<br />
|CPU_multicore_status = OK<br />
|CPU_virt_status = Untested<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = N/A<br />
|RAM_DDR3_status = OK <br />
|RAM_DDR3_comments = Please select right voltage in menuconfig! Default is 1.5V but some DIMMs need more or less!<br />
|RAM_dualchannel_status = OK<br />
|RAM_ecc_status = N/A<br />
<br />
|IDE_status = N/A<br />
|IDE_25_status = N/A<br />
|IDE_CF_status = N/A<br />
|CDROM_DVD_status = Untested<br />
|SATA_status = OK<br />
|SATA_comments = Tested all ports of sixpack.<br />
|USB_status = OK<br />
|USB_comments = Issues with XHCI exist with Asus' BIOS as well<br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = Use dd to [[VGA_support|extract the legacy BIOS]], HDMI untested<br />
|Onboard_SCSI_status = N/A<br />
|Onboard_ethernet_status = OK<br />
|Onboard_audio_status = OK<br />
|Onboard_audio_comments = tested with headphones in line-out (lime colored)<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = N/A<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = OK<br />
|PCIE_x1_status = OK<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = OK<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = OK<br />
|PCIE_x32_status = N/A<br />
|Mini_PCI_cards_status = N/A<br />
|PCIX_cards_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = N/A<br />
|COM1_status = OK<br />
|COM2_status = N/A<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = Untested<br />
|PP_status = N/A<br />
|Game_port_status = N/A<br />
|IR_status = ?<br />
|Speaker_status = OK<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = Untested<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = OK<br />
|Powersave_status = ?<br />
|ACPI_status = OK<br />
|ACPI_comments = ACPI power button event works, suspend is WIP (work in progress).<br />
|Reboot_status = OK<br />
|Reboot_comments = warm reboot from Asus' BIOS to coreboot does not work, use reset button after the first time you flash coreboot<br />
|Poweroff_status = OK<br />
|Suspend_status = OK<br />
|LEDs_status = OK<br />
|HPET_status = OK<br />
|RNG_status = ?<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
<br />
}}<br />
<br />
== UEFI builds that allow flash chip access ==<br />
<br />
* v5016 is untested, but expected to work as well<br />
* v5018<br />
* v5103<br />
* v5104<br />
* v5107<br />
* v5202<br />
* v6002<br />
* v6004<br />
* v6102<br />
* v6402 <br />
* v6404 (requires downgrading to v6402 to flash coreboot)<br />
* v6501 (requires downgrading to v6402 to flash coreboot)<br />
<br />
Build v6404 and v6501 do not allow access to the flash chip.<br />
<br />
Fortunately it is possible to downgrade build v6501 and v6404 to v6402, with EZFlash.<br />
<br />
Downgrading is done by downloading build v6402 from http://www.asus.com/support/Download/1/43/F2A85M/8/ and copying it to (the root directory of) a FAT32 formatted USB flash drive.<br />
<br />
Enter the EFI setup, switch to advanced mode if necessary, open the 'Tool' tab and select "ASUS EZ Flash 2 Utility".<br />
<br />
== Hardware info ==<br />
<br />
This board ships with a socketed Winbond 25Q64F, 64 Mbit (8 Mbyte) chip, in PDIP 300 mil package:<br />
<br />
{|<br />
|| [[Image:IMG_20130522_084444.jpg|thumb|Winbond 25Q64F]] <br />
|}<br />
<br />
The chip manual is available [http://www.nexflash.com/hq/enu/ProductAndSales/ProductLines/FlashMemory/SerialFlash/W25Q64FV.htm here]<br />
<br />
For out of band flashing, I use a<br />
<br />
3M test clip model 923739-08-ND<br />
<br />
It has .300" spacing, 8 pin DIP clip, gold finish and 'headless heads'. I hook this up to a bus pirate. This works but reading and writing take forever:<br />
<br />
<pre><br />
# time /usr/src/flashrom/flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -w 20130826-coreboot.rom<br />
flashrom v0.9.6.1-r1669 on Linux 3.8-2-amd64 (x86_64)<br />
flashrom is free software, get the source code at http://www.flashrom.org<br />
<br />
Calibrating delay loop... OK.<br />
Found Winbond flash chip "W25Q64" (8192 kB, SPI) on buspirate_spi.<br />
Reading old flash chip contents... done.<br />
Erasing and writing flash chip... Erase/write done.<br />
Verifying flash... VERIFIED.<br />
<br />
real 35m35.409s<br />
user 0m55.976s<br />
sys 0m12.920s<br />
</pre><br />
<br />
=== DDR voltage controller ===<br />
<br />
The DDR voltage controller is accessible through the AUX SMBUS device 0x15 and it is most likely driven by programmable current source NCT3933U (datasheet on nuvoton website).<br />
<br />
=== The ASUS digi VRM ===<br />
<br />
The ASUS digi voltage controller is accessible through the SMBUS device 0x20 and it is most likely driven by CHL8318 or similar chip (re-branded)<br />
<br />
== Memory ==<br />
<br />
If you use single dimm plug it to DIMM_A2 or DIMM_B2.<br />
<br />
I use:<br />
<br />
2x 2GB DDR3 modules in blue slots:<br />
<br />
<pre><br />
#modprobe i2c-piix4<br />
#modprobe eeprom<br />
#decode-dimms<br />
<br />
---=== Memory Characteristics ===--- <br />
Fine time base 2.500 ps <br />
Medium time base 0.125 ns <br />
Maximum module speed 1333MHz (PC3-10666) <br />
Size 2048 MB <br />
Banks x Rows x Columns x Bits 8 x 14 x 10 x 64 <br />
Ranks 2 <br />
SDRAM Device Width 8 bits <br />
tCL-tRCD-tRP-tRAS 8-8-8-24 <br />
Supported CAS Latencies (tCL) 9T, 8T, 7T, 6T <br />
</pre></div>Ruikhttps://www.coreboot.org/index.php?title=Board:asus/f2a85-m&diff=13461Board:asus/f2a85-m2014-03-10T17:23:14Z<p>Ruik: /* TODOs */</p>
<hr />
<div>== Status ==<br />
<br />
=== Supported CPUs ===<br />
<br />
Note: Only the trinity CPU are supported (see list below) but with a hack also Richland CPUs might work (contact via mailing list for details).<br />
<br />
* AMD Athlon X2 340<br />
* AMD Athlon X2 740<br />
* AMD Athlon X2 750k<br />
* AMD FirePro A300<br />
* AMD FirePro A320<br />
* AMD A4-5300<br />
* AMD A4-5300B<br />
* AMD A6-5400K<br />
* AMD A6-5400B<br />
* AMD A8-5500<br />
* AMD A8-5500B<br />
* AMD A8-5600K<br />
* AMD A10-5700<br />
* AMD A10-5800B<br />
* AMD A10-5800K<br />
<br />
This list might be maintained more actively: http://en.wikipedia.org/wiki/List_of_AMD_Accelerated_Processing_Unit_microprocessors#Virgo_-_.22Trinity.22_.282012.2C_32_nm.29<br />
<br />
=== Notes ===<br />
<br />
* The ASUS F2A85-M CSM is identical to the F2A85-M.<br />
* Retrieve the VGA optionrom from the vendor EFI binary by running 'dd if=/dev/mem of=vgabios.bin bs=1k count=64 skip=768' (source: http://www.coreboot.org/pipermail/coreboot/2012-December/073133.html )<br />
<br />
For internal VGA:<br />
Boot the legacy BIOS, and use [[VGA_support]] chapter <br />
<br />
* Add the extracted VGA optionrom in menuconfig. The device ID for the APU graphics varies, run 'lspci -nn | grep VGA' to find the right ID.<br />
* If you use PS/2 de-select legacy free<br />
* De-select running option ROMs, Seabios will run the ROMs that coreboot loads into memory so you should get a text display from Seabios<br />
* It is required that seabios is the coreboot payload for the F2A85-M or the internal VGA will not be initialized. But read [[SeaBIOS]] for how to add payloads to SeaBIOS and set SeaBIOS' boot order to run your payload.<br />
** its internal VGA comes up just fine (using Change ID I9e0df1669d73863c95c36a3a7fee40d58f6f097e), with unpatched SeaBIOS and these settings:<br />
** CONFIG_VGA_ROM_RUN=y<br />
** CONFIG_PCI_ROM_RUN=y<br />
** CONFIG_ON_DEVICE_ROM_RUN=y<br />
* Hotswapping the PDIP BIOS chip has some issues (most likely USB3 XHCI, disable it in original bios before hot-flashing to coreboot). Drop a mail to mailing list if you have issues.<br />
<br />
=== TODOs ===<br />
* test virtualization<br />
* test HDMI: video over hdmi works with the extracted vga optionrom, audio is untested.<br />
* blink in suspend mode<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = the board will start with an AMD A8-5500<br />
|CPU_L1_status = OK<br />
|CPU_L2_status = OK<br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = OK<br />
|CPU_multicore_status = OK<br />
|CPU_virt_status = Untested<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = N/A<br />
|RAM_DDR3_status = OK <br />
|RAM_DDR3_comments = Please select right voltage in menuconfig! Default is 1.5V but some DIMMs need more or less!<br />
|RAM_dualchannel_status = OK<br />
|RAM_ecc_status = N/A<br />
<br />
|IDE_status = N/A<br />
|IDE_25_status = N/A<br />
|IDE_CF_status = N/A<br />
|CDROM_DVD_status = Untested<br />
|SATA_status = OK<br />
|SATA_comments = Tested all ports of sixpack.<br />
|USB_status = OK<br />
|USB_comments = Issues with XHCI exist with Asus' BIOS as well<br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = Use dd to [[VGA_support|extract the legacy BIOS]], HDMI untested<br />
|Onboard_SCSI_status = N/A<br />
|Onboard_ethernet_status = OK<br />
|Onboard_audio_status = OK<br />
|Onboard_audio_comments = tested with headphones in line-out (lime colored)<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = N/A<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = OK<br />
|PCIE_x1_status = OK<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = OK<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = OK<br />
|PCIE_x32_status = N/A<br />
|Mini_PCI_cards_status = N/A<br />
|PCIX_cards_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = N/A<br />
|COM1_status = OK<br />
|COM2_status = N/A<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = Untested<br />
|PP_status = N/A<br />
|Game_port_status = N/A<br />
|IR_status = ?<br />
|Speaker_status = OK<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = Untested<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = OK<br />
|Powersave_status = ?<br />
|ACPI_status = OK<br />
|ACPI_comments = ACPI power button event works, suspend is WIP (work in progress).<br />
|Reboot_status = OK<br />
|Reboot_comments = warm reboot from Asus' BIOS to coreboot does not work, use reset button after the first time you flash coreboot<br />
|Poweroff_status = OK<br />
|Suspend_status = OK<br />
|LEDs_status = OK<br />
|HPET_status = OK<br />
|RNG_status = ?<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
<br />
}}<br />
<br />
== UEFI builds that allow flash chip access ==<br />
<br />
* v5016 is untested, but expected to work as well<br />
* v5018<br />
* v5103<br />
* v5104<br />
* v5107<br />
* v5202<br />
* v6002<br />
* v6004<br />
* v6102<br />
* v6402 <br />
* v6404 (requires downgrading to v6402 to flash coreboot)<br />
* v6501 (requires downgrading to v6402 to flash coreboot)<br />
<br />
Build v6404 and v6501 do not allow access to the flash chip.<br />
<br />
Fortunately it is possible to downgrade build v6501 and v6404 to v6402, with EZFlash.<br />
<br />
Downgrading is done by downloading build v6402 from http://www.asus.com/support/Download/1/43/F2A85M/8/ and copying it to (the root directory of) a FAT32 formatted USB flash drive.<br />
<br />
Enter the EFI setup, switch to advanced mode if necessary, open the 'Tool' tab and select "ASUS EZ Flash 2 Utility".<br />
<br />
== Hardware info ==<br />
<br />
This board ships with a socketed Winbond 25Q64F, 64 Mbit (8 Mbyte) chip, in PDIP 300 mil package:<br />
<br />
{|<br />
|| [[Image:IMG_20130522_084444.jpg|thumb|Winbond 25Q64F]] <br />
|}<br />
<br />
The chip manual is available [http://www.nexflash.com/hq/enu/ProductAndSales/ProductLines/FlashMemory/SerialFlash/W25Q64FV.htm here]<br />
<br />
For out of band flashing, I use a<br />
<br />
3M test clip model 923739-08-ND<br />
<br />
It has .300" spacing, 8 pin DIP clip, gold finish and 'headless heads'. I hook this up to a bus pirate. This works but reading and writing take forever:<br />
<br />
<pre><br />
# time /usr/src/flashrom/flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -w 20130826-coreboot.rom<br />
flashrom v0.9.6.1-r1669 on Linux 3.8-2-amd64 (x86_64)<br />
flashrom is free software, get the source code at http://www.flashrom.org<br />
<br />
Calibrating delay loop... OK.<br />
Found Winbond flash chip "W25Q64" (8192 kB, SPI) on buspirate_spi.<br />
Reading old flash chip contents... done.<br />
Erasing and writing flash chip... Erase/write done.<br />
Verifying flash... VERIFIED.<br />
<br />
real 35m35.409s<br />
user 0m55.976s<br />
sys 0m12.920s<br />
</pre><br />
<br />
=== DDR voltage controller ===<br />
<br />
The DDR voltage controller is accessible through the AUX SMBUS device 0x15 and it is most likely driven by programmable current source NCT3933U (datasheet on nuvoton website).<br />
<br />
=== The ASUS digi VRM ===<br />
<br />
The ASUS digi voltage controller is accessible through the SMBUS device 0x20 and it is most likely driven by CHL8318 or similar chip (re-branded)<br />
<br />
== Memory ==<br />
<br />
I use:<br />
<br />
2x 2GB DDR3 modules in blue slots:<br />
<br />
<pre><br />
#modprobe i2c-piix4<br />
#modprobe eeprom<br />
#decode-dimms<br />
<br />
---=== Memory Characteristics ===--- <br />
Fine time base 2.500 ps <br />
Medium time base 0.125 ns <br />
Maximum module speed 1333MHz (PC3-10666) <br />
Size 2048 MB <br />
Banks x Rows x Columns x Bits 8 x 14 x 10 x 64 <br />
Ranks 2 <br />
SDRAM Device Width 8 bits <br />
tCL-tRCD-tRP-tRAS 8-8-8-24 <br />
Supported CAS Latencies (tCL) 9T, 8T, 7T, 6T <br />
</pre></div>Ruikhttps://www.coreboot.org/index.php?title=Board:asus/f2a85-m&diff=13460Board:asus/f2a85-m2014-03-10T17:20:26Z<p>Ruik: /* Supported CPUs */</p>
<hr />
<div>== Status ==<br />
<br />
=== Supported CPUs ===<br />
<br />
Note: Only the trinity CPU are supported (see list below) but with a hack also Richland CPUs might work (contact via mailing list for details).<br />
<br />
* AMD Athlon X2 340<br />
* AMD Athlon X2 740<br />
* AMD Athlon X2 750k<br />
* AMD FirePro A300<br />
* AMD FirePro A320<br />
* AMD A4-5300<br />
* AMD A4-5300B<br />
* AMD A6-5400K<br />
* AMD A6-5400B<br />
* AMD A8-5500<br />
* AMD A8-5500B<br />
* AMD A8-5600K<br />
* AMD A10-5700<br />
* AMD A10-5800B<br />
* AMD A10-5800K<br />
<br />
This list might be maintained more actively: http://en.wikipedia.org/wiki/List_of_AMD_Accelerated_Processing_Unit_microprocessors#Virgo_-_.22Trinity.22_.282012.2C_32_nm.29<br />
<br />
=== Notes ===<br />
<br />
* The ASUS F2A85-M CSM is identical to the F2A85-M.<br />
* Retrieve the VGA optionrom from the vendor EFI binary by running 'dd if=/dev/mem of=vgabios.bin bs=1k count=64 skip=768' (source: http://www.coreboot.org/pipermail/coreboot/2012-December/073133.html )<br />
<br />
For internal VGA:<br />
Boot the legacy BIOS, and use [[VGA_support]] chapter <br />
<br />
* Add the extracted VGA optionrom in menuconfig. The device ID for the APU graphics varies, run 'lspci -nn | grep VGA' to find the right ID.<br />
* If you use PS/2 de-select legacy free<br />
* De-select running option ROMs, Seabios will run the ROMs that coreboot loads into memory so you should get a text display from Seabios<br />
* It is required that seabios is the coreboot payload for the F2A85-M or the internal VGA will not be initialized. But read [[SeaBIOS]] for how to add payloads to SeaBIOS and set SeaBIOS' boot order to run your payload.<br />
** its internal VGA comes up just fine (using Change ID I9e0df1669d73863c95c36a3a7fee40d58f6f097e), with unpatched SeaBIOS and these settings:<br />
** CONFIG_VGA_ROM_RUN=y<br />
** CONFIG_PCI_ROM_RUN=y<br />
** CONFIG_ON_DEVICE_ROM_RUN=y<br />
* Hotswapping the PDIP BIOS chip has some issues (most likely USB3 XHCI, disable it in original bios before hot-flashing to coreboot). Drop a mail to mailing list if you have issues.<br />
<br />
=== TODOs ===<br />
* test virtualization<br />
* test HDMI: video over hdmi works with the extracted vga optionrom, audio is untested.<br />
* update VERB tables<br />
* test suspend: this is work in progress<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = the board will start with an AMD A8-5500<br />
|CPU_L1_status = OK<br />
|CPU_L2_status = OK<br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = OK<br />
|CPU_multicore_status = OK<br />
|CPU_virt_status = Untested<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = N/A<br />
|RAM_DDR3_status = OK <br />
|RAM_DDR3_comments = Please select right voltage in menuconfig! Default is 1.5V but some DIMMs need more or less!<br />
|RAM_dualchannel_status = OK<br />
|RAM_ecc_status = N/A<br />
<br />
|IDE_status = N/A<br />
|IDE_25_status = N/A<br />
|IDE_CF_status = N/A<br />
|CDROM_DVD_status = Untested<br />
|SATA_status = OK<br />
|SATA_comments = Tested all ports of sixpack.<br />
|USB_status = OK<br />
|USB_comments = Issues with XHCI exist with Asus' BIOS as well<br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = Use dd to [[VGA_support|extract the legacy BIOS]], HDMI untested<br />
|Onboard_SCSI_status = N/A<br />
|Onboard_ethernet_status = OK<br />
|Onboard_audio_status = OK<br />
|Onboard_audio_comments = tested with headphones in line-out (lime colored)<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = N/A<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = OK<br />
|PCIE_x1_status = OK<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = OK<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = OK<br />
|PCIE_x32_status = N/A<br />
|Mini_PCI_cards_status = N/A<br />
|PCIX_cards_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = N/A<br />
|COM1_status = OK<br />
|COM2_status = N/A<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = Untested<br />
|PP_status = N/A<br />
|Game_port_status = N/A<br />
|IR_status = ?<br />
|Speaker_status = OK<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = Untested<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = OK<br />
|Powersave_status = ?<br />
|ACPI_status = OK<br />
|ACPI_comments = ACPI power button event works, suspend is WIP (work in progress).<br />
|Reboot_status = OK<br />
|Reboot_comments = warm reboot from Asus' BIOS to coreboot does not work, use reset button after the first time you flash coreboot<br />
|Poweroff_status = OK<br />
|Suspend_status = WIP<br />
|LEDs_status = OK<br />
|HPET_status = OK<br />
|RNG_status = ?<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
<br />
}}<br />
<br />
== UEFI builds that allow flash chip access ==<br />
<br />
* v5016 is untested, but expected to work as well<br />
* v5018<br />
* v5103<br />
* v5104<br />
* v5107<br />
* v5202<br />
* v6002<br />
* v6004<br />
* v6102<br />
* v6402 <br />
* v6404 (requires downgrading to v6402 to flash coreboot)<br />
* v6501 (requires downgrading to v6402 to flash coreboot)<br />
<br />
Build v6404 and v6501 do not allow access to the flash chip.<br />
<br />
Fortunately it is possible to downgrade build v6501 and v6404 to v6402, with EZFlash.<br />
<br />
Downgrading is done by downloading build v6402 from http://www.asus.com/support/Download/1/43/F2A85M/8/ and copying it to (the root directory of) a FAT32 formatted USB flash drive.<br />
<br />
Enter the EFI setup, switch to advanced mode if necessary, open the 'Tool' tab and select "ASUS EZ Flash 2 Utility".<br />
<br />
== Hardware info ==<br />
<br />
This board ships with a socketed Winbond 25Q64F, 64 Mbit (8 Mbyte) chip, in PDIP 300 mil package:<br />
<br />
{|<br />
|| [[Image:IMG_20130522_084444.jpg|thumb|Winbond 25Q64F]] <br />
|}<br />
<br />
The chip manual is available [http://www.nexflash.com/hq/enu/ProductAndSales/ProductLines/FlashMemory/SerialFlash/W25Q64FV.htm here]<br />
<br />
For out of band flashing, I use a<br />
<br />
3M test clip model 923739-08-ND<br />
<br />
It has .300" spacing, 8 pin DIP clip, gold finish and 'headless heads'. I hook this up to a bus pirate. This works but reading and writing take forever:<br />
<br />
<pre><br />
# time /usr/src/flashrom/flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -w 20130826-coreboot.rom<br />
flashrom v0.9.6.1-r1669 on Linux 3.8-2-amd64 (x86_64)<br />
flashrom is free software, get the source code at http://www.flashrom.org<br />
<br />
Calibrating delay loop... OK.<br />
Found Winbond flash chip "W25Q64" (8192 kB, SPI) on buspirate_spi.<br />
Reading old flash chip contents... done.<br />
Erasing and writing flash chip... Erase/write done.<br />
Verifying flash... VERIFIED.<br />
<br />
real 35m35.409s<br />
user 0m55.976s<br />
sys 0m12.920s<br />
</pre><br />
<br />
=== DDR voltage controller ===<br />
<br />
The DDR voltage controller is accessible through the AUX SMBUS device 0x15 and it is most likely driven by programmable current source NCT3933U (datasheet on nuvoton website).<br />
<br />
=== The ASUS digi VRM ===<br />
<br />
The ASUS digi voltage controller is accessible through the SMBUS device 0x20 and it is most likely driven by CHL8318 or similar chip (re-branded)<br />
<br />
== Memory ==<br />
<br />
I use:<br />
<br />
2x 2GB DDR3 modules in blue slots:<br />
<br />
<pre><br />
#modprobe i2c-piix4<br />
#modprobe eeprom<br />
#decode-dimms<br />
<br />
---=== Memory Characteristics ===--- <br />
Fine time base 2.500 ps <br />
Medium time base 0.125 ns <br />
Maximum module speed 1333MHz (PC3-10666) <br />
Size 2048 MB <br />
Banks x Rows x Columns x Bits 8 x 14 x 10 x 64 <br />
Ranks 2 <br />
SDRAM Device Width 8 bits <br />
tCL-tRCD-tRP-tRAS 8-8-8-24 <br />
Supported CAS Latencies (tCL) 9T, 8T, 7T, 6T <br />
</pre></div>Ruikhttps://www.coreboot.org/index.php?title=Board:asus/f2a85-m&diff=13230Board:asus/f2a85-m2014-01-27T22:41:10Z<p>Ruik: /* UEFI builds */</p>
<hr />
<div>== UEFI builds of Asus BIOS ==<br />
<br />
* v5016 (untested, but expected to work as well)<br />
* v5018<br />
* v5103<br />
* v5104<br />
* v5107<br />
* v5202<br />
* v6002<br />
* v6004<br />
* v6102<br />
* v6402 <br />
* v6404 (requires downgrade to flash coreboot to v6402)<br />
* v6501 (requires downgrade to flash coreboot to v6402)<br />
<br />
Build v6404 and v6501 do not allow access to the flash chip.<br />
<br />
Fortunately it is possible to downgrade build v6501 and v6404 to v6402, with EZFlash.<br />
<br />
Downgrading is done by downloading build v6402 from http://www.asus.com/support/Download/1/43/F2A85M/8/ and copying it to (the root directory of) a FAT32 formatted USB flash drive.<br />
<br />
Enter the EFI setup, switch to advanced mode if necessary, open the 'Tool' tab and select "ASUS EZ Flash 2 Utility".<br />
<br />
== Status ==<br />
<br />
=== Notes ===<br />
<br />
* The ASUS F2A85-M CSM is identical to the F2A85-M.<br />
* Retrieve the VGA optionrom from the vendor EFI binary by running 'dd if=/dev/mem of=vgabios.bin bs=1k count=64 skip=768' (source: http://www.coreboot.org/pipermail/coreboot/2012-December/073133.html )<br />
<br />
For internal VGA:<br />
Boot the legacy BIOS, and use [[VGA_support]] chapter <br />
<br />
* Add the extracted VGA optionrom in menuconfig. The device ID for the APU graphics varies, run 'lspci -nn | grep VGA' to find the right ID.<br />
* If you use PS/2 de-select legacy free<br />
* De-select running option ROMs, Seabios will run the ROMs that coreboot loads into memory so you should get a text display from Seabios<br />
* It is required that seabios is the coreboot payload for the F2A85-M or the internal VGA will not be initialized. But read [[SeaBIOS]] for how to add payloads to SeaBIOS and set SeaBIOS' boot order to run your payload.<br />
** its internal VGA comes up just fine (using Change ID I9e0df1669d73863c95c36a3a7fee40d58f6f097e), with unpatched SeaBIOS and these settings:<br />
** CONFIG_VGA_ROM_RUN=y<br />
** CONFIG_PCI_ROM_RUN=y<br />
** CONFIG_ON_DEVICE_ROM_RUN=y<br />
* Hotswapping the PDIP BIOS chip has some issues (most likely USB3 XHCI, disable it in original bios before hot-flashing to coreboot). Drop a mail to mailing list if you have issues.<br />
<br />
=== TODOs ===<br />
* test virtualization<br />
* test HDMI: video over hdmi works with the extracted vga optionrom, audio is untested.<br />
* update VERB tables<br />
* test suspend: this is work in progress<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_L1_status = OK<br />
|CPU_L2_status = OK<br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = OK<br />
|CPU_multicore_status = OK<br />
|CPU_virt_status = Untested<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = N/A<br />
|RAM_DDR3_status = OK <br />
|RAM_DDR3_comments = Please select right voltage in menuconfig! Default is 1.5V but some DIMMs need more or less!<br />
|RAM_dualchannel_status = OK<br />
|RAM_ecc_status = N/A<br />
<br />
|IDE_status = N/A<br />
|IDE_25_status = N/A<br />
|IDE_CF_status = N/A<br />
|CDROM_DVD_status = Untested<br />
|SATA_status = OK<br />
|SATA_comments = Tested all ports of sixpack.<br />
|USB_status = OK<br />
|USB_comments = Issues with XHCI exist with Asus' BIOS as well<br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = Use dd to [[VGA_support|extract the legacy BIOS]], HDMI untested<br />
|Onboard_SCSI_status = N/A<br />
|Onboard_ethernet_status = OK<br />
|Onboard_audio_status = OK<br />
|Onboard_audio_comments = tested with headphones in line-out (lime colored)<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = N/A<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = OK<br />
|PCIE_x1_status = OK<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = OK<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = OK<br />
|PCIE_x32_status = N/A<br />
|Mini_PCI_cards_status = N/A<br />
|PCIX_cards_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = N/A<br />
|COM1_status = OK<br />
|COM2_status = N/A<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = Untested<br />
|PP_status = N/A<br />
|Game_port_status = N/A<br />
|IR_status = ?<br />
|Speaker_status = OK<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = Untested<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = OK<br />
|Powersave_status = ?<br />
|ACPI_status = OK<br />
|ACPI_comments = ACPI power button event works, suspend is WIP (work in progress).<br />
|Reboot_status = OK<br />
|Reboot_comments = warm reboot from Asus' BIOS to coreboot does not work, use reset button after the first time you flash coreboot<br />
|Poweroff_status = OK<br />
|Suspend_status = WIP<br />
|LEDs_status = OK<br />
|HPET_status = OK<br />
|RNG_status = ?<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
<br />
}}<br />
<br />
== Hardware info ==<br />
<br />
This board ships with a socketed Winbond 25Q64F, 64 Mbit (8 Mbyte) chip, in PDIP 300 mil package:<br />
<br />
{|<br />
|| [[Image:IMG_20130522_084444.jpg|thumb|Winbond 25Q64F]] <br />
|}<br />
<br />
The chip manual is available [http://www.nexflash.com/hq/enu/ProductAndSales/ProductLines/FlashMemory/SerialFlash/W25Q64FV.htm here]<br />
<br />
For out of band flashing, I use a<br />
<br />
3M test clip model 923739-08-ND<br />
<br />
It has .300" spacing, 8 pin DIP clip, gold finish and 'headless heads'. I hook this up to a bus pirate. This works but reading and writing take forever:<br />
<br />
<pre><br />
# time /usr/src/flashrom/flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -w 20130826-coreboot.rom<br />
flashrom v0.9.6.1-r1669 on Linux 3.8-2-amd64 (x86_64)<br />
flashrom is free software, get the source code at http://www.flashrom.org<br />
<br />
Calibrating delay loop... OK.<br />
Found Winbond flash chip "W25Q64" (8192 kB, SPI) on buspirate_spi.<br />
Reading old flash chip contents... done.<br />
Erasing and writing flash chip... Erase/write done.<br />
Verifying flash... VERIFIED.<br />
<br />
real 35m35.409s<br />
user 0m55.976s<br />
sys 0m12.920s<br />
</pre><br />
<br />
=== DDR voltage controller ===<br />
<br />
The DDR voltage controller is accessible through the AUX SMBUS device 0x15 and it is most likely driven by programmable current source NCT3933U (datasheet on nuvoton website).<br />
<br />
=== The ASUS digi VRM ===<br />
<br />
The ASUS digi voltage controller is accessible through the SMBUS device 0x20 and it is most likely driven by CHL8318 or similar chip (re-branded)<br />
<br />
== Memory ==<br />
<br />
I use:<br />
<br />
2x 2GB DDR3 modules in blue slots:<br />
<br />
<pre><br />
#modprobe i2c-piix4<br />
#modprobe eeprom<br />
#decode-dimms<br />
<br />
---=== Memory Characteristics ===--- <br />
Fine time base 2.500 ps <br />
Medium time base 0.125 ns <br />
Maximum module speed 1333MHz (PC3-10666) <br />
Size 2048 MB <br />
Banks x Rows x Columns x Bits 8 x 14 x 10 x 64 <br />
Ranks 2 <br />
SDRAM Device Width 8 bits <br />
tCL-tRCD-tRP-tRAS 8-8-8-24 <br />
Supported CAS Latencies (tCL) 9T, 8T, 7T, 6T <br />
</pre></div>Ruikhttps://www.coreboot.org/index.php?title=Binary_situation&diff=12610Binary situation2013-12-23T21:01:19Z<p>Ruik: /* recent AMD */</p>
<hr />
<div>While we aim for a 100% free boot process, recent developments (and general unwillingness by some hardware companies to provide specifications) make it hard to achieve.<br />
<br />
= Intel =<br />
On Intel based chipsets (since Intel 5 Series) the following binary components persist:<br />
* <span style="background:red">'''Panic level: 9000+'''</span> Management Engine firmware: The management engine is a separate CPU that does various management tasks and needs its own firmware. This firmware exists in a 1.5MB and a 5MB version, where the latter provides the "Intel AMT" functions (ie. remote access, "anti-theft", ...). Probably signed with an Intel key. It's unlikely that this is ever replaced by something open source. Firmware that runs on an ARC core inside the chipset. It runs entirely out-of-band with the main CPU. It has DMA access to the entire system memory and can access the networking adapters in a way transparent to the OS (separate MAC and IP).<br />
* <span style="background:yellow">'''Panic level: medium'''</span> VGABIOS: Runs on the CPU. Unless you can live with staying in the dark until Linux takes over, you'll need this. Luckily there's work in progress to replace it with open source code. Until then you can at least contain it by emulation (see YABEL).<br />
* <span style="background:lime">'''Panic level: small'''</span> CPU microcode: Intel provides this as redistributable binary, the format is partially reverse engineered, it's covered by a 2048b RSA signature. Unlikely that it can be replaced. Depending on the CPU (incl. its stepping) it might be possible to get by without it. Check http://inertiawar.com/microcode/ for details.<br />
* <span style="background:orange">'''Panic level: medium-high'''</span> Gigabit Ethernet Firmware: If your board uses the on-chipset GbE, it requires a small binary (8KB) with unknown content.<br />
* <span style="background:orange">'''Panic level: 8999'''</span> Memory Reference Code: (Sandybridge and newer). This is code that runs on the CPU and initializes RAM. Can be reverse engineered with enough persistence, but not done so far. The "Memory Reference Code", initializes memory and USB power states (other functions are yet unknown). It is provided by Google, and is wrapper for Intel PEI modules.<br />
<br />
= recent AMD =<br />
* IMC: An embedded controller of sorts in the southbridge. 8051-based, can probably be reimplemented (partially done, but unpublished) Check the [[AMD_IMC]] page. The controller is either enabled by hardware strap option. Or if you provide a firmware, the controller is enabled via soft strapping the chipset. It is 8051 controller.<br />
<br />
* XHCI: Controller for USB 3.0 controllers. Analysis has shown that the firmware used in AMD system is most likely Renesas USB 3.0 IP Core. It seems it is V850 compatible controller If not present, USB3 (and related USB ports) won't work. Partial documentation is at [[AMD_XHCI]].<br />
<br />
* NIC Firmware: If your board uses the on-chip broadcom NIC, you need this firmware. Luckily few boards do (thanks to Broadcom seemingly having some "interesting" terms and conditions on its use) Check http://review.coreboot.org/#/c/2831/ for partial documentation<br />
<br />
* CPU microcode: AMD provides this as redistributable binary, the format is partially reverse engineered, it's covered by a 2048b RSA signature. Unlikely that it can be replaced. Depending on the CPU (incl. its stepping) it might be possible to get by without it. Older microcode described http://www.securiteam.com/securityreviews/5FP0M1PDFO.html<br />
<br />
* SMU: Another embedded controller, The SMU seems to be handling PCIe power management stuff in AMD northbridges (from RS880 onwards?) the firmware is loaded during system boot. It is unknown if the firmware has to be loaded. The SMU is most likely Altera LM32 CPU.<br />
<br />
* VGA BIOS: The VGA BIOS contains bytecode which is motherboard/layout specific. Open source efforts here http://sourceforge.net/projects/openradeonbios/?source=dlp<br />
<br />
In theory it might be possible to successfully boot an AMD board without all these binaries, with potentially reduced capabilities (no NIC, USB3, fan control)</div>Ruikhttps://www.coreboot.org/index.php?title=AMD_XHCI&diff=12609AMD XHCI2013-12-23T21:00:06Z<p>Ruik: </p>
<hr />
<div>== AMD XHCI ==<br />
<br />
The AMD XHCI controller in Hudson chip seems to be IP Core of Renesas uPD720200/200A. It looks the firmware consists of multi parts:<br />
<br />
{|<br />
|+ XHCI firmware layout header 0xe bytes<br />
! Offset !! Size in bytes !! What<br />
|-<br />
|0x0000 ||2 ||Signature 0x55aa || <br />
|-<br />
|0x0002 || 2 || Offset to the BCD (type0?)||<br />
|-<br />
|0x0004 || 2 || BCD size ||<br />
|-<br />
|0x0006 || 2 || Offset to Main FW (type1?) ||<br />
|-<br />
|0x0008 || 2 || Main FW size ||<br />
|-<br />
|0x000a || 2 || Offset to the ACD (type2?)||<br />
|-<br />
|0x000c || 2 || Offset to the ACD ||<br />
|}<br />
<br />
{|<br />
|+ Main FW<br />
! Offset !! Size in bytes !! What<br />
|-<br />
|0x0000 ||2 ||Firmware version - 0x3032 means 3.0.3.2 || <br />
|-<br />
|0x0002 ||- ||Firmware data, most likely V850 controller || <br />
|}<br />
<br />
The firmware in blobs repository is 3.0.3.2, quite common version 3.0.3.4.0.8 found on the internet matches well 0xcf0 bytes. It is not know where the 0.8 subversion is stored.</div>Ruikhttps://www.coreboot.org/index.php?title=AMD_XHCI&diff=12608AMD XHCI2013-12-23T20:39:03Z<p>Ruik: Created page with "== AMD XHCI == The AMD XHCI controller in Hudson chip seems to be IP Core of Renesas uPD720200/200A. It looks the firmware consists of multi parts: {| |+ XHCI firmware layou..."</p>
<hr />
<div>== AMD XHCI ==<br />
<br />
The AMD XHCI controller in Hudson chip seems to be IP Core of Renesas uPD720200/200A. It looks the firmware consists of multi parts:<br />
<br />
{|<br />
|+ XHCI firmware layout header 0xe bytes<br />
! Offset !! Size in bytes !! What<br />
|-<br />
|0x0000 ||2 ||Signature 0xaa55 || <br />
|-<br />
|0x0002 || 2 || Offset to the BCD ||<br />
|-<br />
|0x0004 || 2 || BCD size ||<br />
|-<br />
|0x0006 || 2 || Offset to Main FW ||<br />
|-<br />
|0x0008 || 2 || Main FW size ||<br />
|-<br />
|0x000a || 2 || Offset to the ACD ||<br />
|-<br />
|0x000c || 2 || Offset to the ACD ||<br />
|}<br />
<br />
{|<br />
|+ Main FW<br />
! Offset !! Size in bytes !! What<br />
|-<br />
|0x0000 ||2 ||Firmware version - 0x3032 means 3.0.3.2 || <br />
|-<br />
|0x0002 ||- ||Firmware data, most likely V850 controller || <br />
|}</div>Ruikhttps://www.coreboot.org/index.php?title=Binary_situation&diff=12606Binary situation2013-12-23T15:11:37Z<p>Ruik: /* Intel */</p>
<hr />
<div>While we aim for a 100% free boot process, recent developments (and general unwillingness by some hardware companies to provide specifications) make it hard to achieve.<br />
<br />
= Intel =<br />
On Intel based chipsets (since Intel 5 Series) the following binary components persist:<br />
* <span style="background:red">'''Panic level: 9000+'''</span> Management Engine firmware: The management engine is a separate CPU that does various management tasks and needs its own firmware. This firmware exists in a 1.5MB and a 5MB version, where the latter provides the "Intel AMT" functions (ie. remote access, "anti-theft", ...). Probably signed with an Intel key. It's unlikely that this is ever replaced by something open source. Firmware that runs on an ARC core inside the chipset. It runs entirely out-of-band with the main CPU. It has DMA access to the entire system memory and can access the networking adapters in a way transparent to the OS (separate MAC and IP).<br />
* <span style="background:yellow">'''Panic level: medium'''</span> VGABIOS: Runs on the CPU. Unless you can live with staying in the dark until Linux takes over, you'll need this. Luckily there's work in progress to replace it with open source code. Until then you can at least contain it by emulation (see YABEL).<br />
* <span style="background:lime">'''Panic level: small'''</span> CPU microcode: Intel provides this as redistributable binary, the format is partially reverse engineered, it's covered by a 2048b RSA signature. Unlikely that it can be replaced. Depending on the CPU (incl. its stepping) it might be possible to get by without it. Check http://inertiawar.com/microcode/ for details.<br />
* <span style="background:orange">'''Panic level: medium-high'''</span> Gigabit Ethernet Firmware: If your board uses the on-chipset GbE, it requires a small binary (8KB) with unknown content.<br />
* <span style="background:orange">'''Panic level: 8999'''</span> Memory Reference Code: (Sandybridge and newer). This is code that runs on the CPU and initializes RAM. Can be reverse engineered with enough persistence, but not done so far. The "Memory Reference Code", initializes memory and USB power states (other functions are yet unknown). It is provided by Google, and is wrapper for Intel PEI modules.<br />
<br />
= recent AMD =<br />
* IMC: An embedded controller of sorts in the southbridge. 8051-based, can probably be reimplemented (partially done, but unpublished) Check the [[AMD_IMC]] page. The controller is either enabled by hardware strap option. Or if you provide a firmware, the controller is enabled via soft strapping the chipset. It is 8051 controller.<br />
<br />
* XHCI: Controller for USB 3.0 controllers. Analysis has shown that the firmware used in AMD system is most likely Renesas USB 3.0 IP Core. It seems it is V850 compatible controller If not present, USB3 (and related USB ports) won't work.<br />
<br />
* NIC Firmware: If your board uses the on-chip broadcom NIC, you need this firmware. Luckily few boards do (thanks to Broadcom seemingly having some "interesting" terms and conditions on its use) Check http://review.coreboot.org/#/c/2831/ for partial documentation<br />
<br />
* CPU microcode: AMD provides this as redistributable binary, the format is partially reverse engineered, it's covered by a 2048b RSA signature. Unlikely that it can be replaced. Depending on the CPU (incl. its stepping) it might be possible to get by without it. Older microcode described http://www.securiteam.com/securityreviews/5FP0M1PDFO.html<br />
<br />
* SMU: Another embedded controller, The SMU seems to be handling PCIe power management stuff in AMD northbridges (from RS880 onwards?) the firmware is loaded during system boot. It is unknown if the firmware has to be loaded. The SMU is most likely Altera LM32 CPU.<br />
<br />
* VGA BIOS: The VGA BIOS contains bytecode which is motherboard/layout specific. Open source efforts here http://sourceforge.net/projects/openradeonbios/?source=dlp<br />
<br />
In theory it might be possible to successfully boot an AMD board without all these binaries, with potentially reduced capabilities (no NIC, USB3, fan control)</div>Ruikhttps://www.coreboot.org/index.php?title=Binary_situation&diff=12603Binary situation2013-12-22T23:26:48Z<p>Ruik: /* recent AMD */</p>
<hr />
<div>While we aim for a 100% free boot process, recent developments (and general unwillingness by some hardware companies to provide specifications) make it hard to achieve.<br />
<br />
= Intel =<br />
On Intel based chipsets (since Intel 5 Series) the following binary components persist:<br />
* Management Engine firmware: The management engine is a separate CPU that does various management tasks and needs its own firmware. This firmware exists in a 1.5MB and a 5MB version, where the latter provides the "Intel AMT" functions (ie. remote access, "anti-theft", ...). Probably signed with an Intel key. It's unlikely that this is ever replaced by something open source. Firmware that runs on an ARC core inside the chipset. It runs entirely out-of-band with the main CPU. It has DMA access to the entire system memory and can access the networking adapters in a way transparent to the OS (separate MAC and IP).<br />
* VGABIOS: Runs on the CPU. Unless you can live with staying in the dark until Linux takes over, you'll need this. Luckily there's work in progress to replace it with open source code. Until then you can at least contain it by emulation (see YABEL).<br />
* CPU microcode: Intel provides this as redistributable binary, the format is partially reverse engineered, it's covered by a 2048b RSA signature. Unlikely that it can be replaced. Depending on the CPU (incl. its stepping) it might be possible to get by without it.<br />
* Gigabit Ethernet Firmware: If your board uses the on-chipset GbE, it requires a small binary (8KB) with unknown content.<br />
* Memory Reference Code: (Sandybridge and newer). This is code that runs on the CPU and initializes RAM. Can be reverse engineered with enough persistence, but not done so far. The "Memory Reference Code", initializes memory and USB power states (other functions are yet unknown). It is provided by Google, and is wrapper for Intel PEI modules.<br />
<br />
= recent AMD =<br />
* IMC: An embedded controller of sorts in the southbridge. 8051-based, can probably be reimplemented (partially done, but unpublished) Check the [[AMD_IMC]] page. The controller is either enabled by hardware strap option. Or if you provide a firmware, the controller is enabled via soft strapping the chipset. It is 8051 controller.<br />
<br />
* XHCI: Controller for USB 3.0 controllers. Analysis has shown that the firmware used in AMD system is most likely Renesas USB 3.0 IP Core. It seems it is V850 compatible controller If not present, USB3 (and related USB ports) won't work.<br />
<br />
* NIC Firmware: If your board uses the on-chip broadcom NIC, you need this firmware. Luckily few boards do (thanks to Broadcom seemingly having some "interesting" terms and conditions on its use) Check http://review.coreboot.org/#/c/2831/ for partial documentation<br />
<br />
* CPU microcode: AMD provides this as redistributable binary, the format is partially reverse engineered, it's covered by a 2048b RSA signature. Unlikely that it can be replaced. Depending on the CPU (incl. its stepping) it might be possible to get by without it. Older microcode described http://www.securiteam.com/securityreviews/5FP0M1PDFO.html<br />
<br />
* SMU: Another embedded controller, The SMU seems to be handling PCIe power management stuff in AMD northbridges (from RS880 onwards?) the firmware is loaded during system boot. It is unknown if the firmware has to be loaded. The SMU is most likely Altera LM32 CPU.<br />
<br />
* VGA BIOS: The VGA BIOS contains bytecode which is motherboard/layout specific. Open source efforts here http://sourceforge.net/projects/openradeonbios/?source=dlp<br />
<br />
In theory it might be possible to successfully boot an AMD board without all these binaries, with potentially reduced capabilities (no NIC, USB3, fan control)</div>Ruikhttps://www.coreboot.org/index.php?title=Binary_situation&diff=12602Binary situation2013-12-22T23:24:39Z<p>Ruik: /* Intel */</p>
<hr />
<div>While we aim for a 100% free boot process, recent developments (and general unwillingness by some hardware companies to provide specifications) make it hard to achieve.<br />
<br />
= Intel =<br />
On Intel based chipsets (since Intel 5 Series) the following binary components persist:<br />
* Management Engine firmware: The management engine is a separate CPU that does various management tasks and needs its own firmware. This firmware exists in a 1.5MB and a 5MB version, where the latter provides the "Intel AMT" functions (ie. remote access, "anti-theft", ...). Probably signed with an Intel key. It's unlikely that this is ever replaced by something open source. Firmware that runs on an ARC core inside the chipset. It runs entirely out-of-band with the main CPU. It has DMA access to the entire system memory and can access the networking adapters in a way transparent to the OS (separate MAC and IP).<br />
* VGABIOS: Runs on the CPU. Unless you can live with staying in the dark until Linux takes over, you'll need this. Luckily there's work in progress to replace it with open source code. Until then you can at least contain it by emulation (see YABEL).<br />
* CPU microcode: Intel provides this as redistributable binary, the format is partially reverse engineered, it's covered by a 2048b RSA signature. Unlikely that it can be replaced. Depending on the CPU (incl. its stepping) it might be possible to get by without it.<br />
* Gigabit Ethernet Firmware: If your board uses the on-chipset GbE, it requires a small binary (8KB) with unknown content.<br />
* Memory Reference Code: (Sandybridge and newer). This is code that runs on the CPU and initializes RAM. Can be reverse engineered with enough persistence, but not done so far. The "Memory Reference Code", initializes memory and USB power states (other functions are yet unknown). It is provided by Google, and is wrapper for Intel PEI modules.<br />
<br />
= recent AMD =<br />
* IMC: An embedded controller of sorts in the southbridge. 8051-based, can probably be reimplemented (partially done, but unpublished) Check the [[AMD_IMC]] page. The controller is either enabled by hardware strap option. Or if you provide a firmware, the controller is enabled via soft strapping the chipset. It is 8051 controller.<br />
<br />
* XHCI: Controller for USB 3.0 controllers. Analysis has shown that the firmware used in AMD system is most likely Renesas USB 3.0 IP Core. It seems it is V850 compatible controller If not present, USB3 (and related USB ports) won't work.<br />
<br />
* NIC Firmware: If your board uses the on-chip broadcom NIC, you need this firmware. Luckily few boards do (thanks to Broadcom seemingly having some "interesting" terms and conditions on its use) Check http://review.coreboot.org/#/c/2831/ for partial documentation<br />
<br />
* CPU microcode: AMD provides this as redistributable binary, the format is partially reverse engineered, it's covered by a 2048b RSA signature. Unlikely that it can be replaced. Depending on the CPU (incl. its stepping) it might be possible to get by without it. Older microcode described http://www.securiteam.com/securityreviews/5FP0M1PDFO.html<br />
<br />
* SMU: Another embedded controller, The SMU seems to be handling PCIe power management stuff in AMD northbridges (from RS880 onwards?) the firmware is loaded during system boot. It is unknown if the firmware has to be loaded. The SMU is most likely Altera LM32 CPU.<br />
<br />
In theory it might be possible to successfully boot an AMD board without all these binaries, with potentially reduced capabilities (no NIC, USB3, fan control)</div>Ruikhttps://www.coreboot.org/index.php?title=Binary_situation&diff=12600Binary situation2013-12-22T23:18:24Z<p>Ruik: /* recent AMD */</p>
<hr />
<div>While we aim for a 100% free boot process, recent developments (and general unwillingness by some hardware companies to provide specifications) make it hard to achieve.<br />
<br />
= Intel =<br />
On Intel based chipsets (since Intel 5 Series) the following binary components persist:<br />
* Management Engine firmware: The management engine is a separate CPU that does various management tasks and needs its own firmware. This firmware exists in a 1.5MB and a 5MB version, where the latter provides the "Intel AMT" functions (ie. remote access, "anti-theft", ...). Probably signed with an Intel key. It's unlikely that this is ever replaced by something open source.<br />
* VGABIOS: Runs on the CPU. Unless you can live with staying in the dark until Linux takes over, you'll need this. Luckily there's work in progress to replace it with open source code. Until then you can at least contain it by emulation (see YABEL).<br />
* CPU microcode: Intel provides this as redistributable binary, the format is partially reverse engineered, it's covered by a 2048b RSA signature. Unlikely that it can be replaced. Depending on the CPU (incl. its stepping) it might be possible to get by without it.<br />
* Gigabit Ethernet Firmware: If your board uses the on-chipset GbE, it requires a small binary (8KB) with unknown content.<br />
* Memory Reference Code: (Sandybridge and newer). This is code that runs on the CPU and initializes RAM. Can be reverse engineered with enough persistence, but not done so far.<br />
<br />
= recent AMD =<br />
* IMC: An embedded controller of sorts in the southbridge. 8051-based, can probably be reimplemented (partially done, but unpublished) Check the [[AMD_IMC]] page. The controller is either enabled by hardware strap option. Or if you provide a firmware, the controller is enabled via soft strapping the chipset. It is 8051 controller.<br />
<br />
* XHCI: Controller for USB 3.0 controllers. Analysis has shown that the firmware used in AMD system is most likely Renesas USB 3.0 IP Core. It seems it is V850 compatible controller If not present, USB3 (and related USB ports) won't work.<br />
<br />
* NIC Firmware: If your board uses the on-chip broadcom NIC, you need this firmware. Luckily few boards do (thanks to Broadcom seemingly having some "interesting" terms and conditions on its use) Check http://review.coreboot.org/#/c/2831/ for partial documentation<br />
<br />
* CPU microcode: AMD provides this as redistributable binary, the format is partially reverse engineered, it's covered by a 2048b RSA signature. Unlikely that it can be replaced. Depending on the CPU (incl. its stepping) it might be possible to get by without it. Older microcode described http://www.securiteam.com/securityreviews/5FP0M1PDFO.html<br />
<br />
* SMU: Another embedded controller, The SMU seems to be handling PCIe power management stuff in AMD northbridges (from RS880 onwards?) the firmware is loaded during system boot. It is unknown if the firmware has to be loaded. The SMU is most likely Altera LM32 CPU.<br />
<br />
In theory it might be possible to successfully boot an AMD board without all these binaries, with potentially reduced capabilities (no NIC, USB3, fan control)</div>Ruikhttps://www.coreboot.org/index.php?title=Binary_situation&diff=12599Binary situation2013-12-22T23:17:31Z<p>Ruik: /* recent AMD */</p>
<hr />
<div>While we aim for a 100% free boot process, recent developments (and general unwillingness by some hardware companies to provide specifications) make it hard to achieve.<br />
<br />
= Intel =<br />
On Intel based chipsets (since Intel 5 Series) the following binary components persist:<br />
* Management Engine firmware: The management engine is a separate CPU that does various management tasks and needs its own firmware. This firmware exists in a 1.5MB and a 5MB version, where the latter provides the "Intel AMT" functions (ie. remote access, "anti-theft", ...). Probably signed with an Intel key. It's unlikely that this is ever replaced by something open source.<br />
* VGABIOS: Runs on the CPU. Unless you can live with staying in the dark until Linux takes over, you'll need this. Luckily there's work in progress to replace it with open source code. Until then you can at least contain it by emulation (see YABEL).<br />
* CPU microcode: Intel provides this as redistributable binary, the format is partially reverse engineered, it's covered by a 2048b RSA signature. Unlikely that it can be replaced. Depending on the CPU (incl. its stepping) it might be possible to get by without it.<br />
* Gigabit Ethernet Firmware: If your board uses the on-chipset GbE, it requires a small binary (8KB) with unknown content.<br />
* Memory Reference Code: (Sandybridge and newer). This is code that runs on the CPU and initializes RAM. Can be reverse engineered with enough persistence, but not done so far.<br />
<br />
= recent AMD =<br />
* IMC: An embedded controller of sorts in the southbridge. 8051-based, can probably be reimplemented (partially done, but unpublished) Check the [AMD_IMC] page. The controller is either enabled by hardware strap option. Or if you provide a firmware, the controller is enabled via soft strapping the chipset. It is 8051 controller.<br />
<br />
* XHCI: Controller for USB 3.0 controllers. Analysis has shown that the firmware used in AMD system is most likely Renesas USB 3.0 IP Core. It seems it is V850 compatible controller If not present, USB3 (and related USB ports) won't work.<br />
<br />
* NIC Firmware: If your board uses the on-chip broadcom NIC, you need this firmware. Luckily few boards do (thanks to Broadcom seemingly having some "interesting" terms and conditions on its use) Check http://review.coreboot.org/#/c/2831/ for partial documentation<br />
<br />
* CPU microcode: AMD provides this as redistributable binary, the format is partially reverse engineered, it's covered by a 2048b RSA signature. Unlikely that it can be replaced. Depending on the CPU (incl. its stepping) it might be possible to get by without it. Older microcode described http://www.securiteam.com/securityreviews/5FP0M1PDFO.html<br />
<br />
* SMU: Another embedded controller, The SMU seems to be handling PCIe power management stuff in AMD northbridges (from RS880 onwards?) the firmware is loaded during system boot. It is unknown if the firmware has to be loaded. The SMU is most likely Altera LM32 CPU.<br />
<br />
In theory it might be possible to successfully boot an AMD board without all these binaries, with potentially reduced capabilities (no NIC, USB3, fan control)</div>Ruikhttps://www.coreboot.org/index.php?title=Binary_situation&diff=12595Binary situation2013-12-22T23:15:45Z<p>Ruik: /* recent AMD */</p>
<hr />
<div>While we aim for a 100% free boot process, recent developments (and general unwillingness by some hardware companies to provide specifications) make it hard to achieve.<br />
<br />
= Intel =<br />
On Intel based chipsets (since Intel 5 Series) the following binary components persist:<br />
* Management Engine firmware: The management engine is a separate CPU that does various management tasks and needs its own firmware. This firmware exists in a 1.5MB and a 5MB version, where the latter provides the "Intel AMT" functions (ie. remote access, "anti-theft", ...). Probably signed with an Intel key. It's unlikely that this is ever replaced by something open source.<br />
* VGABIOS: Runs on the CPU. Unless you can live with staying in the dark until Linux takes over, you'll need this. Luckily there's work in progress to replace it with open source code. Until then you can at least contain it by emulation (see YABEL).<br />
* CPU microcode: Intel provides this as redistributable binary, the format is partially reverse engineered, it's covered by a 2048b RSA signature. Unlikely that it can be replaced. Depending on the CPU (incl. its stepping) it might be possible to get by without it.<br />
* Gigabit Ethernet Firmware: If your board uses the on-chipset GbE, it requires a small binary (8KB) with unknown content.<br />
* Memory Reference Code: (Sandybridge and newer). This is code that runs on the CPU and initializes RAM. Can be reverse engineered with enough persistence, but not done so far.<br />
<br />
= recent AMD =<br />
* IMC: An embedded controller of sorts in the southbridge. 8051-based, can probably be reimplemented (partially done, but unpublished) Check the AMD_IMC page. The controller is either enabled by hardware strap option. Or if you provide a firmware, the controller is enabled via soft strapping the chipset. It is 8051 controller.<br />
<br />
* XHCI: Controller for USB 3.0 controllers. Analysis has shown that the firmware used in AMD system is most likely Renesas USB 3.0 IP Core. It seems it is V850 compatible controller If not present, USB3 (and related USB ports) won't work.<br />
<br />
* NIC Firmware: If your board uses the on-chip broadcom NIC, you need this firmware. Luckily few boards do (thanks to Broadcom seemingly having some "interesting" terms and conditions on its use) Check http://review.coreboot.org/#/c/2831/ for partial documentation<br />
<br />
* CPU microcode: AMD provides this as redistributable binary, the format is partially reverse engineered, it's covered by a 2048b RSA signature. Unlikely that it can be replaced. Depending on the CPU (incl. its stepping) it might be possible to get by without it. Older microcode described http://www.securiteam.com/securityreviews/5FP0M1PDFO.html<br />
<br />
* SMU: Another embedded controller, The SMU seems to be handling PCIe power management stuff in AMD northbridges (from RS880 onwards?) the firmware is loaded during system boot. It is unknown if the firmware has to be loaded. The SMU is most likely Altera LM32 CPU.<br />
<br />
In theory it might be possible to successfully boot an AMD board without all these binaries, with potentially reduced capabilities (no NIC, USB3, fan control)</div>Ruikhttps://www.coreboot.org/index.php?title=Binary_situation&diff=12594Binary situation2013-12-22T23:15:19Z<p>Ruik: Add AMD stuff</p>
<hr />
<div>While we aim for a 100% free boot process, recent developments (and general unwillingness by some hardware companies to provide specifications) make it hard to achieve.<br />
<br />
= Intel =<br />
On Intel based chipsets (since Intel 5 Series) the following binary components persist:<br />
* Management Engine firmware: The management engine is a separate CPU that does various management tasks and needs its own firmware. This firmware exists in a 1.5MB and a 5MB version, where the latter provides the "Intel AMT" functions (ie. remote access, "anti-theft", ...). Probably signed with an Intel key. It's unlikely that this is ever replaced by something open source.<br />
* VGABIOS: Runs on the CPU. Unless you can live with staying in the dark until Linux takes over, you'll need this. Luckily there's work in progress to replace it with open source code. Until then you can at least contain it by emulation (see YABEL).<br />
* CPU microcode: Intel provides this as redistributable binary, the format is partially reverse engineered, it's covered by a 2048b RSA signature. Unlikely that it can be replaced. Depending on the CPU (incl. its stepping) it might be possible to get by without it.<br />
* Gigabit Ethernet Firmware: If your board uses the on-chipset GbE, it requires a small binary (8KB) with unknown content.<br />
* Memory Reference Code: (Sandybridge and newer). This is code that runs on the CPU and initializes RAM. Can be reverse engineered with enough persistence, but not done so far.<br />
<br />
= recent AMD =<br />
* IMC: An embedded controller of sorts in the southbridge. 8051-based, can probably be reimplemented (partially done, but unpublished) Check the AMD_IMC page. The controller is either enabled by hardware strap option. Or if you provide a firmware, the controller is enabled via soft strapping the chipset. It is 8051 controller.<br />
<br />
* XHCI: Controller for USB 3.0 controllers. Analysis has shown that the firmware used in AMD system is most likely Renesas USB 3.0 IP Core. It seems it is V850 compatible controller If not present, USB3 (and related USB ports) won't work.<br />
<br />
* NIC Firmware: If your board uses the on-chip broadcom NIC, you need this firmware. Luckily few boards do (thanks to Broadcom seemingly having some "interesting" terms and conditions on its use) Check http://review.coreboot.org/#/c/2831/ for partial documentation<br />
<br />
* CPU microcode: AMD provides this as redistributable binary, the format is partially reverse engineered, it's covered by a 2048b RSA signature. Unlikely that it can be replaced. Depending on the CPU (incl. its stepping) it might be possible to get by without it. Older microcode described http://www.securiteam.com/securityreviews/5FP0M1PDFO.html<br />
<br />
<br />
* SMU: Another embedded controller, The SMU seems to be handling PCIe power management stuff in AMD northbridges (from RS880 onwards?) the firmware is loaded during system boot. It is unknown if the firmware has to be loaded. The SMU is most likely Altera LM32 CPU.<br />
<br />
In theory it might be possible to successfully boot an AMD board without all these binaries, with potentially reduced capabilities (no NIC, USB3, fan control)</div>Ruikhttps://www.coreboot.org/index.php?title=Board:asus/f2a85-m&diff=12245Board:asus/f2a85-m2013-11-03T13:48:14Z<p>Ruik: /* Hardware info */</p>
<hr />
<div>== Status ==<br />
<br />
<br />
=== Notes ===<br />
<br />
* The ASUS F2A85-M CSM is identical to the F2A85-M.<br />
* Retrieve the VGA optionrom from the vendor EFI binary by running 'dd if=/dev/mem of=vgabios.bin bs=1k count=64 skip=768' (source: http://www.coreboot.org/pipermail/coreboot/2012-December/073133.html )<br />
<br />
For internal VGA:<br />
Boot the legacy BIOS, and use [[VGA_support]] chapter <br />
<br />
* Add the extracted VGA optionrom in menuconfig. The device ID for the APU graphics varies, run 'lspci -nn | grep VGA' to find the right ID.<br />
* If you use PS/2 de-select legacy free<br />
* De-select running option ROMs, Seabios will run the ROMs that coreboot loads into memory so you should get a text display from Seabios<br />
* It is required that seabios is the coreboot payload for the F2A85-M or the internal VGA will not be initialized. But read [[SeaBIOS]] for how to add payloads to SeaBIOS and set SeaBIOS' boot order to run your payload.<br />
** its internal VGA comes up just fine (using Change ID I9e0df1669d73863c95c36a3a7fee40d58f6f097e), with unpatched SeaBIOS and these settings:<br />
** CONFIG_VGA_ROM_RUN=y<br />
** CONFIG_PCI_ROM_RUN=y<br />
** CONFIG_ON_DEVICE_ROM_RUN=y<br />
* Hotswapping the PDIP BIOS chip has some issues (most likely USB3 XHCI, disable it in original bios before hot-flashing to coreboot). Drop a mail to mailing list if you have issues.<br />
<br />
=== TODOs ===<br />
* test virtualization<br />
* test HDMI: video over hdmi works with the extracted vga optionrom, audio is untested.<br />
* update VERB tables<br />
* test suspend: this is work in progress<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_L1_status = OK<br />
|CPU_L2_status = OK<br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = OK<br />
|CPU_multicore_status = OK<br />
|CPU_virt_status = Untested<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = N/A<br />
|RAM_DDR3_status = OK <br />
|RAM_DDR3_comments = Please select right voltage in menuconfig! Default is 1.5V but some DIMMs need more or less!<br />
|RAM_dualchannel_status = OK<br />
|RAM_ecc_status = N/A<br />
<br />
|IDE_status = N/A<br />
|IDE_25_status = N/A<br />
|IDE_CF_status = N/A<br />
|CDROM_DVD_status = Untested<br />
|SATA_status = OK<br />
|SATA_comments = Tested all ports of sixpack.<br />
|USB_status = OK<br />
|USB_comments = Issues with XHCI exist with Asus' BIOS as well<br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = Use dd to [[VGA_support|extract the legacy BIOS]], HDMI untested<br />
|Onboard_SCSI_status = N/A<br />
|Onboard_ethernet_status = OK<br />
|Onboard_audio_status = OK<br />
|Onboard_audio_comments = tested with headphones in line-out (lime colored)<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = N/A<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = OK<br />
|PCIE_x1_status = OK<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = OK<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = OK<br />
|PCIE_x32_status = N/A<br />
|Mini_PCI_cards_status = N/A<br />
|PCIX_cards_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = N/A<br />
|COM1_status = OK<br />
|COM2_status = N/A<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = Untested<br />
|PP_status = N/A<br />
|Game_port_status = N/A<br />
|IR_status = ?<br />
|Speaker_status = OK<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = Untested<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = OK<br />
|Powersave_status = ?<br />
|ACPI_status = OK<br />
|ACPI_comments = ACPI power button event works, suspend is WIP (work in progress).<br />
|Reboot_status = OK<br />
|Reboot_comments = warm reboot from Asus' BIOS to coreboot does not work, use reset button after the first time you flash coreboot<br />
|Poweroff_status = OK<br />
|Suspend_status = WIP<br />
|LEDs_status = OK<br />
|HPET_status = OK<br />
|RNG_status = ?<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
<br />
}}<br />
<br />
== Hardware info ==<br />
<br />
This board ships with a socketed Winbond 25Q64F, 64 Mbit (8 Mbyte) chip, in PDIP 300 mil package:<br />
<br />
{|<br />
|| [[Image:IMG_20130522_084444.jpg|thumb|Winbond 25Q64F]] <br />
|}<br />
<br />
The chip manual is available [http://www.nexflash.com/hq/enu/ProductAndSales/ProductLines/FlashMemory/SerialFlash/W25Q64FV.htm here]<br />
<br />
For out of band flashing, I use a<br />
<br />
3M test clip model 923739-08-ND<br />
<br />
It has .300" spacing, 8 pin DIP clip, gold finish and 'headless heads'. I hook this up to a bus pirate. This works but reading and writing take forever:<br />
<br />
<pre><br />
# time /usr/src/flashrom/flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -w 20130826-coreboot.rom<br />
flashrom v0.9.6.1-r1669 on Linux 3.8-2-amd64 (x86_64)<br />
flashrom is free software, get the source code at http://www.flashrom.org<br />
<br />
Calibrating delay loop... OK.<br />
Found Winbond flash chip "W25Q64" (8192 kB, SPI) on buspirate_spi.<br />
Reading old flash chip contents... done.<br />
Erasing and writing flash chip... Erase/write done.<br />
Verifying flash... VERIFIED.<br />
<br />
real 35m35.409s<br />
user 0m55.976s<br />
sys 0m12.920s<br />
</pre><br />
<br />
=== DDR voltage controller ===<br />
<br />
The DDR voltage controller is accessible through the AUX SMBUS device 0x15 and it is most likely driven by programmable current source NCT3933U (datasheet on nuvoton website).<br />
<br />
=== The ASUS digi VRM ===<br />
<br />
The ASUS digi voltage controller is accessible through the SMBUS device 0x20 and it is most likely driven by CHL8318 or similar chip (re-branded)<br />
<br />
== Memory ==<br />
<br />
I use:<br />
<br />
2x 2GB DDR3 modules in blue slots:<br />
<br />
<pre><br />
#modprobe i2c-piix4<br />
#modprobe eeprom<br />
#decode-dimms<br />
<br />
---=== Memory Characteristics ===--- <br />
Fine time base 2.500 ps <br />
Medium time base 0.125 ns <br />
Maximum module speed 1333MHz (PC3-10666) <br />
Size 2048 MB <br />
Banks x Rows x Columns x Bits 8 x 14 x 10 x 64 <br />
Ranks 2 <br />
SDRAM Device Width 8 bits <br />
tCL-tRCD-tRP-tRAS 8-8-8-24 <br />
Supported CAS Latencies (tCL) 9T, 8T, 7T, 6T <br />
</pre></div>Ruikhttps://www.coreboot.org/index.php?title=Datasheets&diff=12113Datasheets2013-07-19T22:09:36Z<p>Ruik: /* AMD Fam16 */</p>
<hr />
<div></div>Ruikhttps://www.coreboot.org/index.php?title=Board:asus/f2a85-m&diff=11890Board:asus/f2a85-m2013-05-26T08:50:54Z<p>Ruik: /* Hardware info */</p>
<hr />
<div>== Status ==<br />
<br />
<br />
=== Notes ===<br />
<br />
* The ASUS F2A85-M CSM is same as F2A85-M.<br />
* get VGA from original bios using this:<br />
Source: http://www.coreboot.org/pipermail/coreboot/2012-December/073133.html<br />
<br />
for internal VGA:<br />
Boot the legacy BIOS, and use http://www.coreboot.org/VGA_support chapter <br />
<br />
extracting from your system: dd if=/dev/mem of=vgabios.bin bs=1k count=64 skip=768<br />
<br />
You will need following patch to seabios:<br />
<code><br />
--- a/src/optionroms.c<br />
+++ b/src/optionroms.c<br />
@@ -215,7 +215,10 @@ is_pci_vga(struct pci_device *pci)<br />
{<br />
if (pci->class != PCI_CLASS_DISPLAY_VGA)<br />
return 0;<br />
- u16 cmd = pci_config_readw(pci->bdf, PCI_COMMAND);<br />
+ u16 cmd = pci_config_readw(pci->bdf, PCI_COMMAND) | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;<br />
+<br />
+ pci_config_writew(pci->bdf, PCI_COMMAND, cmd);<br />
+<br />
if (!(cmd & PCI_COMMAND_IO && cmd & PCI_COMMAND_MEMORY))<br />
return 0;<br />
while (pci->parent) {<br />
</code><br />
<br />
Reason is unknown, I see coreboot is writing 7 to cmd, but there is actually <br />
6... Maybe there is some magic about IO decode bit...<br />
<br />
* Add VGA bios in the menuconfig<br />
* If you use PS/2 de-select legacy free<br />
* De-select running option ROMs, leave this to Seabios<br />
* Use seabios as payload<br />
* Hotswapping has some issues (most likely USB3, disable it in orig bios before hot-flashing to coreboot). Drop a mail to mailing list if you have issues.<br />
<br />
=== TODOs ===<br />
* test virtualization<br />
* test HDMI<br />
* update VERB tables<br />
* test suspend<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = <br />
|CPU_L1_status = OK<br />
|CPU_L1_comments = <br />
|CPU_L2_status = OK<br />
|CPU_L2_comments = <br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = OK<br />
|CPU_multicore_status = OK<br />
|CPU_multicore_comments = <br />
|CPU_virt_status = Untested<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = N/A<br />
|RAM_DDR3_status = OK <br />
|RAM_DDR3_comments = Please select right voltage in menuconfig! Default is 1.5V but some DIMMs need more or less!<br />
|RAM_dualchannel_status = OK<br />
|RAM_ecc_status = N/A<br />
|RAM_ecc_comments =<br />
<br />
|IDE_status = N/A<br />
|IDE_comments = <br />
|IDE_25_status = N/A<br />
|IDE_CF_status = N/A<br />
|CDROM_DVD_status = Untested<br />
|SATA_status = OK<br />
|SATA_comments = Tested only first top port on left in sixpack (from outside view).<br />
|USB_status = Untested<br />
|USB_comments = <br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = HDMI untested<br />
|Onboard_ethernet_status = OK<br />
|Onboard_audio_status = Untested<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = N/A<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = OK<br />
|PCIE_x1_status = OK<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = OK<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = OK<br />
|PCIE_x16_comments = <br />
|PCIE_x32_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = Untested<br />
|COM1_status = OK<br />
|COM2_status = N/A<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = Untested<br />
|PP_status = N/A<br />
|PP_comments = <br />
|Game_port_status = N/A<br />
|IR_status = ?<br />
|Speaker_status = ?<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = Untested<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = OK<br />
|CPUfreq_comments = <br />
|Powersave_status = ?<br />
|ACPI_status = OK<br />
|ACPI_comments = ACPI power button event works, suspend untested.<br />
|Reboot_status = OK<br />
|Poweroff_status = OK<br />
|LEDs_status = Unknown<br />
|HPET_status = OK<br />
|RNG_status = ?<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
<br />
}}<br />
<br />
== Hardware info ==<br />
<br />
This board ships with a socketed Winbond 25Q64F, 64 Mbit (8 Mbyte) chip, in PDIP 300 mil package:<br />
<br />
{|<br />
|| [[Image:IMG_20130522_084444.jpg|thumb|Winbond 25Q64F]] <br />
|}<br />
<br />
The chip manual is available [http://www.nexflash.com/hq/enu/ProductAndSales/ProductLines/FlashMemory/SerialFlash/W25Q64FV.htm here]<br />
<br />
I use:<br />
<br />
2x 2GB DDR3 modules in blue slots:<br />
<br />
<pre><br />
#modprobe i2c-piix4<br />
#modprobe eeprom<br />
#decode-dimms<br />
<br />
---=== Memory Characteristics ===--- <br />
Fine time base 2.500 ps <br />
Medium time base 0.125 ns <br />
Maximum module speed 1333MHz (PC3-10666) <br />
Size 2048 MB <br />
Banks x Rows x Columns x Bits 8 x 14 x 10 x 64 <br />
Ranks 2 <br />
SDRAM Device Width 8 bits <br />
tCL-tRCD-tRP-tRAS 8-8-8-24 <br />
Supported CAS Latencies (tCL) 9T, 8T, 7T, 6T <br />
</pre></div>Ruikhttps://www.coreboot.org/index.php?title=Board:asus/f2a85-m&diff=11889Board:asus/f2a85-m2013-05-26T08:49:56Z<p>Ruik: /* Hardware info */</p>
<hr />
<div>== Status ==<br />
<br />
<br />
=== Notes ===<br />
<br />
* The ASUS F2A85-M CSM is same as F2A85-M.<br />
* get VGA from original bios using this:<br />
Source: http://www.coreboot.org/pipermail/coreboot/2012-December/073133.html<br />
<br />
for internal VGA:<br />
Boot the legacy BIOS, and use http://www.coreboot.org/VGA_support chapter <br />
<br />
extracting from your system: dd if=/dev/mem of=vgabios.bin bs=1k count=64 skip=768<br />
<br />
You will need following patch to seabios:<br />
<code><br />
--- a/src/optionroms.c<br />
+++ b/src/optionroms.c<br />
@@ -215,7 +215,10 @@ is_pci_vga(struct pci_device *pci)<br />
{<br />
if (pci->class != PCI_CLASS_DISPLAY_VGA)<br />
return 0;<br />
- u16 cmd = pci_config_readw(pci->bdf, PCI_COMMAND);<br />
+ u16 cmd = pci_config_readw(pci->bdf, PCI_COMMAND) | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;<br />
+<br />
+ pci_config_writew(pci->bdf, PCI_COMMAND, cmd);<br />
+<br />
if (!(cmd & PCI_COMMAND_IO && cmd & PCI_COMMAND_MEMORY))<br />
return 0;<br />
while (pci->parent) {<br />
</code><br />
<br />
Reason is unknown, I see coreboot is writing 7 to cmd, but there is actually <br />
6... Maybe there is some magic about IO decode bit...<br />
<br />
* Add VGA bios in the menuconfig<br />
* If you use PS/2 de-select legacy free<br />
* De-select running option ROMs, leave this to Seabios<br />
* Use seabios as payload<br />
* Hotswapping has some issues (most likely USB3, disable it in orig bios before hot-flashing to coreboot). Drop a mail to mailing list if you have issues.<br />
<br />
=== TODOs ===<br />
* test virtualization<br />
* test HDMI<br />
* update VERB tables<br />
* test suspend<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = <br />
|CPU_L1_status = OK<br />
|CPU_L1_comments = <br />
|CPU_L2_status = OK<br />
|CPU_L2_comments = <br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = OK<br />
|CPU_multicore_status = OK<br />
|CPU_multicore_comments = <br />
|CPU_virt_status = Untested<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = N/A<br />
|RAM_DDR3_status = OK <br />
|RAM_DDR3_comments = Please select right voltage in menuconfig! Default is 1.5V but some DIMMs need more or less!<br />
|RAM_dualchannel_status = OK<br />
|RAM_ecc_status = N/A<br />
|RAM_ecc_comments =<br />
<br />
|IDE_status = N/A<br />
|IDE_comments = <br />
|IDE_25_status = N/A<br />
|IDE_CF_status = N/A<br />
|CDROM_DVD_status = Untested<br />
|SATA_status = OK<br />
|SATA_comments = Tested only first top port on left in sixpack (from outside view).<br />
|USB_status = Untested<br />
|USB_comments = <br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = HDMI untested<br />
|Onboard_ethernet_status = OK<br />
|Onboard_audio_status = Untested<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = N/A<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = OK<br />
|PCIE_x1_status = OK<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = OK<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = OK<br />
|PCIE_x16_comments = <br />
|PCIE_x32_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = Untested<br />
|COM1_status = OK<br />
|COM2_status = N/A<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = Untested<br />
|PP_status = N/A<br />
|PP_comments = <br />
|Game_port_status = N/A<br />
|IR_status = ?<br />
|Speaker_status = ?<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = Untested<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = OK<br />
|CPUfreq_comments = <br />
|Powersave_status = ?<br />
|ACPI_status = OK<br />
|ACPI_comments = ACPI power button event works, suspend untested.<br />
|Reboot_status = OK<br />
|Poweroff_status = OK<br />
|LEDs_status = Unknown<br />
|HPET_status = OK<br />
|RNG_status = ?<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
<br />
}}<br />
<br />
== Hardware info ==<br />
<br />
This board ships with a socketed Winbond 25Q64F, 64 Mbit (8 Mbyte) chip, in PDIP 300 mil package:<br />
<br />
{|<br />
|| [[Image:IMG_20130522_084444.jpg|thumb|Winbond 25Q64F]] <br />
|}<br />
<br />
The chip manual is available [http://www.nexflash.com/hq/enu/ProductAndSales/ProductLines/FlashMemory/SerialFlash/W25Q64FV.htm here]<br />
<br />
I use:<br />
<br />
2x 2GB DDR3 modules in blue slots<br />
<br />
<pre><br />
---=== Memory Characteristics ===--- <br />
Fine time base 2.500 ps <br />
Medium time base 0.125 ns <br />
Maximum module speed 1333MHz (PC3-10666) <br />
Size 2048 MB <br />
Banks x Rows x Columns x Bits 8 x 14 x 10 x 64 <br />
Ranks 2 <br />
SDRAM Device Width 8 bits <br />
tCL-tRCD-tRP-tRAS 8-8-8-24 <br />
Supported CAS Latencies (tCL) 9T, 8T, 7T, 6T <br />
</pre></div>Ruikhttps://www.coreboot.org/index.php?title=Datasheets&diff=11809Datasheets2013-04-15T21:58:54Z<p>Ruik: /* Socket specs */</p>
<hr />
<div></div>Ruikhttps://www.coreboot.org/index.php?title=Datasheets&diff=11808Datasheets2013-04-15T21:54:52Z<p>Ruik: /* AMD SB700/SB710/SB750 */</p>
<hr />
<div></div>Ruikhttps://www.coreboot.org/index.php?title=Datasheets&diff=11807Datasheets2013-04-15T21:52:23Z<p>Ruik: /* AMD A45/A50M/A55E FCH */</p>
<hr />
<div></div>Ruikhttps://www.coreboot.org/index.php?title=Datasheets&diff=11806Datasheets2013-04-15T21:51:22Z<p>Ruik: /* AMD AMD A55/A60M/A70M/A75 FCH */</p>
<hr />
<div></div>Ruikhttps://www.coreboot.org/index.php?title=Datasheets&diff=11805Datasheets2013-04-15T21:49:37Z<p>Ruik: /* AMD AMD A55/A60M/A70M/A75 FCH */</p>
<hr />
<div></div>Ruikhttps://www.coreboot.org/index.php?title=Datasheets&diff=11804Datasheets2013-04-15T21:47:56Z<p>Ruik: /* AMD SB950 */</p>
<hr />
<div></div>Ruikhttps://www.coreboot.org/index.php?title=Datasheets&diff=11803Datasheets2013-04-15T21:44:48Z<p>Ruik: /* AMD RS690 */</p>
<hr />
<div></div>Ruikhttps://www.coreboot.org/index.php?title=Datasheets&diff=11802Datasheets2013-04-15T21:37:55Z<p>Ruik: /* AMD RS690 */</p>
<hr />
<div></div>Ruikhttps://www.coreboot.org/index.php?title=Datasheets&diff=11801Datasheets2013-04-15T21:35:38Z<p>Ruik: /* AMD RS780 */</p>
<hr />
<div></div>Ruikhttps://www.coreboot.org/index.php?title=Datasheets&diff=11800Datasheets2013-04-15T21:30:40Z<p>Ruik: /* AMD RD890 */</p>
<hr />
<div></div>Ruikhttps://www.coreboot.org/index.php?title=Datasheets&diff=11798Datasheets2013-04-15T21:24:40Z<p>Ruik: /* AMD RS880 */</p>
<hr />
<div></div>Ruikhttps://www.coreboot.org/index.php?title=Datasheets&diff=11797Datasheets2013-04-15T21:22:33Z<p>Ruik: /* AMD RS880 */</p>
<hr />
<div></div>Ruikhttps://www.coreboot.org/index.php?title=Datasheets&diff=11796Datasheets2013-04-15T21:21:34Z<p>Ruik: /* AMD RS880 */</p>
<hr />
<div></div>Ruikhttps://www.coreboot.org/index.php?title=Datasheets&diff=11795Datasheets2013-04-15T21:15:19Z<p>Ruik: /* AMD K8 */</p>
<hr />
<div></div>Ruikhttps://www.coreboot.org/index.php?title=Datasheets&diff=11794Datasheets2013-04-15T21:13:57Z<p>Ruik: /* AMD Fam10h */</p>
<hr />
<div></div>Ruikhttps://www.coreboot.org/index.php?title=Datasheets&diff=11793Datasheets2013-04-15T21:11:01Z<p>Ruik: /* AMD Fam10h */</p>
<hr />
<div></div>Ruikhttps://www.coreboot.org/index.php?title=Datasheets&diff=11792Datasheets2013-04-15T21:09:23Z<p>Ruik: /* AMD Fam11h */</p>
<hr />
<div></div>Ruikhttps://www.coreboot.org/index.php?title=Board:asus/f2a85-m&diff=11753Board:asus/f2a85-m2013-04-09T21:52:10Z<p>Ruik: /* Notes */</p>
<hr />
<div>== Status ==<br />
<br />
<br />
=== Notes ===<br />
<br />
* The ASUS F2A85-M CSM is same as F2A85-M.<br />
* get VGA from original bios using this:<br />
* Add VGA bios in the menuconfig<br />
* If you use PS/2 de-select legacy free<br />
* De-select running option ROMs, leave this to Seabios<br />
* Use seabios as payload<br />
* Hotswapping has some issues (most likely USB3, disable it in orig bios before hot-flashing to coreboot). Drop a mail to mailing list if you have issues.<br />
<br />
=== TODOs ===<br />
* test virtualization<br />
* test HDMI<br />
* update VERB tables<br />
* test suspend<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = <br />
|CPU_L1_status = OK<br />
|CPU_L1_comments = <br />
|CPU_L2_status = OK<br />
|CPU_L2_comments = <br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = OK<br />
|CPU_multicore_status = OK<br />
|CPU_multicore_comments = <br />
|CPU_virt_status = Untested<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = N/A<br />
|RAM_DDR3_status = OK <br />
|RAM_DDR3_comments = Please select right voltage in menuconfig! Default is 1.5V but some DIMMs need more or less!<br />
|RAM_dualchannel_status = OK<br />
|RAM_ecc_status = N/A<br />
|RAM_ecc_comments =<br />
<br />
|IDE_status = N/A<br />
|IDE_comments = <br />
|IDE_25_status = N/A<br />
|IDE_CF_status = N/A<br />
|CDROM_DVD_status = Untested<br />
|SATA_status = OK<br />
|SATA_comments = Tested only first top port on left in sixpack (from outside view).<br />
|USB_status = Untested<br />
|USB_comments = <br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = HDMI untested<br />
|Onboard_ethernet_status = OK<br />
|Onboard_audio_status = Untested<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = N/A<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = OK<br />
|PCIE_x1_status = OK<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = OK<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = OK<br />
|PCIE_x16_comments = <br />
|PCIE_x32_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = Untested<br />
|COM1_status = OK<br />
|COM2_status = N/A<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = Untested<br />
|PP_status = N/A<br />
|PP_comments = <br />
|Game_port_status = N/A<br />
|IR_status = ?<br />
|Speaker_status = ?<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = Untested<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = OK<br />
|CPUfreq_comments = <br />
|Powersave_status = ?<br />
|ACPI_status = OK<br />
|ACPI_comments = ACPI power button event works, suspend untested.<br />
|Reboot_status = OK<br />
|Poweroff_status = OK<br />
|LEDs_status = Unknown<br />
|HPET_status = OK<br />
|RNG_status = ?<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
<br />
}}</div>Ruikhttps://www.coreboot.org/index.php?title=Board:asus/f2a85-m&diff=11752Board:asus/f2a85-m2013-04-09T21:50:26Z<p>Ruik: /* TODOs */</p>
<hr />
<div>== Status ==<br />
<br />
<br />
=== Notes ===<br />
<br />
* get VGA from original bios using this:<br />
* Add VGA bios in the menuconfig<br />
* If you use PS/2 de-select legacy free<br />
* De-select running option ROMs, leave this to Seabios<br />
* Use seabios as payload<br />
* Hotswapping has some issues (most likely USB3, disable it in orig bios before hot-flashing to coreboot). Drop a mail to mailing list if you have issues.<br />
<br />
=== TODOs ===<br />
* test virtualization<br />
* test HDMI<br />
* update VERB tables<br />
* test suspend<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = <br />
|CPU_L1_status = OK<br />
|CPU_L1_comments = <br />
|CPU_L2_status = OK<br />
|CPU_L2_comments = <br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = OK<br />
|CPU_multicore_status = OK<br />
|CPU_multicore_comments = <br />
|CPU_virt_status = Untested<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = N/A<br />
|RAM_DDR3_status = OK <br />
|RAM_DDR3_comments = Please select right voltage in menuconfig! Default is 1.5V but some DIMMs need more or less!<br />
|RAM_dualchannel_status = OK<br />
|RAM_ecc_status = N/A<br />
|RAM_ecc_comments =<br />
<br />
|IDE_status = N/A<br />
|IDE_comments = <br />
|IDE_25_status = N/A<br />
|IDE_CF_status = N/A<br />
|CDROM_DVD_status = Untested<br />
|SATA_status = OK<br />
|SATA_comments = Tested only first top port on left in sixpack (from outside view).<br />
|USB_status = Untested<br />
|USB_comments = <br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = HDMI untested<br />
|Onboard_ethernet_status = OK<br />
|Onboard_audio_status = Untested<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = N/A<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = OK<br />
|PCIE_x1_status = OK<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = OK<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = OK<br />
|PCIE_x16_comments = <br />
|PCIE_x32_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = Untested<br />
|COM1_status = OK<br />
|COM2_status = N/A<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = Untested<br />
|PP_status = N/A<br />
|PP_comments = <br />
|Game_port_status = N/A<br />
|IR_status = ?<br />
|Speaker_status = ?<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = Untested<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = OK<br />
|CPUfreq_comments = <br />
|Powersave_status = ?<br />
|ACPI_status = OK<br />
|ACPI_comments = ACPI power button event works, suspend untested.<br />
|Reboot_status = OK<br />
|Poweroff_status = OK<br />
|LEDs_status = Unknown<br />
|HPET_status = OK<br />
|RNG_status = ?<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
<br />
}}</div>Ruikhttps://www.coreboot.org/index.php?title=Board:asus/f2a85-m&diff=11748Board:asus/f2a85-m2013-04-09T21:39:04Z<p>Ruik: /* TODOs */</p>
<hr />
<div>== Status ==<br />
<br />
<br />
=== TODOs ===<br />
* test virtualization<br />
* test HDMI<br />
* update VERB tables<br />
* test suspend<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = <br />
|CPU_L1_status = OK<br />
|CPU_L1_comments = <br />
|CPU_L2_status = OK<br />
|CPU_L2_comments = <br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = OK<br />
|CPU_multicore_status = OK<br />
|CPU_multicore_comments = <br />
|CPU_virt_status = Untested<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = N/A<br />
|RAM_DDR3_status = OK <br />
|RAM_DDR3_comments = Please select right voltage in menuconfig! Default is 1.5V but some DIMMs need more or less!<br />
|RAM_dualchannel_status = OK<br />
|RAM_ecc_status = N/A<br />
|RAM_ecc_comments =<br />
<br />
|IDE_status = N/A<br />
|IDE_comments = <br />
|IDE_25_status = N/A<br />
|IDE_CF_status = N/A<br />
|CDROM_DVD_status = Untested<br />
|SATA_status = OK<br />
|SATA_comments = Tested only first top port on left in sixpack (from outside view).<br />
|USB_status = Untested<br />
|USB_comments = <br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = HDMI untested<br />
|Onboard_ethernet_status = OK<br />
|Onboard_audio_status = Untested<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = N/A<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = OK<br />
|PCIE_x1_status = OK<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = OK<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = OK<br />
|PCIE_x16_comments = <br />
|PCIE_x32_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = Untested<br />
|COM1_status = OK<br />
|COM2_status = N/A<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = Untested<br />
|PP_status = N/A<br />
|PP_comments = <br />
|Game_port_status = N/A<br />
|IR_status = ?<br />
|Speaker_status = ?<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = Untested<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = OK<br />
|CPUfreq_comments = <br />
|Powersave_status = ?<br />
|ACPI_status = OK<br />
|ACPI_comments = ACPI power button event works, suspend untested.<br />
|Reboot_status = OK<br />
|Poweroff_status = OK<br />
|LEDs_status = Unknown<br />
|HPET_status = OK<br />
|RNG_status = ?<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
<br />
}}</div>Ruikhttps://www.coreboot.org/index.php?title=Board:asus/f2a85-m&diff=11746Board:asus/f2a85-m2013-04-09T21:37:53Z<p>Ruik: /* TODOs */</p>
<hr />
<div>== Status ==<br />
<br />
<br />
=== TODOs ===<br />
* why linux complains about PCI pref mem?<br />
* test virtualization<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = <br />
|CPU_L1_status = OK<br />
|CPU_L1_comments = <br />
|CPU_L2_status = OK<br />
|CPU_L2_comments = <br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = OK<br />
|CPU_multicore_status = OK<br />
|CPU_multicore_comments = <br />
|CPU_virt_status = Untested<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = N/A<br />
|RAM_DDR3_status = OK <br />
|RAM_DDR3_comments = Please select right voltage in menuconfig! Default is 1.5V but some DIMMs need more or less!<br />
|RAM_dualchannel_status = OK<br />
|RAM_ecc_status = N/A<br />
|RAM_ecc_comments =<br />
<br />
|IDE_status = N/A<br />
|IDE_comments = <br />
|IDE_25_status = N/A<br />
|IDE_CF_status = N/A<br />
|CDROM_DVD_status = Untested<br />
|SATA_status = OK<br />
|SATA_comments = Tested only first top port on left in sixpack (from outside view).<br />
|USB_status = Untested<br />
|USB_comments = <br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = HDMI untested<br />
|Onboard_ethernet_status = OK<br />
|Onboard_audio_status = Untested<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = N/A<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = OK<br />
|PCIE_x1_status = OK<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = OK<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = OK<br />
|PCIE_x16_comments = <br />
|PCIE_x32_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = Untested<br />
|COM1_status = OK<br />
|COM2_status = N/A<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = Untested<br />
|PP_status = N/A<br />
|PP_comments = <br />
|Game_port_status = N/A<br />
|IR_status = ?<br />
|Speaker_status = ?<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = Untested<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = OK<br />
|CPUfreq_comments = <br />
|Powersave_status = ?<br />
|ACPI_status = OK<br />
|ACPI_comments = ACPI power button event works, suspend untested.<br />
|Reboot_status = OK<br />
|Poweroff_status = OK<br />
|LEDs_status = Unknown<br />
|HPET_status = OK<br />
|RNG_status = ?<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
<br />
}}</div>Ruik