Difference between revisions of "Board:asus/a8n sli"

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(Template page for the ASUS A8N-SLI Deluxe.)
 
(Building coreboot)
(14 intermediate revisions by 2 users not shown)
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This HOWTO explains how to use coreboot on the '''[http://www.asus.com/product.aspx?P_ID=e1h9yUaMZAsTwIEN&templete=2 A8N-SLI Deluxe]''' board.
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This HOWTO explains how to use coreboot on the '''[http://www.asus.com/product.aspx?P_ID=J9FKa8z2xVId3pDK A8N-SLI]''' board.
  
 
== Status ==
 
== Status ==
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|RAM_SDRAM_status = N/A
 
|RAM_SDRAM_status = N/A
 
|RAM_SODIMM_status = N/A
 
|RAM_SODIMM_status = N/A
|RAM_DDR_status =  
+
|RAM_DDR_status = WIP
|RAM_DDR_comments =  
+
|RAM_DDR_comments = See known Issues, only DIMMs A2_B2 or B2 will allow boot.
 
|RAM_DDR2_status = N/A
 
|RAM_DDR2_status = N/A
 
|RAM_DDR3_status = N/A
 
|RAM_DDR3_status = N/A
Line 35: Line 35:
 
|CDROM_DVD_comments =  
 
|CDROM_DVD_comments =  
 
|SATA_status = WIP
 
|SATA_status = WIP
|SATA_comments =  
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|SATA_comments = See known Issues, Only SATA port 3 is tested as working
 
|USB_status =  
 
|USB_status =  
 
|USB_comments =  
 
|USB_comments =  
Line 50: Line 50:
 
|ISA_cards_status = N/A
 
|ISA_cards_status = N/A
 
|AMR_cards_status = N/A
 
|AMR_cards_status = N/A
|PCI_cards_status =  
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|PCI_cards_status = No
|PCI_cards_comments =  
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|PCI_cards_comments = see known issues
 
|Mini_PCI_cards_status = N/A
 
|Mini_PCI_cards_status = N/A
 
|PCIX_cards_status = N/A
 
|PCIX_cards_status = N/A
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|PCIE_x4_status = Untested
 
|PCIE_x4_status = Untested
 
|PCIE_x8_status = N/A
 
|PCIE_x8_status = N/A
|PCIE_x16_status =  
+
|PCIE_x16_status = WIP
|PCIE_x16_comments =  
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|PCIE_x16_comments = Will boot with a card in PCIEX16_1, if card outputs to screen is untested
 
|PCIE_x32_status = N/A
 
|PCIE_x32_status = N/A
 
|HTX_status = N/A
 
|HTX_status = N/A
Line 99: Line 99:
 
|WakeOnKeyboard_status = Untested
 
|WakeOnKeyboard_status = Untested
 
|WakeOnMouse_status = Untested
 
|WakeOnMouse_status = Untested
|Flashrom_status =  
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|Flashrom_status = OK
 
|Flashrom_comments =  
 
|Flashrom_comments =  
  
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== Building coreboot ==
 
== Building coreboot ==
  
Note: you can use the same target as for the [[ASUS A8N-E]] board. At the time of writing there's no specific target for the ASUS A8N-SLI Deluxe.
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Note: you can use the same target as for the [[ASUS A8N-E]] board. At the time of writing there's no specific target for the ASUS A8N-SLI.
  
$ svn co svn://coreboot.org/repos/trunk/coreboot-v2
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See the [[Build HOWTO]] for information on how to build coreboot for this board.
$ cd coreboot-v2/targets
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$ ./buildtarget asus/a8n_e
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$ cd asus/a8n_e/asus_a8n_e
+
  
Now place your payload in this directory and name it '''payload.elf'''. Complete the build with:
+
== Known issues ==
  
$ make
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* The MAC address is stored in flash for almost all CK804/MCP55 boards. All of these boards flashed with coreboot probably have the same MAC address. See '''src/southbridge/nvidia/ck804/romstrap.inc''' and '''src/southbridge/nvidia/mcp55/romstrap.inc''' for details. On some of these boards, the MAC address is stored in a separate EEPROM, but you can't count on that.
  
The resulting '''coreboot.rom''' file (512 KB) can now be flashed using e.g. [[flashrom]].
+
* halt -p / shutdown -P fails due to no acpi
  
== Known issues ==
+
* possible issue if PCI card in PCI_1 causing hang
  
* The MAC address is stored in flash for almost all CK804/MCP55 boards. All of these boards flashed with coreboot probably have the same MAC address. See '''src/southbridge/nvidia/ck804/romstrap.inc''' and '''src/southbridge/nvidia/mcp55/romstrap.inc''' for details. On some of these boards, the MAC address is stored in a separate EEPROM, but you can't count on that.
+
* SATA ports 1 and 2 will not allow disk to be found SATA port 3 works and 4 is untested.
 +
 
 +
=== RAM ===
 +
* 512mb ram, DIMM A1 ( 1x512mb ) - Boots
 +
* 512mb ram, DIMM A2 ( 1x512mb ) - Hangs
 +
* 512mb ram, DIMM B1 ( 1x512mb ) - Hangs
 +
* 512mb ram, DIMM B2 ( 1x512mb ) - Hangs
 +
* 1gb ram, DIMMs A2_B2 ( 2x512mb ) - Boots
 +
* 1.5Gb Ram, DIMMS A2_B2_B1 (3x512Mb) - Hangs on Ram2.00
 +
* 1.5Gb Ram, DIMMS A2_B2_A1 (3x512Mb) - Hangs on Ram2.00
 +
* 1.5Gb Ram, DIMMS A2_B2_B1_A1 (4x512Mb) - Hangs on Ram2.00
  
 
If you can help out with this, please join the [[Mailinglist|mailing list]] and let us know!
 
If you can help out with this, please join the [[Mailinglist|mailing list]] and let us know!
  
 
{{PD-self}}
 
{{PD-self}}

Revision as of 08:20, 5 May 2010

This HOWTO explains how to use coreboot on the A8N-SLI board.

Status

Device/functionality Status Comments
CPU
CPU works OK Tested: TODO
L1 cache enabled OK CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line)
L2 cache enabled OK CPU: L2 Cache: 512K (64 bytes/line)
L3 cache enabled N/A
Multiple CPU support N/A
Multi-core support Untested
Hardware virtualization N/A
RAM
EDO N/A
SDRAM N/A
SO-DIMM N/A
DDR WIP See known Issues, only DIMMs A2_B2 or B2 will allow boot.
DDR2 N/A
DDR3 N/A
Dual channel support Untested
ECC support Untested
On-board Hardware
On-board IDE 3.5"
On-board IDE 2.5" N/A
On-board SATA WIP See known Issues, Only SATA port 3 is tested as working
On-board SCSI Unknown
On-board USB
On-board VGA N/A
On-board ethernet
On-board audio WIP This is being worked on.
On-board modem N/A
On-board FireWire N/A
On-board smartcard reader N/A
On-board CompactFlash N/A
On-board PCMCIA N/A
Add-on slots/cards
ISA add-on cards N/A
Audio/Modem-Riser (AMR/CNR) cards N/A
PCI add-on cards No see known issues
Mini-PCI add-on cards N/A
PCI-X add-on cards N/A
AGP graphics cards N/A
PCI Express x1 add-on cards
PCI Express x2 add-on cards N/A
PCI Express x4 add-on cards Untested
PCI Express x8 add-on cards N/A
PCI Express x16 add-on cards WIP Will boot with a card in PCIEX16_1, if card outputs to screen is untested
PCI Express x32 add-on cards N/A
HTX add-on cards N/A
Legacy / Super I/O
Floppy WIP
Serial port 1 (COM1) OK
Serial port 2 (COM2) N/A
Parallel port
PS/2 keyboard
PS/2 mouse
Game port WIP
Infrared N/A
PC speaker
DiskOnChip N/A
Miscellaneous
Sensors / fan control
Hardware watchdog N/A
SMBus Unknown
CAN bus N/A
CPU frequency scaling No Needs (at least partial) ACPI support.
Other powersaving features N/A
ACPI No There's no ACPI implementation for this board.
Reboot
Poweroff
Suspend Unknown
Nonstandard LEDs
High precision event timers (HPET)
Random number generator (RNG) N/A
Wake on modem ring Untested
Wake on LAN
Wake on keyboard Untested
Wake on mouse Untested
Flashrom OK

Building coreboot

Note: you can use the same target as for the ASUS A8N-E board. At the time of writing there's no specific target for the ASUS A8N-SLI.

See the Build HOWTO for information on how to build coreboot for this board.

Known issues

  • The MAC address is stored in flash for almost all CK804/MCP55 boards. All of these boards flashed with coreboot probably have the same MAC address. See src/southbridge/nvidia/ck804/romstrap.inc and src/southbridge/nvidia/mcp55/romstrap.inc for details. On some of these boards, the MAC address is stored in a separate EEPROM, but you can't count on that.
  • halt -p / shutdown -P fails due to no acpi
  • possible issue if PCI card in PCI_1 causing hang
  • SATA ports 1 and 2 will not allow disk to be found SATA port 3 works and 4 is untested.

RAM

  • 512mb ram, DIMM A1 ( 1x512mb ) - Boots
  • 512mb ram, DIMM A2 ( 1x512mb ) - Hangs
  • 512mb ram, DIMM B1 ( 1x512mb ) - Hangs
  • 512mb ram, DIMM B2 ( 1x512mb ) - Hangs
  • 1gb ram, DIMMs A2_B2 ( 2x512mb ) - Boots
  • 1.5Gb Ram, DIMMS A2_B2_B1 (3x512Mb) - Hangs on Ram2.00
  • 1.5Gb Ram, DIMMS A2_B2_A1 (3x512Mb) - Hangs on Ram2.00
  • 1.5Gb Ram, DIMMS A2_B2_B1_A1 (4x512Mb) - Hangs on Ram2.00

If you can help out with this, please join the mailing list and let us know!

Public domain I, the copyright holder of this work, hereby release it into the public domain. This applies worldwide.

In case this is not legally possible:
I grant anyone the right to use this work for any purpose, without any conditions, unless such conditions are required by law.