ASUS A8N5X - Revision history

Stepan: /* Building coreboot */

2010-05-05T08:22:29Z

‎Building coreboot

Stepan: /* Building coreboot */

2009-10-30T18:48:00Z

‎Building coreboot

Uwe: Drop incorrect photo.

2009-05-31T23:11:56Z

Drop incorrect photo.

Uwe at 14:34, 11 December 2008

2008-12-11T14:34:28Z

RobertMillan: CD/DVD ok

2008-11-21T19:49:53Z

CD/DVD ok

RobertMillan: speaker & hpet OK

2008-11-20T23:21:19Z

speaker & hpet OK

RobertMillan: adjustments for A8N5X

2008-11-20T21:26:31Z

adjustments for A8N5X

RobertMillan: start afresh with a copy of its sister board

2008-11-20T21:03:31Z

start afresh with a copy of its sister board

New page

[[Image:Asus a8n e.jpg|right|thumb|ASUS A8N-E, rev. 2.00]]

This HOWTO explains how to use coreboot on the '''[http://www.asus.com.tw/products.aspx?l1=3&l2=15&l3=171&l4=0&model=455&modelmenu=2 ASUS A8N-E]''' board.

== Status ==

{{Status|

|CPU_status = OK
|CPU_comments = Tested: AMD Athlon(tm) 64 Processor 3000+.
|CPU_L1_status = OK
|CPU_L1_comments = CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line)
|CPU_L2_status = OK
|CPU_L2_comments = CPU: L2 Cache: 512K (64 bytes/line)
|CPU_L3_status = N/A
|CPU_multiple_status = N/A
|CPU_multicore_status = Untested
|CPU_virt_status = N/A

|RAM_EDO_status = N/A
|RAM_SDRAM_status = N/A
|RAM_SODIMM_status = N/A
|RAM_DDR_status = OK
|RAM_DDR_comments = Tested with one DIMM in slot DIMM_B1 (see manual). Since [http://tracker.coreboot.org/trac/coreboot/changeset/3614 r3614] it's also possible to use a single DIMM in slot DIMM_B2.
|RAM_DDR2_status = N/A
|RAM_DDR3_status = N/A
|RAM_dualchannel_status = Untested
|RAM_ecc_status = Untested
|RAM_ecc_comments = The board supports ECC according to the manual.

|IDE_status = OK
|IDE_comments = Tested: Primary IDE (master and slave) and secondary IDE (master and slave).
|IDE_25_status = N/A
|IDE_CF_status = OK
|IDE_CF_comments = Tested: Primary IDE (master and slave) and secondary IDE (master and slave).
|CDROM_DVD_status = OK
|CDROM_DVD_comments = Tested: Mounting a CD-ROM from the Linux command line. The '''eject''' command line tool also works fine.
|SATA_status = WIP
|SATA_comments = Port 3 ('''hde''' in FILO) and 4 ('''hdg''' in FILO) on the board work fine. Port 1 and 2 don't seem to work, this is being investigated.
|USB_status = OK
|USB_comments = Tested: USB keyboard (on each of the 10 possible USB ports).
|Onboard_VGA_status = N/A
|Onboard_ethernet_status = OK
|Onboard_audio_status = WIP
|Onboard_audio_comments = This is being worked on.
|Onboard_modem_status = N/A
|Onboard_firewire_status = N/A
|Smartcard_status = N/A
|Onboard_CF_status = N/A
|Onboard_PCMCIA_status = N/A

|ISA_cards_status = N/A
|AMR_cards_status = N/A
|PCI_cards_status = OK
|PCI_cards_comments = Tested: PCI VGA card in all three PCI slots.
|AGP_cards_status = N/A
|PCIE_x1_status = OK
|PCIE_x1_comments = Both PCIe x1 slots works fine (tested with a network card).
|PCIE_x2_status = N/A
|PCIE_x4_status = Untested
|PCIE_x8_status = N/A
|PCIE_x16_status = WIP
|PCIE_x16_comments = Doesn't seem to work, yet (?)
|PCIE_x32_status = N/A
|HTX_status = N/A

|Floppy_status = WIP
|COM1_status = OK
|COM2_status = N/A
|PP_status = OK
|PP_comments = Tested: '''modprobe ppdev''', further tests were not performed.
|PS2_keyboard_status = OK
|PS2_keyboard_comments = Works since [http://tracker.coreboot.org/trac/coreboot/changeset/3610 r3610],
|PS2_mouse_status = OK
|PS2_mouse_comments = Works since [http://tracker.coreboot.org/trac/coreboot/changeset/3610 r3610],
|Game_port_status = WIP
|IR_status = N/A
|Speaker_status = OK
|DiskOnChip_status = N/A

|Sensors_status = OK
|Sensors_comments = Tested: '''sensors''' reports K8 core temp. (kernel module '''k8temp''') and various other values from the IT8712F Super I/O (kernel module '''it87''').
|Watchdog_status = N/A
|CAN_bus_status = N/A
|CPUfreq_status = No
|CPUfreq_comments = Needs (at least partial) ACPI support.
|Powersave_status = N/A
|ACPI_status = No
|ACPI_comments = There's no ACPI implementation for this board.
|Reboot_status = OK
|Poweroff_status = No
|LEDs_status = OK
|LEDs_comments = There's a green LED on the board which is enabled when the board is powered-on. Works out of the box, no special coreboot support required.
|HPET_status = OK
|HPET_comments = The hardware [http://lkml.org/lkml/2007/10/19/226 supports it], but you currently need the '''hpet=force''' Linux kernel parameter. Reduces the number of wakeups in powertop ''drastically''.
|RNG_status = N/A
|WakeOnModem_status = Untested
|WakeOnLAN_status = N/A
|WakeOnLAN_comments = The on-board ethernet device doesn't seem to support WOL (also not mentioned in the manual).
|WakeOnKeyboard_status = Untested
|WakeOnMouse_status = Untested
|Flashrom_status = OK
|Flashrom_comments = Works fine when booted with BIOS and also with coreboot.

}}

== Building coreboot ==

$ svn co svn://coreboot.org/repos/trunk/coreboot-v2
$ cd coreboot-v2/targets
$ ./buildtarget asus/a8n_e
$ cd asus/a8n_e/asus_a8n_e

Now place your payload in this directory and name it '''payload.elf'''. Complete the build with:

$ make

The resulting '''coreboot.rom''' file (512 KB) can now be flashed using e.g. [[flashrom]].

== Known issues ==

* The MAC address is stored in flash for almost all CK804/MCP55 boards. All of these boards flashed with coreboot probably have the same MAC address. See '''src/southbridge/nvidia/ck804/romstrap.inc''' and '''src/southbridge/nvidia/mcp55/romstrap.inc''' for details. On some of these boards, the MAC address is stored in a separate EEPROM, but you can't count on that.

If you can help out with this, please join the [[Mailinglist|mailing list]] and let us know!

{{GPL}}

@@ Line 1: / Line 1: @@
 This HOWTO explains how to use coreboot on the '''[http://www.asus.com/products.aspx?modelmenu=1&model=596&l1=3&l2=15&l3=207 ASUS A8N5X]''' board.
@@ Line 53: / Line 51: @@
 |PCI_cards_status = No
 |PCI_cards_comments = Plugging any PCI card almost always result in crash when something attempts to access the PCI bus (although, specific cards were found not to produce this error, YMMV)
 |AGP_cards_status = N/A
 |PCIE_x1_status = Untested

@@ Line 3: / Line 3: @@
 This HOWTO explains how to use coreboot on the '''[http://www.asus.com/products.aspx?modelmenu=1&model=596&l1=3&l2=15&l3=207 ASUS A8N5X]''' board.
-As of 2008-11-20, a [http://www.coreboot.org/pipermail/coreboot/2008-November/042305.html small patch] is needed for ram access to work properly.
+As of 2008-11-20, a [http://www.coreboot.org/pipermail/coreboot/2008-November/042305.html small patch] is needed for RAM access to work properly.
 == Status ==
@@ Line 100: / Line 100: @@
 == Building coreboot ==
-Note: you can use the same target as for A8N_E boards.  At the time of writing there's no specific target for A8N5X.
+Note: you can use the same target as for the [[ASUS A8N-E]] board. At the time of writing there's no specific target for the ASUS A8N5X.
   $ svn co svn://coreboot.org/repos/trunk/coreboot-v2

@@ Line 35: / Line 35: @@
 |IDE_25_status = N/A
 |IDE_CF_status = Untested
-|CDROM_DVD_status = Untested
+|CDROM_DVD_status = OK
 |SATA_status = Untested
 |USB_status = OK

@@ Line 102: / Line 102: @@
 Note: you can use the same target as for the [[ASUS A8N-E]] board. At the time of writing there's no specific target for the ASUS A8N5X.
- $ svn co svn://coreboot.org/coreboot/trunk coreboot
+See the [[Build HOWTO]] for information on how to build coreboot for this board.
- $ cd coreboot/targets
- $ ./buildtarget asus/a8n_e
- $ cd asus/a8n_e/asus_a8n_e
-−
-Now place your payload in this directory and name it '''payload.elf'''. Complete the build with:
-−
- $ make
-−
-The resulting '''coreboot.rom''' file (512 KB) can now be flashed using e.g. [[flashrom]].
 == Known issues ==

@@ Line 72: / Line 72: @@
 |Game_port_status = Untested
 |IR_status = Untested
-|Speaker_status = Untested
+|Speaker_status = OK
 |DiskOnChip_status = N/A
@@ Line 86: / Line 86: @@
 |LEDs_status = OK
 |LEDs_comments = There's a green LED on the board which is enabled when the board is powered-on. Works out of the box, no special coreboot support required.
-|HPET_status = Untested
+|HPET_status = OK
 |RNG_status = N/A
 |WakeOnModem_status = Untested

@@ Line 1: / Line 1: @@
-[[Image:Asus a8n e.jpg|right|thumb|ASUS A8N-E, rev. 2.00]]
+[[Image:Asus a8n e.jpg|right|thumb|ASUS A8N-E, rev. 2.00 (no picture for A8N5X available, but it is almost identical)]]
-This HOWTO explains how to use coreboot on the '''[http://www.asus.com.tw/products.aspx?l1=3&l2=15&l3=171&l4=0&model=455&modelmenu=2 ASUS A8N-E]''' board.
+This HOWTO explains how to use coreboot on the '''[http://www.asus.com/products.aspx?modelmenu=1&model=596&l1=3&l2=15&l3=207 ASUS A8N5X]''' board.
 == Status ==
@@ Line 8: / Line 10: @@
 |CPU_status = OK
-|CPU_comments = Tested: AMD Athlon(tm) 64 Processor 3000+.
+|CPU_comments = Tested: AMD Athlon(tm) 64 Processor 3500+.
 |CPU_L1_status = OK
-|CPU_L1_comments = CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line)
+|CPU_L1_comments = CPU: L1 Cache: 128K
 |CPU_L2_status = OK
-|CPU_L2_comments = CPU: L2 Cache: 512K (64 bytes/line)
+|CPU_L2_comments = CPU: L2 Cache: 512K
 |CPU_L3_status = N/A
 |CPU_multiple_status = N/A
@@ Line 22: / Line 24: @@
 |RAM_SODIMM_status = N/A
 |RAM_DDR_status = OK
-|RAM_DDR_comments = Tested with one DIMM in slot DIMM_B1 (see manual). Since [http://tracker.coreboot.org/trac/coreboot/changeset/3614 r3614] it's also possible to use a single DIMM in slot DIMM_B2.
+|RAM_DDR_comments = Tested with one DIMM in slot DIMM_B1 (see manual), and with two DIMMs in slots DIMM_B1 and DIMM_B2.
 |RAM_DDR2_status = N/A
 |RAM_DDR3_status = N/A
@@ Line 30: / Line 32: @@
 |IDE_status = OK
-|IDE_comments = Tested: Primary IDE (master and slave) and secondary IDE (master and slave).
+|IDE_comments = Tested: Primary IDE (master).
 |IDE_25_status = N/A
-|IDE_CF_status = OK
+|IDE_CF_status = Untested
-|IDE_CF_comments = Tested: Primary IDE (master and slave) and secondary IDE (master and slave).
+|CDROM_DVD_status = Untested
-|CDROM_DVD_status = OK
+|SATA_status = Untested
-|CDROM_DVD_comments = Tested: Mounting a CD-ROM from the Linux command line. The '''eject''' command line tool also works fine.
-|SATA_status = WIP
-|SATA_comments = Port 3 ('''hde''' in FILO) and 4 ('''hdg''' in FILO) on the board work fine. Port 1 and 2 don't seem to work, this is being investigated.
 |USB_status = OK
-|USB_comments = Tested: USB keyboard (on each of the 10 possible USB ports).
+|USB_comments = Tested: USB keyboard
 |Onboard_VGA_status = N/A
 |Onboard_ethernet_status = OK
-|Onboard_audio_status = WIP
+|Onboard_audio_status = No
-|Onboard_audio_comments = This is being worked on.
+|Onboard_audio_comments = It didn't work with proprietary BIOS either (using Linux/ALSA)
 |Onboard_modem_status = N/A
 |Onboard_firewire_status = N/A
@@ Line 52: / Line 51: @@
 |ISA_cards_status = N/A
 |AMR_cards_status = N/A
-|PCI_cards_status = OK
+|PCI_cards_status = No
-|PCI_cards_comments = Tested: PCI VGA card in all three PCI slots.
+|PCI_cards_comments = Plugging any PCI card almost always result in crash when something attempts to access the PCI bus (although, specific cards were found not to produce this error, YMMV)
 |AGP_cards_status = N/A
-|PCIE_x1_status = OK
+|PCIE_x1_status = Untested
-|PCIE_x1_comments = Both PCIe x1 slots works fine (tested with a network card).
 |PCIE_x2_status = N/A
 |PCIE_x4_status = Untested
 |PCIE_x8_status = N/A
-|PCIE_x16_status = WIP
+|PCIE_x16_status = No
-|PCIE_x16_comments = Doesn't seem to work, yet (?)
+|PCIE_x16_comments = Doesn't seem to be detected
 |PCIE_x32_status = N/A
 |HTX_status = N/A
-|Floppy_status = WIP
+|Floppy_status = Untested
 |COM1_status = OK
 |COM2_status = N/A
@@ Line 71: / Line 69: @@
 |PP_comments = Tested: '''modprobe ppdev''', further tests were not performed.
 |PS2_keyboard_status = OK
-|PS2_keyboard_comments = Works since [http://tracker.coreboot.org/trac/coreboot/changeset/3610 r3610],
+|PS2_mouse_status = Untested
-|PS2_mouse_status = OK
+|Game_port_status = Untested
-|PS2_mouse_comments = Works since [http://tracker.coreboot.org/trac/coreboot/changeset/3610 r3610],
+|IR_status = Untested
-|Game_port_status = WIP
+|Speaker_status = Untested
-|IR_status = N/A
-|Speaker_status = OK
 |DiskOnChip_status = N/A
@@ Line 83: / Line 79: @@
 |Watchdog_status = N/A
 |CAN_bus_status = N/A
-|CPUfreq_status = No
+|CPUfreq_status = Untested
-|CPUfreq_comments = Needs (at least partial) ACPI support.
 |Powersave_status = N/A
-|ACPI_status = No
+|ACPI_status = Untested
-|ACPI_comments = There's no ACPI implementation for this board.
 |Reboot_status = OK
 |Poweroff_status = No
 |LEDs_status = OK
 |LEDs_comments = There's a green LED on the board which is enabled when the board is powered-on. Works out of the box, no special coreboot support required.
-|HPET_status = OK
+|HPET_status = Untested
-|HPET_comments = The hardware [http://lkml.org/lkml/2007/10/19/226 supports it], but you currently need the '''hpet=force''' Linux kernel parameter. Reduces the number of wakeups in powertop ''drastically''.
 |RNG_status = N/A
 |WakeOnModem_status = Untested
@@ Line 106: / Line 99: @@
 == Building coreboot ==
   $ svn co svn://coreboot.org/repos/trunk/coreboot-v2
@@ Line 120: / Line 115: @@
 == Known issues ==
-* The MAC address is stored in flash for almost all CK804/MCP55 boards. All of these boards flashed with coreboot probably have the same MAC address. See '''src/southbridge/nvidia/ck804/romstrap.inc''' and '''src/southbridge/nvidia/mcp55/romstrap.inc''' for details. On some of these boards, the MAC address is stored in a separate EEPROM, but you can't count on that.
+* The MAC address is stored in flash. All A8N5X boards flashed with coreboot probably have the same MAC address. See '''src/southbridge/nvidia/ck804/romstrap.inc''' for details.
 If you can help out with this, please join the [[Mailinglist|mailing list]] and let us know!
 {{GPL}}