ASUS A8V-E Deluxe - Revision history

Uwe: Updates.

2010-11-14T22:02:33Z

Updates.

Uwe at 01:19, 22 June 2009

2009-06-22T01:19:42Z

Uwe: ASUS A8V-E Deluxe Build Tutorial moved to ASUS A8V-E Deluxe

2008-11-16T14:05:09Z

ASUS A8V-E Deluxe Build Tutorial moved to ASUS A8V-E Deluxe

Uwe: /* Building coreboot */

2008-03-31T01:27:19Z

‎Building coreboot

Uwe: IDE / CDROM seems to work. Add a first boot speed test.

2008-03-31T01:24:36Z

IDE / CDROM seems to work. Add a first boot speed test.

Uwe: Use PD.

2008-03-30T01:48:43Z

Use PD.

Uwe: Patch no longer required in latest svn.

2008-03-30T01:47:27Z

Patch no longer required in latest svn.

Uwe: Add photos.

2008-03-30T01:45:51Z

Add photos.

Uwe at 01:53, 13 March 2008

2008-03-13T01:53:14Z

Uwe: Various updates.

2008-03-13T01:42:55Z

Various updates.

@@ Line 1: / Line 1: @@
-This page describes how to use coreboot on the '''[http://www.asus.com.tw/products.aspx?modelmenu=2&model=376&l1=3&l2=15&l3=143&l4=0 ASUS A8V-E Deluxe]''' mainboard. It is maintained by [[User:Uwe|Uwe Hermann]].
+This page describes how to use coreboot on the '''[http://www.asus.com/product.aspx?P_ID=hQBPIJWEZnnGAZEh ASUS A8V-E Deluxe]''' mainboard. It is maintained by [[User:Uwe|Uwe Hermann]].
 [[Image:Asus a8v e deluxe.jpg|thumb|right|The ASUS A8V-E Deluxe.]]
@@ Line 31: / Line 31: @@
 |RAM_ecc_status = Untested
-|IDE_status = OK
+|IDE_status = WIP
 |IDE_comments = Tested: Mounting an IDE disk in Linux. Booting from IDE is untested.
 |IDE_25_status = N/A
-|CDROM_DVD_status = OK
+|SATA_status = WIP
-|CDROM_DVD_comments = Tested: Mounting a CD-ROM in Linux. Booting from CD-ROM is untested.
-|SATA_status = OK
 |SATA_comments = Tested: SATA port 1 (hda in [[FILO]]). SATA port 2 doesn't seem to work, yet.
 |USB_status = OK
@@ Line 147: / Line 143: @@
              +-18.2  Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller [1022:1102]
              \-18.3  Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control [1022:1103]
 == Booting coreboot ==

@@ Line 50: / Line 50: @@
 |Onboard_CF_status = N/A
 |Onboard_PCMCIA_status = N/A
 |ISA_cards_status = N/A
 |AMR_cards_status = N/A
 |AGP_cards_status = N/A
 |PCI_cards_status = OK
 |PCI_cards_comments = Tested: PCI VGA card in all 3 PCI slots.
 |PCIE_x1_status = OK
-|PCIE_x1_comments = Tested: PCI Express x1 network card in the first slot (nearer to CPU). Not sure if the other slot works ok.
+|PCIE_x1_comments = Tested: PCI Express x1 network card in the first slot (nearer to CPU). Not sure if the other slot works OK.
 |PCIE_x2_status = N/A
 |PCIE_x4_status = N/A

@@ Line 152: / Line 152: @@
   $ cd target
-  $ ./buildtarget asus/a8v-e_se && cd asus/a8v-e_se/asus_a8v-e_se && make
+  $ ./buildtarget asus/a8v-e_se
 The resulting '''coreboot.rom''' (512 KB) can now be [[Flashrom|flashed]] on a ROM chip.

@@ Line 25: / Line 25: @@
 |RAM_SODIMM_status = N/A
 |RAM_DDR_status = OK
-|RAM_DDR_comments = Tested: one 256 MB DIMM in slot DIMM_B1 (see manual).
+|RAM_DDR_comments = Tested: One 256 MB DIMM in slot DIMM_B1 (see manual).
 |RAM_DDR2_status = N/A
 |RAM_DDR3_status = N/A
@@ Line 31: / Line 31: @@
 |RAM_ecc_status = Untested
-|IDE_status = WIP
+|IDE_status = OK
-|IDE_comments = Doesn't seem to work, yet.
+|IDE_comments = Tested: Mounting an IDE disk in Linux. Booting from IDE is untested.
-|IDE_CF_status = WIP
+|IDE_CF_status = OK
-|IDE_CF_comments = Doesn't seem to work, yet.
+|IDE_CF_comments = Tested: Mounting the CompactFlash (via CF-to-IDE adapter) card in Linux. Booting from CF/IDE is untested.
 |IDE_25_status = N/A
-|CDROM_DVD_status = Untested
+|CDROM_DVD_status = OK
 |SATA_status = OK
 |SATA_comments = Tested: SATA port 1 (hda in [[FILO]]). SATA port 2 doesn't seem to work, yet.
@@ Line 75: / Line 76: @@
 |Game_port_status = OK
 |Game_port_comments = Works fine after '''modprobe analog''' and '''modprobe ns558'''. Tested using '''jscalibrator'''.
-|IR_status =
+|IR_status = N/A
 |Speaker_status = OK
 |DiskOnChip_status = N/A
@@ Line 166: / Line 167: @@
 == Comparing boot time ==
-TODO.
+This is an ad-hoc test with pretty much no attempts at optimizing boot-times.
 {| border="0" style="font-size: smaller"
@@ Line 172: / Line 178: @@
 ! align="left" | BIOS
 ! align="left" | Power up &mdash; OS loader
 ! align="left" | Linux &mdash; shell
 ! align="left" | Summary
@@ Line 178: / Line 183: @@
 |- bgcolor="#eeeeee"
 | Vendor BIOS (boot from SATA disk)
-| ?
+| 24s
-| ?
+| 24s
-| ?
+| 48s
-| ?
 |- bgcolor="#eeeeee"
 | coreboot (boot from SATA disk)
-| ?
+| 9s
-| ?
+| 24s
-| ?
+| 33s
-| ?
 |}
 {{PD-self}}

← Older revision		Revision as of 01:48, 30 March 2008
Line 192:		Line 192:
	\|}		\|}

−	{{~~GPL~~}}	+	{{PD-self}}

@@ Line 148: / Line 148: @@
 Currently there is no special target for the ASUS A8V-E Deluxe in coreboot. Instead, we use the ASUS A8V-E SE target.
-You have to apply the following patch to svn so the board boots (at least when using a Sempron CPU which doesn't seem to support an LDT frequency of 1000MHz):
+First, place your [[Payloads|payload]] (usually [[FILO]]) into '''/tmp/filo.elf''' and build coreboot as usual:
-−
-<pre>
-Index: src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c
-===================================================================
---- src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c     (revision 3127)
-+++ src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c     (working copy)
-@@ -308,7 +308,7 @@
-        needs_reset |= optimize_link_incoherent_ht(sysinfo);
-−
-        /* Fixme it assumes that 1000MHz LDT is selected. */
--       needs_reset |= k8t890_early_setup_car(16, 0x6);
-+       needs_reset |= k8t890_early_setup_car(16, 0x5);
-−
-        if (needs_reset) {
-                print_debug("ht reset -\r\n");
-</pre>
-−
-Then, place your [[Payloads|payload]] (usually [[FILO]]) into '''/tmp/filo.elf''' and build coreboot as usual:
   $ cd target
   $ ./buildtarget asus/a8v-e_se && cd asus/a8v-e_se/asus_a8v-e_se && make
-The resulting '''coreboot.rom''' (512 KB) can now be flashed on a ROM chip.
+The resulting '''coreboot.rom''' (512 KB) can now be [[Flashrom|flashed]] on a ROM chip.
 It's possible to use a 1 MB ROM chip on this board. You'll have to change '''ROM_SIZE''' in '''targets/asus/a8v-e_se/Config.lb''' to make '''coreboot.rom''' bigger for that.

← Older revision		Revision as of 01:45, 30 March 2008
Line 1:		Line 1:
	This page describes how to use coreboot on the '''[http://www.asus.com.tw/products.aspx?modelmenu=2&model=376&l1=3&l2=15&l3=143&l4=0 ASUS A8V-E Deluxe]''' mainboard. It is maintained by [[User:Uwe\|Uwe Hermann]].		This page describes how to use coreboot on the '''[http://www.asus.com.tw/products.aspx?modelmenu=2&model=376&l1=3&l2=15&l3=143&l4=0 ASUS A8V-E Deluxe]''' mainboard. It is maintained by [[User:Uwe\|Uwe Hermann]].
		+
		+	[[Image:Asus a8v e deluxe.jpg\|thumb\|right\|The ASUS A8V-E Deluxe.]]
		+	[[Image:Asus a8v e deluxe2.jpg\|thumb\|right\|The ASUS A8V-E Deluxe.]]
		+	[[Image:Asus a8v e deluxe bios socket.jpg\|thumb\|right\|The BIOS socket.]]

	== Status ==		== Status ==

@@ Line 83: / Line 83: @@
 |CPUfreq_comments = Doesn't work, yet.
 |Powersave_status = N/A
-|ACPI_status = WIP
+|ACPI_status = Untested
 |ACPI_comments = Exact status unknown/untested. Originally implemented for ASUS A8V-E SE, might need some changes. Reboot and poweroff do work ok, though.
 |Reboot_status = OK
@@ Line 162: / Line 162: @@
 </pre>
-Then, place your payload (usually [[FILO]]) into '''/tmp/filo.elf''' and build coreboot as usual:
+Then, place your [[Payloads|payload]] (usually [[FILO]]) into '''/tmp/filo.elf''' and build coreboot as usual:
   $ cd target
@@ Line 168: / Line 168: @@
 The resulting '''coreboot.rom''' (512 KB) can now be flashed on a ROM chip.
 == Booting coreboot ==

@@ Line 40: / Line 40: @@
 |Onboard_ethernet_status = OK
 |Onboard_audio_status = OK
-|Onboard_modem_status =
+|Onboard_modem_status = N/A
 |Onboard_firewire_status = Untested
 |Smartcard_status = N/A
@@ Line 52: / Line 52: @@
 |PCI_cards_comments = Tested: PCI VGA card in all 3 PCI slots.
 |PCIE_x1_status = OK
-|PCIE_x1_comments = Tested: PCI Express x1 network card.
+|PCIE_x1_comments = Tested: PCI Express x1 network card in the first slot (nearer to CPU). Not sure if the other slot works ok.
 |PCIE_x2_status = N/A
 |PCIE_x4_status = N/A
@@ Line 61: / Line 61: @@
 |HTX_status = N/A
-|Floppy_status = Untested
+|Floppy_status = WIP
 |COM1_status = OK
 |COM2_status = N/A
@@ Line 75: / Line 76: @@
 |Sensors_status = OK
-|Sensors_comments = The '''k8temp''' module loads fine, the '''sensors''' tool outputs the CPU temperature correctly. The '''w83627ehf''' module (for various temperatures and fan speeds) works fine. Also, the '''eeprom''' and '''i2c-viapro'''/'''i2c-dev''' modules load fine.
+|Sensors_comments = The '''k8temp''' module loads fine, the '''sensors''' tool outputs the CPU temperature correctly. The '''w83627ehf''' module (for various temperatures and fan speeds) works fine. Also, the '''eeprom''' and '''i2c-viapro''' / '''i2c-dev''' modules load fine.
-|Watchdog_status =
+|Watchdog_status = Untested
 |CAN_bus_status = N/A
-|CPUfreq_status =
+|CPUfreq_status = WIP
-|Powersave_status =
+|CPUfreq_comments = Doesn't work, yet.
-|ACPI_status =
+|Powersave_status = N/A
 |Reboot_status = OK
 |Poweroff_status = OK
@@ Line 86: / Line 90: @@
 |LEDs_comments = There's a power-on LED on the board PCB, it lights up when the board is powered up.
 |HPET_status = OK
-|HPET_comments = The '''dmesg''' output has '''ACPI: HPET id: 0x102282a0 base: 0xfed00000''', and '''hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0''', and '''hpet0: 3 32-bit timers, 14318180 Hz''', but no further tests were performed so far.
+|HPET_comments = The '''dmesg''' output has '''ACPI: HPET id: 0x102282a0 base: 0xfed00000''', and '''hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0''', and '''hpet0: 3 32-bit timers, 14318180 Hz'''. [http://www.lesswatts.org/projects/powertop/ Powertop] reports a very good value of '''9 wake-ups-from-idle per second''', which indicates that HPET support might work ok.
-|RNG_status =
+|RNG_status = N/A
 |WakeOnModem_status = Untested
 |WakeOnLAN_status = Untested
@@ Line 93: / Line 97: @@
 |WakeOnMouse_status = Untested
 |Flashrom_status = OK
-|Flashrom_comments = Works fine with coreboot and with the proprietary BIOS.
+|Flashrom_comments = Works fine with coreboot and with the proprietary BIOS. The board/chipset/flashrom can decode 1MB chips fine.
 }}
@@ Line 103: / Line 107: @@
 * VIA VT8237R
 * Winbond W83627EHF
 '''lspci -tvnn'''
@@ Line 121: / Line 123: @@
              +-03.2-[0000:05]----00.0  Marvell Technology Group Ltd. 88E8053 PCI-E Gigabit Ethernet Controller [11ab:4362]
              +-03.3-[0000:06]--
-             +-07.0  Marvell Technology Group Ltd. 88W8310 and 88W8000G [Libertas] 802.11g client chipset [11ab:1fa7]
+             +-07.0 Marvell Technology Group Ltd. 88W8310 and 88W8000G [Libertas] 802.11g client chipset [11ab:1fa7]
-             +-08.0  Texas Instruments TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link) [104c:8023]
+             +-08.0 Texas Instruments TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link) [104c:8023]
-            +-0b.0  ATI Technologies Inc 3D Rage Pro 215GP [1002:4750]
              +-0f.0  VIA Technologies, Inc. VIA VT6420 SATA RAID Controller [1106:3149]
              +-0f.1  VIA Technologies, Inc. VT82C586A/B/VT82C686/A/B/VT823x/A/C PIPC Bus Master IDE [1106:0571]
@@ Line 175: / Line 176: @@
 * Booting from IDE doesn't yet work, I'll investigate.
 {{GPL}}