Difference between revisions of "Board:asus/a8v-e se"

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|CPU_status = OK
 
|CPU_status = OK
 
|CPU_comments = I'm using an AMD Opteron 175 Dual Core Processor, both cores do work, Opteron 144 worked too.
 
|CPU_comments = I'm using an AMD Opteron 175 Dual Core Processor, both cores do work, Opteron 144 worked too.
 +
|CPU_L1_status = OK
 +
|CPU_L1_comments =
 +
|CPU_L2_status = OK
 +
|CPU_L2_comments =
 +
|CPU_L3_status = N/A
 +
|CPU_multiple_status = N/A
 +
|CPU_multicore_status = OK
 +
|CPU_multicore_comments = Opteron 175
 +
|CPU_virt_status = Untested
 +
  
 
|RAM_EDO_status = N/A
 
|RAM_EDO_status = N/A
Line 15: Line 25:
  
 
|IDE_status = OK
 
|IDE_status = OK
 +
|IDE_comments = '''USE 80 WIRE CABLES OR ALTER CONFIGURATION!'''
 
|IDE_25_status = N/A
 
|IDE_25_status = N/A
 
|IDE_CF_status = Untested
 
|IDE_CF_status = Untested
Line 62: Line 73:
 
}}
 
}}
  
== ACPI setup HOWTO ==
+
= Motherboard hardware list =
 
+
Please have a look to files in the src/mainboard/asus/a8v-e_se. Check also the [ http://acpi.info ]
+
which contains the specification.
+
 
+
=== Setup hardware ===
+
 
+
Setup the PMIO base address to some known address, and setup the desired ACPI IRQ (usually IRQ9).
+
Sometimes it is called SCI interrupt.
+
 
+
=== Fill FADT ===
+
 
+
Now you will need to create an ACPI table which describes the I/O port location for kernel ACPI implementation. This is the FACP table. You will need to create the fadt.c file and fill in
+
the IO port values plus IRQ:
+
 
+
<pre>
+
fadt->sci_int = 9;
+
fadt->pm1a_evt_blk = VT8237R_ACPI_IO_BASE;
+
fadt->pm1b_evt_blk = 0x0;
+
fadt->pm1a_cnt_blk = VT8237R_ACPI_IO_BASE + 0x4;
+
fadt->pm1b_cnt_blk = 0x0;
+
fadt->pm2_cnt_blk = 0x0;
+
fadt->pm_tmr_blk = VT8237R_ACPI_IO_BASE + 0x8;
+
fadt->gpe0_blk = VT8237R_ACPI_IO_BASE + 0x20;
+
fadt->gpe1_blk = 0x0;
+
</pre>
+
 
+
In this example the ACPI IRQ is 9, and the PM1A event block start at VT8237R_ACPI_IO_BASE. You
+
may obtain some values from cat /proc/ioport if running with proprietary BIOS. Not all blocks
+
are necessary usually only PM1A PMTMR and GPE0 are used. Please note that this table has the IO port
+
information stored twice using different formats. Please consult the ACPI specification for details,
+
mostly could be used what are the defaults in the fadt.c
+
 
+
=== Fill DSDT ===
+
 
+
The DSDT table contains a bytecode that is executed by driver in the kernel. This table stores also
+
ACPI routing information in _PRT methods. You may add those _PRT methods later.
+
  
Very generic DSDT table would look like in similar way how it is ASUS A8V-E (dsdt.asl).
+
* AMD K8
 +
* VIA K8T890
 +
* VIA VT8237
 +
* W83627EHF
 +
* ICS ICS953202
 +
* Semtech SC2643VX
  
<pre>
+
= Motherboard GPIO configuration =
        Scope (\_PR)
+
        {
+
                Processor (\_PR.CPU0, 0x00, 0x000000, 0x00) {}
+
                Processor (\_PR.CPU1, 0x01, 0x000000, 0x00) {}
+
        }
+
</pre>
+
  
This is here for compatibility. More interresting is:
+
It seems only GPIO2 and GPIO5 is used from W83627EHF/EHG. VT8237GPIO is perhaps used for CABLE select
<pre>
+
and with GP0 one can blink the power LED.
  
        /* For now only define 2 power states:
+
== GPIO2 (0xE4) ==
        *  - S0 which is fully on
+
        *  - S5 which is soft off
+
        * any others would involve declaring the wake up methods
+
        */
+
        Name (\_S0, Package () {0x00, 0x00, 0x00, 0x00 })
+
        Name (\_S5, Package () {0x02, 0x02, 0x00, 0x00 })
+
</pre>
+
  
This defines the SLP_TYP fields in PM1A register. In my case I need to store 010 to perform soft off.
+
No inversions, bit0 and bit1 inputs, rest configured as outputs.
And 000 to wakeup. Modify it to fit your chipset needs. Rest of the files is quite generic, except the _PRT methods which define the routing.
+
  
<pre>
+
=== GPIO2 bit7 ===
    Package (0x04) { 0x000BFFFF, 0x00, 0x00, 0x10 }, //slot 0xB
+
memory voltage select
    Package (0x04) { 0x000BFFFF, 0x01, 0x00, 0x11 },
+
    Package (0x04) { 0x000BFFFF, 0x02, 0x00, 0x12 },
+
    Package (0x04) { 0x000BFFFF, 0x03, 0x00, 0x13 },
+
</pre>
+
  
This defines the slot 0xB (all functions FFFF) routing as follows :
+
=== GPIO2 bit 6 ===
<pre>
+
memory voltage select
INTA -> IRQ16
+
INTB -> IRQ17
+
INTC -> IRQ18
+
INTD -> IRQ19
+
</pre>
+
  
You may also just state just one state/function:
+
=== GPIO2 bit 5 ===
<pre>
+
1 = vcore offset + 100mV
Package (0x04) { 0x000F0001, 0x00, 0x00, 0x14 }, //0xf NAtive IDE IRQ 20
+
0 = vcore offset + 200mV
</pre>
+
  
This means 0:0f.1 INTA is routed to IRQ20.
+
=== GPIO2 bit 4 ===
 +
1 = 1.5V Chipset voltage
 +
0 = 1.6V Chipset voltage
  
Please note that the 0x10, 0x11 are called GSI (global system interrupt). All your interrupts routed through first APIC will start with 0x00, second APIC will perhaps start at IRQ24 etc etc...
+
=== GPIO2 bit 3 ===
This example has no support for legacy PIC routing. For PIC routing you would need  to alter rest of the fields in the _PRT package and also crete PIRQA-PIRQD special devices.
+
0 = VID can be changed
 +
1 = LockVID
  
Rest of the file contains just some legacy devices to make certain OS instatallers happy.
+
=== GPIO2 bit 2 ===
Don't forget to install iasl compiler and also adjust the LinuxBIOS buildsystem to build binary DSDT
+
output always 1 ??? maybe it is connected as turbo# on clock chip.
for you.
+
  
=== Other tables ===
+
=== GPIO2 bit 1 ===
 +
unused input (set to MOSI/MISO in CR29)
  
Rest of the ACPI tables is located at acpi_tables.c. I will describe briefly all methods:
+
=== GPIO2 bit 0 ===
 +
unused input (set to MOSI/MISO in CR29)
  
==== acpi_fill_mcfg ====
+
== GPIO5 (0xE1) ==
  
If your platform supports MMCONFIG (memory mapped PCI configuration registers) just modify the
+
bit5 and bit0 are outputs, rest is not used as GPIO. No inversions.
function with correct base address.
+
CR2D is 0x21 it means only GP50 and GP55 are used for GPIO.
  
==== acpi_fill_madt ====
+
=== GPIO5 bit5 ===
 +
memory voltage select
  
This describes the ACPI IRQ information, as well as IRQ override. The gsi_base used in the code
+
=== GPIO5 bit0 ===
is base for second APIC. Provide APIC bases and IDs. Usually there are two IRQ overrides. IRQ0 override means that IRQ0 is not connected to pin 0 on APIC but to another, most likely pin 2. Second IRQ override is for ACPI IRQ. This overrides the 'level' of the interrupt to 'active low'.  The rest of the table is filled with NMI entries for the processor.
+
memory voltage select
  
==== write_acpi_tables ====
 
  
This is the main function which constructs the tables. Functions described above are callbacks from the
+
{|
"construct" functions called here. You may ommit the HPET and MCFG tables.
+
|+ Memory voltage adjustment
 +
! Voltage !! GPIO5 bit 5/0 !! GPIO2 bit 7/6
 +
|-
 +
|2.60V || 11 || 01 
 +
|-
 +
|2.65V || 01 || 11
 +
|-
 +
|2.70V || 00 || 11
 +
|-
 +
|2.75V || 01 || 10
 +
|-
 +
|2.80V || 10 || 00
 +
|-
 +
|2.85V || 00 || 10
 +
|-
 +
|2.90V || 00 || 01
 +
|-
 +
|2.95V || 01 || 00
 +
|-
 +
|3.00V || 00?? || 00??
 +
|-
 +
|}

Revision as of 14:04, 16 November 2008

Status

Device/functionality Status Comments
CPU
CPU works OK I'm using an AMD Opteron 175 Dual Core Processor, both cores do work, Opteron 144 worked too.
L1 cache enabled OK
L2 cache enabled OK
L3 cache enabled N/A
Multiple CPU support N/A
Multi-core support OK Opteron 175
Hardware virtualization Untested
RAM
EDO N/A
SDRAM N/A
SO-DIMM N/A
DDR OK Works with patches I posted to the list.
DDR2 Unknown
DDR3 Unknown
Dual channel support OK According to memtest86+ it works.
ECC support Unknown
On-board Hardware
On-board IDE 3.5" OK USE 80 WIRE CABLES OR ALTER CONFIGURATION!
On-board IDE 2.5" N/A
On-board SATA OK
On-board SCSI Unknown
On-board USB OK Tested: USB thumb drive.
On-board VGA N/A
On-board ethernet OK
On-board audio OK
On-board modem N/A
On-board FireWire Unknown
On-board smartcard reader N/A
On-board CompactFlash Unknown
On-board PCMCIA Unknown
Add-on slots/cards
ISA add-on cards N/A
Audio/Modem-Riser (AMR/CNR) cards Unknown
PCI add-on cards OK
Mini-PCI add-on cards Unknown
PCI-X add-on cards Unknown
AGP graphics cards N/A
PCI Express x1 add-on cards OK
PCI Express x2 add-on cards N/A
PCI Express x4 add-on cards N/A
PCI Express x8 add-on cards N/A
PCI Express x16 add-on cards OK Graphics card works.
PCI Express x32 add-on cards N/A
HTX add-on cards N/A
Legacy / Super I/O
Floppy Untested
Serial port 1 (COM1) OK
Serial port 2 (COM2) N/A
Parallel port Untested Doing modprobe parport parport_pc works, but no further tests were done.
PS/2 keyboard OK
PS/2 mouse OK
Game port Unknown
Infrared Unknown
PC speaker Unknown
DiskOnChip N/A
Miscellaneous
Sensors / fan control OK
Hardware watchdog Unknown
SMBus Unknown
CAN bus N/A
CPU frequency scaling OK All you need is to patch the DSDT table with your CPU performance state settings.
Other powersaving features Unknown
ACPI OK ACPI power button event works.
Reboot OK
Poweroff OK
Suspend Unknown
Nonstandard LEDs Unknown TODO: Are there special-purpose LEDs on this board?
High precision event timers (HPET) OK
Random number generator (RNG) Unknown
Wake on modem ring Unknown
Wake on LAN Unknown
Wake on keyboard Unknown
Wake on mouse Unknown
Flashrom OK

Motherboard hardware list

  • AMD K8
  • VIA K8T890
  • VIA VT8237
  • W83627EHF
  • ICS ICS953202
  • Semtech SC2643VX

Motherboard GPIO configuration

It seems only GPIO2 and GPIO5 is used from W83627EHF/EHG. VT8237GPIO is perhaps used for CABLE select and with GP0 one can blink the power LED.

GPIO2 (0xE4)

No inversions, bit0 and bit1 inputs, rest configured as outputs.

GPIO2 bit7

memory voltage select

GPIO2 bit 6

memory voltage select

GPIO2 bit 5

1 = vcore offset + 100mV 0 = vcore offset + 200mV

GPIO2 bit 4

1 = 1.5V Chipset voltage 0 = 1.6V Chipset voltage

GPIO2 bit 3

0 = VID can be changed 1 = LockVID

GPIO2 bit 2

output always 1 ??? maybe it is connected as turbo# on clock chip.

GPIO2 bit 1

unused input (set to MOSI/MISO in CR29)

GPIO2 bit 0

unused input (set to MOSI/MISO in CR29)

GPIO5 (0xE1)

bit5 and bit0 are outputs, rest is not used as GPIO. No inversions. CR2D is 0x21 it means only GP50 and GP55 are used for GPIO.

GPIO5 bit5

memory voltage select

GPIO5 bit0

memory voltage select


Memory voltage adjustment
Voltage GPIO5 bit 5/0 GPIO2 bit 7/6
2.60V 11 01
2.65V 01 11
2.70V 00 11
2.75V 01 10
2.80V 10 00
2.85V 00 10
2.90V 00 01
2.95V 01 00
3.00V 00?? 00??