ASUS A8V-E SE - Revision history

Uwe: ASUS A8V-E SE Build Tutorial moved to ASUS A8V-E SE

2008-11-16T14:04:59Z

2008-03-30T22:14:42Z

Fix multicore status

2008-01-24T23:04:20Z

‎GPIO2 bit 2

2008-01-24T23:03:16Z

‎GPIO5 (0xE1)

2008-01-24T23:00:11Z

‎GPIO5 bit0

2008-01-24T22:57:46Z

‎GPIO2 bit 1

2008-01-24T22:57:31Z

‎GPIO2 bit 0

2008-01-03T22:26:23Z

‎Motherboard GPIO configuration

2007-12-09T22:10:21Z

Warn user about 80 wire cables.

2007-12-06T19:31:08Z

Add motherboard hardware section

@@ Line 5: / Line 5: @@
 |CPU_status = OK
 |CPU_comments = I'm using an AMD Opteron 175 Dual Core Processor, both cores do work, Opteron 144 worked too.
 |RAM_EDO_status = N/A

@@ Line 100: / Line 100: @@
 === GPIO2 bit 2 ===
-output always 1 ???
+output always 1 ??? maybe it is connected as turbo# on clock chip.
 === GPIO2 bit 1 ===

@@ Line 110: / Line 110: @@
 == GPIO5 (0xE1) ==
-bit5 and bit0 are outputs, rest is input. no inversions.
+bit5 and bit0 are outputs, rest is not used as GPIO. No inversions.
 === GPIO5 bit5 ===
@@ Line 117: / Line 118: @@
 === GPIO5 bit0 ===
 memory voltage select
-(use CR2D to set it to GP50)
 {|

@@ Line 117: / Line 117: @@
 === GPIO5 bit0 ===
 memory voltage select
 {|

@@ Line 103: / Line 103: @@
 === GPIO2 bit 1 ===
-input
+unused input (set to MOSI/MISO in CR29)
 === GPIO2 bit 0 ===

@@ Line 74: / Line 74: @@
 = Motherboard GPIO configuration =
-It seems only GPIO2 and GPIO5 is used from W83627EHF/EHG.
+It seems only GPIO2 and GPIO5 is used from W83627EHF/EHG. VT8237GPIO is perhaps used for CABLE select
 == GPIO2 (0xE4) ==

@@ Line 15: / Line 15: @@
 |IDE_status = OK
 |IDE_25_status = N/A
 |IDE_CF_status = Untested

← Older revision		Revision as of 19:31, 6 December 2007
Line 61:		Line 61:

	}}		}}
		+
		+	= Motherboard hardware list =
		+
		+	* AMD K8
		+	* VIA K8T890
		+	* VIA VT8237
		+	* W83627EHF
		+	* ICS ICS953202
		+	* Semtech SC2643VX
		+
		+	= Motherboard GPIO configuration =
		+
		+	It seems only GPIO2 and GPIO5 is used from W83627EHF/EHG.
		+
		+	== GPIO2 (0xE4) ==
		+
		+	No inversions, bit0 and bit1 inputs, rest configured as outputs.
		+
		+	=== GPIO2 bit7 ===
		+	memory voltage select
		+
		+	=== GPIO2 bit 6 ===
		+	memory voltage select
		+
		+	=== GPIO2 bit 5 ===
		+	1 = vcore offset + 100mV
		+	0 = vcore offset + 200mV
		+
		+	=== GPIO2 bit 4 ===
		+	1 = 1.5V Chipset voltage
		+	0 = 1.6V Chipset voltage
		+
		+	=== GPIO2 bit 3 ===
		+	0 = VID can be changed
		+	1 = LockVID
		+
		+	=== GPIO2 bit 2 ===
		+	output always 1 ???
		+
		+	=== GPIO2 bit 1 ===
		+	input
		+
		+	=== GPIO2 bit 0 ===
		+	input
		+
		+
		+	== GPIO5 (0xE1) ==
		+
		+	bit5 and bit0 are outputs, rest is input. no inversions.
		+
		+	=== GPIO5 bit5 ===
		+	memory voltage select
		+
		+	=== GPIO5 bit0 ===
		+	memory voltage select
		+
		+	{\|
		+	\|+ Memory voltage adjustment
		+	! Voltage !! GPIO5 bit 5/0 !! GPIO2 bit 7/6
		+	\|-
		+	\|2.60V \|\| 11 \|\| 01
		+	\|-
		+	\|2.65V \|\| 01 \|\| 11
		+	\|-
		+	\|2.70V \|\| 00 \|\| 11
		+	\|-
		+	\|2.75V \|\| 01 \|\| 10
		+	\|-
		+	\|2.80V \|\| 10 \|\| 00
		+	\|-
		+	\|2.85V \|\| 00 \|\| 10
		+	\|-
		+	\|2.90V \|\| 00 \|\| 01
		+	\|-
		+	\|2.95V \|\| 01 \|\| 00
		+	\|-
		+	\|3.00V \|\| 00?? \|\| 00??
		+	\|-
		+	\|}