Difference between revisions of "Board:asus/m4a785t-m"

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(Patch 2)
(Azalia)
(36 intermediate revisions by the same user not shown)
Line 5: Line 5:
 
|CPU_comments = Tested: AMD Athlon64 X2 250.
 
|CPU_comments = Tested: AMD Athlon64 X2 250.
 
|CPU_L1_status = Untested
 
|CPU_L1_status = Untested
|CPU_L1_comments = Not tested yet
+
|CPU_L1_comments = Not tested yet (how to test?)
 
|CPU_L2_status = Untested
 
|CPU_L2_status = Untested
|CPU_L2_comments = Not tested yet
+
|CPU_L2_comments = Not tested yet (how to test?)
 
|CPU_L3_status = N/A
 
|CPU_L3_status = N/A
 
|CPU_multiple_status = N/A
 
|CPU_multiple_status = N/A
Line 41: Line 41:
 
|Onboard_VGA_comments = Tested:analog VGA and HDMI,dual screen.
 
|Onboard_VGA_comments = Tested:analog VGA and HDMI,dual screen.
 
|Onboard_ethernet_status = OK
 
|Onboard_ethernet_status = OK
|Onboard_audio_status = No
+
|Onboard_audio_status = OK
|Onboard_audio_comments = Linux driver crashes.
+
|Onboard_audio_comments =  
 
|Onboard_modem_status = N/A
 
|Onboard_modem_status = N/A
 
|Onboard_firewire_status = N/A
 
|Onboard_firewire_status = N/A
Line 61: Line 61:
 
|PCIE_x4_status = N/A
 
|PCIE_x4_status = N/A
 
|PCIE_x8_status = N/A
 
|PCIE_x8_status = N/A
|PCIE_x16_status = WIP
+
|PCIE_x16_status = OK
|PCIE_x16_comments = a clean way to merge the patch must be found.
+
|PCIE_x16_comments = Tested with Nvidia card
 +
|PCIE_x32_status = N/A
 
|HTX_status = N/A
 
|HTX_status = N/A
 
 
|Floppy_status = N/A
 
|Floppy_status = N/A
 
|Floppy_comments = There is no floppy connector at all.
 
|Floppy_comments = There is no floppy connector at all.
Line 104: Line 104:
  
 
}}
 
}}
 +
 +
== proprietary components status ==
 +
* CPU Microcode (optional)
 +
* VGA option rom (optional): wihtout it you will get no graphics, Note that if you use an external graphic card, SeaBIOS will probably(depending on its configuration) load the option rom(that you don't have to touch) from the graphic card.
  
 
== Introduction ==
 
== Introduction ==
Line 200: Line 204:
 
== Building Coreboot ==
 
== Building Coreboot ==
 
To build coreboot for this mainboard:
 
To build coreboot for this mainboard:
* checkout coreboot revision 1b1309f289d6fc9f6ec348686665d25218535030
+
* checkout coreboot revision d5c998be99709c92f200b3b08aed2ca3fee2d519
 +
* optionally apply the azalia patch below in the azalia section of this page.
 +
* select the stable revision of seabios for more anti-brick safety
 
* Configure and Build it as usual(for having graphics you need to extract your VGA BIOS ROM from your BIOS)
 
* Configure and Build it as usual(for having graphics you need to extract your VGA BIOS ROM from your BIOS)
 
== PCIe ==
 
=== Patch 1 ===
 
==== Patch1 Requirements/Issues ====
 
* the -pae kernel didn't boot my LUKS hdd(failed at cryptsetup password entering)... => using a -generic kernel worked(however that sees only 2772M in htop(I've 4GB))
 
* if you remove the PCIe card, the integrated ATI card won't come up...
 
* you only see the external graphic card in lspci, like with the BIOS, which seem to be the way to go...
 
 
==== Patch1 ====
 
From ab15ce791543cb0c1a09317962fe6bdc79e4e1b3 Mon Sep 17 00:00:00 2001
 
From: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
 
Date: Tue, 18 Sep 2012 19:35:44 +0200
 
Subject: [PATCH] IRQ tables for getting the PCIe graphic card working
 
 
Thanks a lot for the help trough IRC in the #coreboot channel
 
  on the Freenode servers.
 
 
Change-Id: Ie99ee5adaf997cb94c96eb1942d1089ab2528f85
 
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
 
---
 
  src/mainboard/asus/m4a785t-m/devicetree.cb |    6 +++---
 
  1 files changed, 3 insertions(+), 3 deletions(-)
 
 
diff --git a/src/mainboard/asus/m4a785t-m/devicetree.cb b/src/mainboard/asus/m4a785t-m/devicetree.cb
 
index e8764b1..7095afd 100644
 
--- a/src/mainboard/asus/m4a785t-m/devicetree.cb
 
+++ b/src/mainboard/asus/m4a785t-m/devicetree.cb
 
@@ -10,8 +10,8 @@ chip northbridge/amd/amdfam10/root_complex
 
  device pci 18.0 on #  northbridge
 
  chip southbridge/amd/rs780
 
  device pci 0.0 on end # HT  0x9600
 
- device pci 1.0 on end # Internal Graphics P2P bridge 0x9602
 
- device pci 2.0 off end # PCIE P2P bridge (external graphics) 0x9603
 
+ device pci 1.0 off end # Internal Graphics P2P bridge 0x9602
 
+ device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x9603
 
  device pci 3.0 off end # PCIE P2P bridge 0x960b
 
  device pci 4.0 off end # PCIE P2P bridge 0x9604
 
  device pci 5.0 off end # PCIE P2P bridge 0x9605
 
@@ -24,7 +24,7 @@ chip northbridge/amd/amdfam10/root_complex
 
  register "gpp_configuration" = "3"  # Configuration D default
 
  register "port_enable" = "0x6fc"
 
  register "gfx_dev2_dev3" = "1"
 
- register "gfx_dual_slot" = "2"
 
+ register "gfx_dual_slot" = "0"
 
 
 
  register "gfx_lane_reversal" = "0"
 
  register "gfx_tmds" = "0"
 
--
 
1.7.5.4
 
 
=== Patch 2 ===
 
==== Patch2 Requirements/Issues  ====
 
* see both cards and memory regions have some issues because of that.
 
 
==== Patch2 ====
 
diff --git a/src/mainboard/asus/m4a785t-m/devicetree.cb b/src/mainboard/asus/m4a785t-m/devicetree.cb
 
index e8764b1..905e5d3 100644
 
--- a/src/mainboard/asus/m4a785t-m/devicetree.cb
 
+++ b/src/mainboard/asus/m4a785t-m/devicetree.cb
 
@@ -11,7 +11,7 @@ chip northbridge/amd/amdfam10/root_complex
 
                                chip southbridge/amd/rs780
 
                                        device pci 0.0 on end # HT      0x9600
 
                                        device pci 1.0 on end # Internal Graphics P2P bridge 0x9602
 
-                                      device pci 2.0 off end # PCIE P2P bridge (external graphics) 0x9603
 
+                                      device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x9603
 
                                        device pci 3.0 off end # PCIE P2P bridge        0x960b
 
                                        device pci 4.0 off end # PCIE P2P bridge 0x9604
 
                                        device pci 5.0 off end # PCIE P2P bridge 0x9605
 
@@ -24,7 +24,7 @@ chip northbridge/amd/amdfam10/root_complex
 
                                        register "gpp_configuration" = "3"  # Configuration D default
 
                                        register "port_enable" = "0x6fc"
 
                                        register "gfx_dev2_dev3" = "1"
 
-                                      register "gfx_dual_slot" = "2"
 
+                                      register "gfx_dual_slot" = "0"
 
 
 
                                        register "gfx_lane_reversal" = "0"
 
                                        register "gfx_tmds" = "0"
 
  
 
== SerialICE ==
 
== SerialICE ==
Line 288: Line 217:
 
  make menuconfig
 
  make menuconfig
 
  make
 
  make
 +
 +
cd ../
 +
cd qemu-0.15.x
 +
sh build.sh
 +
ln -s ../SerialICE/simba/*.lua ./
 +
 +
Add the following to asus_m4a77td_pro.lua:
 +
microcode_patchlevel_eax = 0x010000b7
 +
 +
function do_mainboard_setup()
 +
do_minimal_setup()
 +
do_default_setup()
 +
enable_hook(cpumsr_hooks, filter_amd_microcode)
 +
end
 +
 +
=== Failing ===
 +
It fails like that(it inits the 2 cores and we have 1 core(qemu)):
 +
[fffc06a:0c0f] e25f.e260  LAPIC: [00000380] <= 00000000
 +
[fffc06a:1321] e26b.e26d  PCI: 0:18.0 [60] => 00010000
 +
[fffc06a:12e3] e273.e275  PCI: 0:18.3 [e8] => 00075f79
 +
[fffc06a:1397] e27e.e27f  CPUID: eax: 00000001; ecx: 0000001b => 00100f62.00020800.00802009.178bfbff
 +
[fffc06a:1321] e290.e292  PCI: 0:18.3 [e8] => 00075f79
 +
[fffc06a:1397] e297.e298  CPUID: eax: 00000001; ecx: 0000001b => 00100f62.00020800.00802009.178bfbff
 +
[fffc06a:121e] e2a5.e2a6  CPUID: eax: 80000001; ecx: 0000001b => 00100f62.10001b26.000037ff.efd3fbff
 +
[fffc06a:12ff] e2bb.e2bc  CPUID: eax: 80000008; ecx: 0000001b => 00003030.00000000.00002001.00000000
 +
[fffc06a:130c] e2bf.e2c0  CPU MSR: [c001001f] => 00584000.00000008
 +
[fffc06a:131d] e2c4.e2c5  CPU MSR: [c001001f] <= 00584000.00000008
 +
[fffc06a:131d] e2cf.e2d1  PCI: 0:18.3 [90] => 00000000
 +
[fffc06a:1348] e2dc.e2dd  CPUID: eax: 80000008; ecx: 0000001b => 00003030.00000000.00002001.00000000
 +
[fffc06a:135d] e2e2.e2e3  CPU MSR: [c001001f] <= 00584000.00000008
 +
[fffc06a:0b7d] e2f2.e2f3  CPU MSR: [0000001b] => 00000000.fee00900
 +
[fffc06a:0b7d] e2f4.e2f5  LAPIC: [00000020] => 00000000
 +
[fffc06a:127a] e2f9.e2fa  CPUID: eax: 00000001; ecx: 0000001b => 00100f62.00020800.00802009.178bfbff
 +
[fffc06a:1289] e2f9.e2fb  CPUID: eax: 80000008; ecx: 00802009 => 00003030.00000000.00002001.00000000
 +
[fffc06a:1057] e302.e304  PCI: 0:18.0 [68] => 004fac0f
 +
[fffc06a:1071] e30d.e30f  PCI: 0:18.0 [68] <= 004fac2f
 +
Readback error! 30/72
 +
Readback error! a/63
 +
Readback error! 72/30
 +
Readback error! 3e/30
 +
Readback error! 20/30
 +
Readback error! 63/30
 +
Readback error! 66/30
 +
Readback error! 45/30
 +
Readback error! a/31
 +
Readback error! 52/62
 +
Readback error! 3e/2e
 +
Readback error! 52/66
 +
Readback error! 20/66
 +
Readback error! 4f/66
 +
Readback error! 30/65
 +
Readback error! 52/62
 +
Readback error! a/30
 +
Readback error! a/30
 +
Readback error! 3e/30
 +
[fffc06a:0c50] e31d.e31e  CPU MSR: [0000001b] => 00000000.00000000
 +
== Azalia ==
 +
See http://review.coreboot.org/#/c/3035/
  
 
== TODO ==
 
== TODO ==
 
* Add defaults for the nvram settings.
 
* Add defaults for the nvram settings.
* find a clean way to merge the patch for the PCIe graphic card.
+
* <s>find a clean way to merge the patch for the PCIe graphic card.</s>
* fix the Audio CODEC(it's the same than the x60 and it works on the x60).
+
* <s>fix the Audio CODEC(it's the same than the x60 and it works on the x60)</s>
 
* handle suspend to ram
 
* handle suspend to ram
 
* lock SMM/SMI
 
* lock SMM/SMI
 
* make it possible to run the BIOS under serialICE
 
* make it possible to run the BIOS under serialICE
 
* 64bit support
 
* 64bit support

Revision as of 18:09, 6 April 2013

Status

Device/functionality Status Comments
CPU
CPU works OK Tested: AMD Athlon64 X2 250.
L1 cache enabled Untested Not tested yet (how to test?)
L2 cache enabled Untested Not tested yet (how to test?)
L3 cache enabled N/A
Multiple CPU support N/A
Multi-core support OK
Hardware virtualization OK KVM seem to work
RAM
EDO N/A
SDRAM N/A
SO-DIMM N/A
DDR N/A N/A
DDR2 Untested
DDR3 OK 2G works, 4G(2 * 2G) works with lastest coreboot
Dual channel support Untested
ECC support Untested
On-board Hardware
On-board IDE 3.5" OK Tested: 500GB HDD
On-board IDE 2.5" N/A
On-board SATA OK Tested some ports, works fine
On-board SCSI N/A
On-board USB OK USB keyboard works
On-board VGA OK Tested:analog VGA and HDMI,dual screen.
On-board ethernet OK
On-board audio OK
On-board modem N/A
On-board FireWire N/A
On-board smartcard reader N/A
On-board CompactFlash N/A
On-board PCMCIA N/A
Add-on slots/cards
ISA add-on cards N/A
Audio/Modem-Riser (AMR/CNR) cards N/A
PCI add-on cards OK I've an ath9k wifi PCI card and it works.
Mini-PCI add-on cards N/A
PCI-X add-on cards N/A
AGP graphics cards N/A
PCI Express x1 add-on cards Untested
PCI Express x2 add-on cards N/A
PCI Express x4 add-on cards N/A
PCI Express x8 add-on cards N/A
PCI Express x16 add-on cards OK Tested with Nvidia card
PCI Express x32 add-on cards N/A
HTX add-on cards N/A
Legacy / Super I/O
Floppy N/A There is no floppy connector at all.
Serial port 1 (COM1) OK COM1 is only pin header on board. DB-9 serial connector is available, but not included with board.
Serial port 2 (COM2) N/A
Parallel port Untested No connector, pins on board only
PS/2 keyboard OK
PS/2 mouse Untested
Game port N/A
Infrared N/A
PC speaker Untested
DiskOnChip N/A
Miscellaneous
Sensors / fan control Untested
Hardware watchdog N/A
SMBus Unknown
CAN bus N/A
CPU frequency scaling OK works in GNU/Linux
Other powersaving features Untested
ACPI Untested
Reboot OK
Poweroff OK
Suspend Unknown
Nonstandard LEDs
High precision event timers (HPET)
Random number generator (RNG) Untested
Wake on modem ring Untested
Wake on LAN
Wake on keyboard Untested
Wake on mouse Untested
Flashrom OK The chip is SPI

proprietary components status

  • CPU Microcode (optional)
  • VGA option rom (optional): wihtout it you will get no graphics, Note that if you use an external graphic card, SeaBIOS will probably(depending on its configuration) load the option rom(that you don't have to touch) from the graphic card.

Introduction

This pages is about the port to the M4A785T-M, this mainboard is very similar to the M4A785-M, but:

  • it has DDR3 instead of DDR2

Building the serial port adapter

You'll need to build a serial port adapter to get the coreboot logs during. Here's a picture of the serial port connector on the mainboard:
ASUS M4A785T-M serial connector witout serial adapter.jpeg
And here's the kind of cable you will need:
ASUS M4A785T-M serial connector with serial adapter.jpeg
And you'll need to build a cable similar to this one(on the picture the DB9 is connector is a male connector):
ASUS M4A785T-M serial cable.jpeg
Here's how it looks like on the mainboard:

_____________________
|
|NC|09|
|08|07|
|06|05|
|04|03|
|02|01|
|
|

Here's a table of corresponding pins:

Mainboard connector pin Mainboard pin Function Standard DE9 pin connector Standard DE9 pin Function Mandatory for coreboot
1 ? ? ? No
2 RX 3 TX Yes (you could do without but it's advised to get it, to be able to use certain functions of coreboot)
3 TX 2 RX Yes
4 4 DTR No
5 Ground 5 Ground Yes
6 ? ? ? No
7 7 RTS No
8 8 CTS No
9 ? ? ? No

Adapting GNU/Linux

Before booting with coreboot, do the following:

  • blacklist the snd-hda* modules (refer to the usual way to get help for the GNU/Linux distribution you want to run for doing that)
  • 32bit GNU/Linux trisquel distribution tested
  • 64bit GNU/Linux trisquel distribution failed to initialize the USB.

Building Coreboot

To build coreboot for this mainboard:

  • checkout coreboot revision d5c998be99709c92f200b3b08aed2ca3fee2d519
  • optionally apply the azalia patch below in the azalia section of this page.
  • select the stable revision of seabios for more anti-brick safety
  • Configure and Build it as usual(for having graphics you need to extract your VGA BIOS ROM from your BIOS)

SerialICE

  • Selecting the ASUS M4A77TD-PRO mainboard makes the serialICE shell appear once flashed(however running the BIOS under SerialICE fails at some point).

Howto

WARNING, This Howto is for SerialICE and not for coreboot, don't flash the resulting image unless you really know what you're doing...
git clone http://review.coreboot.org/p/serialice.git
cd serialice
make menuconfig
make
cd ../
cd qemu-0.15.x
sh build.sh
ln -s ../SerialICE/simba/*.lua ./

Add the following to asus_m4a77td_pro.lua:

microcode_patchlevel_eax = 0x010000b7

function do_mainboard_setup()
	do_minimal_setup()
	do_default_setup()
	enable_hook(cpumsr_hooks, filter_amd_microcode)
end

Failing

It fails like that(it inits the 2 cores and we have 1 core(qemu)):

[fffc06a:0c0f] e25f.e260   LAPIC: [00000380] <= 00000000
[fffc06a:1321] e26b.e26d   PCI: 0:18.0 [60] => 00010000
[fffc06a:12e3] e273.e275   PCI: 0:18.3 [e8] => 00075f79
[fffc06a:1397] e27e.e27f   CPUID: eax: 00000001; ecx: 0000001b => 00100f62.00020800.00802009.178bfbff
[fffc06a:1321] e290.e292   PCI: 0:18.3 [e8] => 00075f79
[fffc06a:1397] e297.e298   CPUID: eax: 00000001; ecx: 0000001b => 00100f62.00020800.00802009.178bfbff
[fffc06a:121e] e2a5.e2a6   CPUID: eax: 80000001; ecx: 0000001b => 00100f62.10001b26.000037ff.efd3fbff
[fffc06a:12ff] e2bb.e2bc   CPUID: eax: 80000008; ecx: 0000001b => 00003030.00000000.00002001.00000000
[fffc06a:130c] e2bf.e2c0   CPU MSR: [c001001f] => 00584000.00000008
[fffc06a:131d] e2c4.e2c5   CPU MSR: [c001001f] <= 00584000.00000008
[fffc06a:131d] e2cf.e2d1   PCI: 0:18.3 [90] => 00000000
[fffc06a:1348] e2dc.e2dd   CPUID: eax: 80000008; ecx: 0000001b => 00003030.00000000.00002001.00000000
[fffc06a:135d] e2e2.e2e3   CPU MSR: [c001001f] <= 00584000.00000008
[fffc06a:0b7d] e2f2.e2f3   CPU MSR: [0000001b] => 00000000.fee00900
[fffc06a:0b7d] e2f4.e2f5   LAPIC: [00000020] => 00000000
[fffc06a:127a] e2f9.e2fa   CPUID: eax: 00000001; ecx: 0000001b => 00100f62.00020800.00802009.178bfbff
[fffc06a:1289] e2f9.e2fb   CPUID: eax: 80000008; ecx: 00802009 => 00003030.00000000.00002001.00000000
[fffc06a:1057] e302.e304   PCI: 0:18.0 [68] => 004fac0f
[fffc06a:1071] e30d.e30f   PCI: 0:18.0 [68] <= 004fac2f
Readback error! 30/72
Readback error! a/63
Readback error! 72/30
Readback error! 3e/30
Readback error! 20/30
Readback error! 63/30
Readback error! 66/30
Readback error! 45/30
Readback error! a/31
Readback error! 52/62
Readback error! 3e/2e
Readback error! 52/66
Readback error! 20/66
Readback error! 4f/66
Readback error! 30/65
Readback error! 52/62
Readback error! a/30
Readback error! a/30
Readback error! 3e/30
[fffc06a:0c50] e31d.e31e   CPU MSR: [0000001b] => 00000000.00000000

Azalia

See http://review.coreboot.org/#/c/3035/

TODO

  • Add defaults for the nvram settings.
  • find a clean way to merge the patch for the PCIe graphic card.
  • fix the Audio CODEC(it's the same than the x60 and it works on the x60)
  • handle suspend to ram
  • lock SMM/SMI
  • make it possible to run the BIOS under serialICE
  • 64bit support