Difference between revisions of "Anatomy of a Failover coreboot v2 Image"

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== Note ==
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=== This page is obsolete ===
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'''Note''': The information on this page is no longer correct. Instead coreboot uses [[CBFS]] now.
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== Overview and according values ==  
 
== Overview and according values ==  
 
This is a pictorial view of '''FAILOVER_SIZE''', '''_ROMBASE''', '''ROM_IMAGE_SIZE''', '''PAYLOAD_SIZE''', '''ROM_SIZE''', '''ROM_SECTION_SIZE''', '''HAVE_FALLBACKBOOT''', '''HAVE_FAILOVERBOOT''' for '''Options.lb''' and '''Config.lb'''.
 
This is a pictorial view of '''FAILOVER_SIZE''', '''_ROMBASE''', '''ROM_IMAGE_SIZE''', '''PAYLOAD_SIZE''', '''ROM_SIZE''', '''ROM_SECTION_SIZE''', '''HAVE_FALLBACKBOOT''', '''HAVE_FAILOVERBOOT''' for '''Options.lb''' and '''Config.lb'''.
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Increase the '''ROM_IMAGE_SIZE''' of the failing piece. In this case the '''fallback''' image.
 
Increase the '''ROM_IMAGE_SIZE''' of the failing piece. In this case the '''fallback''' image.
  
See also [[Section overlaps]] for a detailed description of a fix.
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See also [[FAQ/Obsolete#How_do_I_fix_the_.22section_overlaps.22_error_in_v2.3F|the FAQ]] for a detailed description of a fix.

Latest revision as of 14:32, 26 September 2010

Note

This page is obsolete

Note: The information on this page is no longer correct. Instead coreboot uses CBFS now.

Overview and according values

This is a pictorial view of FAILOVER_SIZE, _ROMBASE, ROM_IMAGE_SIZE, PAYLOAD_SIZE, ROM_SIZE, ROM_SECTION_SIZE, HAVE_FALLBACKBOOT, HAVE_FAILOVERBOOT for Options.lb and Config.lb.

LBv2 anatomy image.PNG

XIP_ROM_BASE and XIP_ROM_SIZE are for MTRR setting during CAR to cache part of the ROM image. Speeds up anything with loops like copies and decompression.

On the timeline

The failover image...

  • chooses to use normal or fallback.
    • This choice depends on a value which is stored in NVRAM a.k.a CMOS.
    • This code is at the moment mainboard specific and can normally be found in cache_as_ram.c or auto.c.
  • runs normal or fallback.

Some Errors you might come across and probable solutions

coreboot input file larger than allowed size

Error:

./buildrom coreboot.strip coreboot.rom payload 0x70000 0x7f000
coreboot image is 458820 bytes; only 458752 allowed
coreboot input file larger than allowed size!

Solution:

Typically caused by crt0 having a .data segment. Make sure all ROM data is defined as constant.

section .id overlaps section .rom

Error:

gcc -m32 -nostdlib -nostartfiles -static -o linuxbios -T ldscript.ld crt0.o 
/usr/lib64/gcc/x86_64-suse-linux/4.3/../../../../x86_64-suse-linux/bin/ld: section .id [00000000ffffefd2 -> 00000000ffffefef] overlaps section .rom [00000000fffeed83 -> 00000000ffffff5f]
/usr/lib64/gcc/x86_64-suse-linux/4.3/../../../../x86_64-suse-linux/bin/ld: linuxbios: section .id lma 0xffffefd2 overlaps previous sections
/usr/lib64/gcc/x86_64-suse-linux/4.3/../../../../x86_64-suse-linux/bin/ld: linuxbios: section .reset lma 0xffffeff0 overlaps previous sections
collect2: ld returned 1 exit status
make[1]: *** [linuxbios] Error 1
make[1]: Leaving directory `/srv/svn/linuxbios-extra/tmp/LinuxBIOSv2-3021/util/abuild/linuxbios-builds/amd_serengeti_cheetah_fam10/fallback'
make: *** [fallback/linuxbios.rom] Error 1

Solution:

Increase the ROM_IMAGE_SIZE of the failing piece. In this case the fallback image.

See also the FAQ for a detailed description of a fix.