Difference between revisions of "Board:iei/pcisa-lx-800-r10"

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m (Phcoder moved page IEI LX 800 to Board:iei/pcisa-lx-800-r10)
 
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This page describes how to use the '''[http://www.ieiworld.com/en/product_IPC.asp?model=PCISA-LX IEI PCISA-LX-800-R10]''' mainboard with coreboot.
 +
 
== Status ==
 
== Status ==
  
Line 4: Line 6:
  
 
|CPU_status = OK
 
|CPU_status = OK
|CPU_comments = AMD Geode LX-800.
+
|CPU_comments = AMD Geode LX-800-500MHz.
 
|CPU_L1_status = OK
 
|CPU_L1_status = OK
 
|CPU_L2_status = OK
 
|CPU_L2_status = OK
Line 16: Line 18:
 
|RAM_SODIMM_status = N/A
 
|RAM_SODIMM_status = N/A
 
|RAM_DDR_status = OK
 
|RAM_DDR_status = OK
|RAM_DDR_comments = Tested with 256MiB module.
+
|RAM_DDR_comments = Tested with 256MiB(333MHz) module.
 
|RAM_DDR2_status = N/A
 
|RAM_DDR2_status = N/A
 
|RAM_DDR3_status = N/A
 
|RAM_DDR3_status = N/A
Line 63: Line 65:
 
|IR_status = N/A
 
|IR_status = N/A
 
|Speaker_status = OK
 
|Speaker_status = OK
|Speaker_comments = Needs a patch.
+
|Speaker_comments = Needs a [http://www.coreboot.org/pipermail/coreboot/2008-March/031983.html patch].
 
|DiskOnChip_status = N/A
 
|DiskOnChip_status = N/A
  
Line 84: Line 86:
 
|WakeOnMouse_status = N/A
 
|WakeOnMouse_status = N/A
 
|Flashrom_status = OK
 
|Flashrom_status = OK
|Flashrom_comments = Works fine, both with coreboot and with the proprietary BIOS.
+
|Flashrom_comments = Works fine, both with coreboot and with the proprietary BIOS. Needs a [http://www.coreboot.org/pipermail/coreboot/2008-March/031982.html patch].
  
 
}}
 
}}
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{| style="float: right; background: transparent; padding: 0px; margin: 0px;"
 
{| style="float: right; background: transparent; padding: 0px; margin: 0px;"
 
|- valign="top"
 
|- valign="top"
| [[Image:lx-800_top_small.jpg|thumb|The IEI LX-800 mainboard.]]
+
| [[Image:lx-800_top_small.jpg|thumb|Top.]]
| [[Image:lx-800_bottom_small.jpg|thumb|The IEI LX-800 mainboard.]]
+
| [[Image:lx-800_bottom_small.jpg|thumb|Bottom.]]
 +
| [[Image:ip-6s-opened_small.jpg|thumb|IP-6S backpanel.]]
 +
| [[Image:ip-6s-closed_small.jpg|thumb|IP-6S backpanel.]]
 
|}
 
|}
 
=== Overview ===
 
  
 
* '''LX-800''' AMD CPU with 500MHz core clock
 
* '''LX-800''' AMD CPU with 500MHz core clock
 
* '''CS5536AD''' Part of the chipset, AMD companion device
 
* '''CS5536AD''' Part of the chipset, AMD companion device
* '''W83627''' Winbond Super I/O
+
* '''W83627EHG''' Winbond Super I/O
 
* '''RTL8100C''' Realtec network controller
 
* '''RTL8100C''' Realtec network controller
 
* '''RTL8100C''' Realtec network controller
 
* '''RTL8100C''' Realtec network controller
 
* '''PM49FL004''' PLCC32 512kiB flash memory to boot (in a socket)
 
* '''PM49FL004''' PLCC32 512kiB flash memory to boot (in a socket)
* '''ALC203''' AC'97 AD/DA
+
* '''ALC203''' Realtec AC'97 AD/DA
 +
 
 +
<br clear="all" />
  
 
== Building FILO ==
 
== Building FILO ==
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  USE_GRUB = 0
 
  USE_GRUB = 0
  AUTOBOOT_FILE = "hdb1:/boot/bzImage syscrtc=/dev/hdb1 initrd=hdb1:/boot/initrd.gz clocksource=pit ide-delay=2 hda=none ide1=noprobe console=tty0 quiet"
+
  AUTOBOOT_FILE = "hdb1:/boot/bzImage initrd=hdb1:/boot/initrd.gz clocksource=pit ide-delay=2 console=tty0 quiet"
  AUTOBOOT_DELAY = 1
+
  AUTOBOOT_DELAY = 0
 
  IDE_DISK = 1
 
  IDE_DISK = 1
 
  SERIAL_CONSOLE = 1
 
  SERIAL_CONSOLE = 1
Line 121: Line 125:
 
  # MULTIBOOT_IMAGE = 1
 
  # MULTIBOOT_IMAGE = 1
  
== Building coreboot ==
+
[[FILO]] config for IEI LX-800 (boot from memory flash):
  
  $ cd targets
+
  USE_GRUB = 0
  $ ./buildtarget iei/lx-800-r10
+
  AUTOBOOT_FILE = "mem@0xffe00000,0x130000 initrd=mem@0xfff30000,0xac800 clocksource=pit ide-delay=2 console=tty0 quiet"
  $ cd iei/lx-800-r10/lx-800-r10
+
  AUTOBOOT_DELAY = 0
  $ LANG=C make
+
  SERIAL_CONSOLE = 1
 +
SERIAL_IOBASE = 0x3f8
 +
# SERIAL_SPEED = 115200
 +
LINUX_LOADER = 1
 +
# MULTIBOOT_IMAGE = 1
 +
 
 +
== Building coreboot ==
  
The '''LANG=C''' is only for those users that uses a localised system.
+
See the [[Build HOWTO]] for information on how to build coreboot for this board.
  
 
== Comparing boot time ==
 
== Comparing boot time ==
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|- bgcolor="#eeeeee"
 
|- bgcolor="#eeeeee"
| Vendor BIOS
+
| Vendor BIOS (bzImage+initrd on CF)
 
| 8
 
| 8
 
| 2
 
| 2
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|- bgcolor="#dddddd"
 
|- bgcolor="#dddddd"
| Coreboot
+
| Coreboot (bzImage+initrd on CF)
 +
| 2
 +
| 2
 +
| 2
 +
| 6
 +
 
 +
|- bgcolor="#eeeeee"
 +
| Coreboot (bzImage+initrd on 2MB flash)
 
| 2
 
| 2
 
| 2  
 
| 2  
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|}
 
|}
 +
 +
== Required patches ==
 +
 +
* This [http://www.coreboot.org/pipermail/coreboot/2008-March/031983.html patch] is needed to enable the PC speaker.
 +
* This [http://www.coreboot.org/pipermail/coreboot/2008-March/031982.html patch] is needed to allow writing and erasing PM49FL004.
 +
 +
{{Cc-by-2.5}}

Latest revision as of 23:22, 18 January 2014

This page describes how to use the IEI PCISA-LX-800-R10 mainboard with coreboot.

Status

Device/functionality Status Comments
CPU
CPU works OK AMD Geode LX-800-500MHz.
L1 cache enabled OK
L2 cache enabled OK
L3 cache enabled N/A
Multiple CPU support N/A
Multi-core support N/A
Hardware virtualization N/A
RAM
EDO N/A
SDRAM N/A
SO-DIMM N/A
DDR OK Tested with 256MiB(333MHz) module.
DDR2 N/A
DDR3 N/A
Dual channel support N/A
ECC support N/A
On-board Hardware
On-board IDE 3.5" OK
On-board IDE 2.5" N/A
On-board SATA Untested
On-board SCSI Unknown
On-board USB OK
On-board VGA OK VGA not supported in coreboot, only framebuffer console/X11.
On-board ethernet OK
On-board audio OK
On-board modem N/A
On-board FireWire N/A
On-board smartcard reader N/A
On-board CompactFlash OK
On-board PCMCIA N/A
Add-on slots/cards
ISA add-on cards OK Tested with backplane IP-6S.
Audio/Modem-Riser (AMR/CNR) cards N/A
PCI add-on cards OK Tested with backplane IP-6S.
Mini-PCI add-on cards Unknown
PCI-X add-on cards Unknown
AGP graphics cards N/A
PCI Express x1 add-on cards N/A
PCI Express x2 add-on cards N/A
PCI Express x4 add-on cards N/A
PCI Express x8 add-on cards N/A
PCI Express x16 add-on cards N/A
PCI Express x32 add-on cards N/A
HTX add-on cards N/A
Legacy / Super I/O
Floppy OK
Serial port 1 (COM1) OK
Serial port 2 (COM2) OK
Parallel port OK
PS/2 keyboard OK
PS/2 mouse OK
Game port N/A
Infrared N/A
PC speaker OK Needs a patch.
DiskOnChip N/A
Miscellaneous
Sensors / fan control N/A This CPU does not need a fan.
Hardware watchdog OK
SMBus Unknown
CAN bus N/A
CPU frequency scaling OK
Other powersaving features OK
ACPI N/A
Reboot OK
Poweroff OK
Suspend Unknown
Nonstandard LEDs N/A
High precision event timers (HPET) N/A
Random number generator (RNG) N/A
Wake on modem ring N/A
Wake on LAN N/A
Wake on keyboard N/A
Wake on mouse N/A
Flashrom OK Works fine, both with coreboot and with the proprietary BIOS. Needs a patch.

Hardware

Top.
Bottom.
IP-6S backpanel.
IP-6S backpanel.
  • LX-800 AMD CPU with 500MHz core clock
  • CS5536AD Part of the chipset, AMD companion device
  • W83627EHG Winbond Super I/O
  • RTL8100C Realtec network controller
  • RTL8100C Realtec network controller
  • PM49FL004 PLCC32 512kiB flash memory to boot (in a socket)
  • ALC203 Realtec AC'97 AD/DA


Building FILO

FILO config for IEI LX-800 (boot from CF):

USE_GRUB = 0
AUTOBOOT_FILE = "hdb1:/boot/bzImage initrd=hdb1:/boot/initrd.gz clocksource=pit ide-delay=2 console=tty0 quiet"
AUTOBOOT_DELAY = 0
IDE_DISK = 1
SERIAL_CONSOLE = 1
SERIAL_IOBASE = 0x3f8
# SERIAL_SPEED = 115200
FSYS_EXT2FS = 1
LINUX_LOADER = 1
# MULTIBOOT_IMAGE = 1

FILO config for IEI LX-800 (boot from memory flash):

USE_GRUB = 0
AUTOBOOT_FILE = "mem@0xffe00000,0x130000 initrd=mem@0xfff30000,0xac800 clocksource=pit ide-delay=2 console=tty0 quiet"
AUTOBOOT_DELAY = 0
SERIAL_CONSOLE = 1
SERIAL_IOBASE = 0x3f8
# SERIAL_SPEED = 115200
LINUX_LOADER = 1
# MULTIBOOT_IMAGE = 1

Building coreboot

See the Build HOWTO for information on how to build coreboot for this board.

Comparing boot time

BIOS Power UP - OS loader OS loader - Linux Linux - shell Summary
Vendor BIOS (bzImage+initrd on CF) 8 2 2 12
Coreboot (bzImage+initrd on CF) 2 2 2 6
Coreboot (bzImage+initrd on 2MB flash) 2 2 2 6

Required patches

  • This patch is needed to enable the PC speaker.
  • This patch is needed to allow writing and erasing PM49FL004.
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In short: you are free to distribute and modify the file as long as you attribute its author(s) or licensor(s).