Difference between revisions of "Board:jetway/nf81-t56n-lf"

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This page describes how to use coreboot on the '''[http://www.jetway.com.tw/jw/ipcboard_view.asp?productid=822&proname=NF81-T56N-LF Jetway NF81-T56N-LF]''' mainboard.
 
This page describes how to use coreboot on the '''[http://www.jetway.com.tw/jw/ipcboard_view.asp?productid=822&proname=NF81-T56N-LF Jetway NF81-T56N-LF]''' mainboard.
  
This page is a work in progress. Rows with (WIP)* are high-priority ticket items and shall be addressed soon.
+
This page is a work in progress. ACPI is still being worked on, however due to the nature of ACPI it may take some time to get this right.
  
ACPI is still being worked on, however due to the nature of ACPI it may take some time to get this right.
+
== Known Issues ==
 +
 
 +
* pcie 06.0 bridge sometimes hangs probing the nic behind it. Linux reports a borked IRQ addr. They are likely connected? (Fix ACPI?).
 +
* suspend/resume could do with some work to clean up nasty warnings.. (Fix ACPI).
 +
* some werid AGESA issue affects a number of boards
 +
 
 +
== Overview ==
 +
 
 +
=== Hardware ===
 +
 
 +
* '''AMD Fusion G-series''' AMD Fusion G-T56N (1.65 GHz dual core) APU
 +
* '''AMD A55E''' part of the chipset, AMD A55E (Hudson-E1) southbridge
 +
* '''F71869AD''' Fintek F71869AD Super I/O
 +
* '''RTL8111E''' Twin Realtek RTL8111E network controllers
 +
* '''VT1705''' 6-Channel HD Audio (via VIA VT1705), AC97 AD/DA
 +
 
 +
=== Details ===
 +
 
 +
The NF81-T56N-LF is a IPC form factor embedded board:
 +
* AMD Fusion G-T56N (1.65 GHz dual core) APU
 +
** 2x SO-DIMM sockets for DDR3 800-1066 SDRAM (Fixed at 1.5V)
 +
** VGA and LVDS (via Analogix ANX3110)
 +
* AMD A55E (Hudson-E1) southbridge
 +
** 6x USB 2.0/1.1 ports
 +
** 5x SATA3 6Gb/s, 1x mSATA socket
 +
** 6-Channel HD Audio (via VIA VT1705)
 +
** PCI and ISA (via ITE IT8888)??
 +
** NEC uPD78F0532 microcontroller on I2C ("SEMA")??
 +
* 2x RJ45 GbE (via Realtek RTL8111E x2)
 +
* Fintek F71869AD Super I/O
 +
** PS/2 KB/MS port
 +
** RS232 header (via Unisonic UTC 75232 RS232 driver/receiver)
 +
** GPIO header
 +
** CIR header
 +
* 1x MXIC MX25L1606E (SO8, soldered) 16 Mbit SPI flash (BIOS)
 +
 
 +
Note: MX25L1606E is 16Mbit, 8bits in a byte, so 2MB. Jetway '''''lies'''''
 +
claiming the SPI flash is 16MB. They also use red pen over the chip
 +
so you wont see this deceit.
 +
 
 +
=== Building a coreboot image ===
 +
 
 +
Make a fresh clone of Coreboot into a empty directory and run:
 +
make crossgcc-i386
 +
Make a cup of tea.. Then run:
 +
make menuconfig
 +
and select Jetway/NF81-t56N-LF under "Mainboard -> Mainboard vendor/model" leaving
 +
everything else as defaults. Then finally do,
 +
make
 +
 
 +
To flash the board with '''flashrom''' run:
 +
flashrom -p ft2232_spi:type=2232H,port=A -c "MX25L1605A/MX25L1606E" -w build/coreboot.rom
 +
''assuming'' you have a SPI flasher setup.
  
 
== Status ==
 
== Status ==
Line 18: Line 70:
 
|CPU_multiple_status = N/A
 
|CPU_multiple_status = N/A
 
|CPU_multicore_status = N/A
 
|CPU_multicore_status = N/A
|CPU_virt_status = (WIP)*
+
|CPU_virt_status = OK
  
 
|RAM_EDO_status = N/A
 
|RAM_EDO_status = N/A
Line 34: Line 86:
 
|IDE_25_status = N/A
 
|IDE_25_status = N/A
 
|CDROM_DVD_status = N/A
 
|CDROM_DVD_status = N/A
|SATA_status = (WIP)*
+
|SATA_status = OK
 
|SATA_comments =  
 
|SATA_comments =  
 
|Onboard_SCSI_status = N/A
 
|Onboard_SCSI_status = N/A
|USB_status = (WIP)*
+
|USB_status = OK
 
|USB_comments =  
 
|USB_comments =  
 
|Onboard_VGA_status = OK
 
|Onboard_VGA_status = OK
|Onboard_VGA_comments = BIOS/console: works. Used: '''e14jtway.rom''' from original BIOS '''7F4A111.BIN''' (62K) + '''BIOS-bochs-latest''' (64K). X.org (openchrome): works.
+
|Onboard_VGA_comments = BIOS/console: works.
 
|Onboard_ethernet_status = OK
 
|Onboard_ethernet_status = OK
|Onboard_audio_status = Needs work
+
|Onboard_audio_status = OK
 +
|Onboard_audio_comments = Basic two channel audio works fine.
 
|Onboard_modem_status = N/A
 
|Onboard_modem_status = N/A
 
|Onboard_firewire_status = N/A
 
|Onboard_firewire_status = N/A
Line 51: Line 104:
 
|ISA_cards_status = N/A
 
|ISA_cards_status = N/A
 
|AMR_cards_status = N/A
 
|AMR_cards_status = N/A
|Mini_PCI_cards_status = (WIP)*
+
|Mini_PCI_cards_status = N/A
|Mini_PCI_cards_comments = Testing: with MiniPCI slot with a POST card.
+
|Mini_PCI_cards_comments =
 
|PCIX_cards_status = N/A
 
|PCIX_cards_status = N/A
 
|AGP_cards_status = N/A
 
|AGP_cards_status = N/A
|PCI_cards_status = WIP
+
|PCI_cards_status = OK
 
|PCI_cards_comments =  
 
|PCI_cards_comments =  
|mini-PCI_status = (WIP)*
+
|PCIE_x1_status = OK
|PCIE_x1_status = N/A
+
|PCIE_x1_comments = miniPCIe slot works, mSATA/miniPCIe slot does not!?
 
|PCIE_x2_status = N/A
 
|PCIE_x2_status = N/A
 
|PCIE_x4_status = N/A
 
|PCIE_x4_status = N/A
Line 70: Line 123:
 
|COM2_status = N/A
 
|COM2_status = N/A
 
|PP_status = N/A
 
|PP_status = N/A
|PS2_keyboard_status = Untested
+
|PS2_keyboard_status = OK
|PS2_mouse_status = Untested
+
|PS2_mouse_status = OK
 
|Game_port_status = N/A
 
|Game_port_status = N/A
|IR_status = N/A
+
|IR_status = Untested
 +
|IR_comments = CIR header currently turned off in devicetree.cb
 
|Speaker_status = OK
 
|Speaker_status = OK
 
|DiskOnChip_status = N/A
 
|DiskOnChip_status = N/A
  
|Sensors_status = (WIP)*
+
|Sensors_status = OK
|Sensors_comments =  
+
|Sensors_comments =
|Watchdog_status = (WIP)*
+
|Watchdog_status = Pending
|Watchdog_comments =  
+
|Watchdog_comments = What needs to be done here??
 
|SMBus_status = OK
 
|SMBus_status = OK
 
|CAN_bus_status = N/A
 
|CAN_bus_status = N/A
 
|CPUfreq_status = OK
 
|CPUfreq_status = OK
 
|Powersave_status = N/A
 
|Powersave_status = N/A
|ACPI_status = (WIP)*
+
|ACPI_status = WIP
|ACPI_comments =  
+
|ACPI_comments = Mostly working, needs a good Review!
 
|Reboot_status = OK
 
|Reboot_status = OK
|Poweroff_status = No
+
|Poweroff_status = OK
|Poweroff_comments = Probably needs ACPI.
+
|Suspend_status = OK
 +
|Poweroff_comments =
 
|LEDs_status = N/A
 
|LEDs_status = N/A
 
|HPET_status = OK  
 
|HPET_status = OK  
Line 102: Line 157:
 
}}
 
}}
  
== Hardware ==
+
== Issue Analysis ==
  
=== Overview ===
+
=== pcie 06.0 bridge hang issue ===
  
* '''AMD Fusion G-series''' AMD Fusion G-T56N (1.65 GHz dual core) APU
+
The pcie 06.0 bridge hang issue is the primary remaining issue.
* '''AMD A55E''' part of the chipset, AMD A55E (Hudson-E1) southbridge
+
* '''F71869AD''' Fintek F71869AD Super I/O
+
* '''RTL8111E''' Twin Realtek RTL8111E network controllers
+
* '''VT1705''' 6-Channel HD Audio (via VIA VT1705), AC97 AD/DA
+
  
=== Details ===
+
The Interrupt Mask Register (IMR) and Interrupt Service Register (ISR) are responsible for firing up different IRQs. The IMR bits line up with the ISR bits to work in sync. If an IMR bit is low, then the corresponding ISR bit with never fire an IRQ when the time comes for it to happen. The IMR is located at 0x3C and the ISR is located at 0x3E.
  
The NF81-T56N-LF is a IPC form factor embedded board:
 
* AMD Fusion G-T56N (1.65 GHz dual core) APU
 
** 2x SO-DIMM sockets for DDR3 800-1066 SDRAM (Fixed at 1.5V)
 
** VGA and LVDS (via Analogix ANX3110)
 
* AMD A55E (Hudson-E1) southbridge
 
** 6x USB 2.0/1.1 ports
 
** 5x SATA3 6Gb/s, 1x mSATA socket
 
** 6-Channel HD Audio (via VIA VT1705)
 
** PCI and ISA (via ITE IT8888)??
 
** NEC uPD78F0532 microcontroller on I2C ("SEMA")??
 
* 2x RJ45 GbE (via Realtek RTL8111E x2)
 
* Fintek F71869AD Super I/O
 
** PS/2 KB/MS port
 
** RS232 header (via Unisonic UTC 75232 RS232 driver/receiver)
 
** GPIO header
 
** CIR header
 
* 1x MXIC MX25L1606E (SO8, soldered) 16 Mbit SPI flash (BIOS)
 
  
Note: MX25L1606E is 16Mbit, 8bits in a byte, so 2MB. Jetway '''''lies'''''
+
Observe in the vendor bios pci configuration space dump attached below that, indx. 0x3C (IMR) = 0x0b and indx. 0x3E (ISR) = 0x10.
claiming the SPI flash is 16MB. They also use red pen over the chip
+
so you wont see this deceit.
+
  
=== lspci -tvnn ===
+
IMR val. = 0000 1011 = INTB
 +
ISR val. = 0000 1010
 +
====================
 +
        &= 0000 1010
 +
====================
  
  00:00.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 14h Processor Root Complex [1022:1510]
+
  root@archiso ~ # hexdump -C /sys/bus/pci/devices/0000:00:06.0/config
Subsystem: Advanced Micro Devices, Inc. [AMD] Family 14h Processor Root Complex [1022:1510]
+
  00000000 22 10 14 15 07 00 10 00 00 00 04 06 10 00 01 00 |"...............|
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
  00000010 00 00 00 00 00 00 00 00  00 02 02 00 e1 e1 00 00  |................|
Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
  00000020 f0 ff 00 00 11 d0 11 d0  00 00 00 00 00 00 00 00  |................|
Latency: 32
+
  00000030 00 00 00 00 50 00 00 00  00 00 00 00 0b 01 10 00  |....P...........|
+
  00000040  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  |................|
00:01.0 VGA compatible controller [0300]: Advanced Micro Devices, Inc. [AMD/ATI] Wrestler [Radeon HD 6320] [1002:9806] (prog-if 00 [VGA controller])
+
  00000050 01 58 03 c8 00 00 00 00  10 a0 42 01 20 80 00 00 |.X........B. ...|
Subsystem: Advanced Micro Devices, Inc. [AMD] Device [1022:1511]
+
  00000060 00 08 00 00 11 0c 30 03  40 00 11 70 80 25 34 00  |......0.@..p.%4.|
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
+
  00000070 00 00 48 01 00 00 01 00  00 00 00 00 1f 00 00 00  |..H.............|
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
  00000080 06 00 00 00 00 00 00 00  21 00 00 00 00 00 00 00  |........!.......|
Latency: 0, Cache Line Size: 64 bytes
+
  00000090 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
Interrupt: pin A routed to IRQ 42
+
  000000a0 05 b0 80 00 00 00 00 00 00 00 00 00 00 00 00 00  |................|
Region 0: Memory at c0000000 (32-bit, prefetchable) [size=256M]
+
  000000b0  0d b8 00 00 22 10 34 12 08 00 03 a8 00 00 00 00 |....".4.........|
Region 1: I/O ports at f000 [size=256]
+
  000000c0 00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
Region 2: Memory at feb00000 (32-bit, non-prefetchable) [size=256K]
+
  *
Expansion ROM at <unassigned> [disabled]
+
  000000e0 50 00 00 00 02 00 00 00  00 00 00 00 00 00 00 00  |P...............|
Capabilities: [50] Power Management version 3
+
  000000f0 00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
+
  00000100 0b 00 01 00 01 00 01 01  00 00 00 00 00 00 00 00  |................|
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
+
  00000110 02 00 01 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
Capabilities: [58] Express (v2) Root Complex Integrated Endpoint, MSI 00
+
  00000120  01 00 00 00 ff 00 00 80 00 00 00 00 01 00 00 00  |................|
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited
+
  00000130 00 00 00 00 00 00 02 00  00 00 00 00 00 00 00 00  |................|
ExtTag+ RBE+ FLReset-
+
  00000140 03 00 01 00 01 00 00 00 00 87 0c 00 00 00 00 00  |................|
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
+
  00000150 01 00 01 00 00 00 00 00  00 00 00 00 30 20 06 00  |............0 ..|
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
+
  00000160 00 00 00 00 00 20 00 00  00 00 00 00 00 00 00 00  |..... ..........|
MaxPayload 128 bytes, MaxReadReq 128 bytes
+
00000170  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00 |................|
DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq+ AuxPwr- TransPend-
+
*
LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us
+
  00000190  0d 00 01 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
ClockPM- Surprise- LLActRep- BwNot-
+
000001a0  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
+
*
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
+
00001000
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
+
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
+
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
+
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
+
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
+
Compliance De-emphasis: -6dB
+
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
+
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
+
Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+
+
Address: 00000000fee0300c  Data: 41a1
+
Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?>
+
Kernel driver in use: radeon
+
+
00:01.1 Audio device [0403]: Advanced Micro Devices, Inc. [AMD/ATI] Wrestler HDMI Audio [1002:1314]
+
Subsystem: Advanced Micro Devices, Inc. [AMD] Device [1022:1511]
+
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
Latency: 0, Cache Line Size: 64 bytes
+
Interrupt: pin B routed to IRQ 43
+
Region 0: Memory at feb44000 (32-bit, non-prefetchable) [size=16K]
+
Capabilities: [50] Power Management version 3
+
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
+
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
+
Capabilities: [58] Express (v2) Root Complex Integrated Endpoint, MSI 00
+
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited
+
ExtTag+ RBE+ FLReset-
+
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
+
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
+
MaxPayload 128 bytes, MaxReadReq 128 bytes
+
DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq+ AuxPwr- TransPend-
+
LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us
+
ClockPM- Surprise- LLActRep- BwNot-
+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
+
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
+
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
+
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
+
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
+
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
+
Compliance De-emphasis: -6dB
+
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
+
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
+
Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+
+
Address: 00000000fee0300c Data: 41b1
+
Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?>
+
Kernel driver in use: snd_hda_intel
+
   
+
  00:04.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Family 14h Processor Root Port [1022:1512] (prog-if 00 [Normal decode])
+
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
Latency: 0, Cache Line Size: 64 bytes
+
Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
+
I/O behind bridge: 00001000-00001fff
+
Memory behind bridge: d0200000-d03fffff
+
Prefetchable memory behind bridge: 00000000d0400000-00000000d05fffff
+
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
+
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
+
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
+
Capabilities: [50] Power Management version 3
+
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
+
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
+
Capabilities: [58] Express (v2) Root Port (Slot+), MSI 00
+
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
+
ExtTag+ RBE+ FLReset-
+
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
+
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
+
MaxPayload 128 bytes, MaxReadReq 128 bytes
+
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
+
LnkCap: Port #247, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <64ns, L1 <1us
+
ClockPM- Surprise- LLActRep+ BwNot+
+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
+
LnkSta: Speed unknown, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
+
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise-
+
Slot #4, PowerLimit 75.000W; Interlock- NoCompl+
+
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
+
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
+
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-
+
Changed: MRL- PresDet- LinkState-
+
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
+
RootCap: CRSVisible-
+
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
+
DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd-
+
DevCtl2: Completion Timeout: 65ms to 210ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
+
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis+
+
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
+
Compliance De-emphasis: -6dB
+
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
+
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
+
Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+
+
Address: 0000000000000000  Data: 0000
+
Capabilities: [b0] Subsystem: Advanced Micro Devices, Inc. [AMD] Device [1022:1234]
+
Capabilities: [b8] HyperTransport: MSI Mapping Enable+ Fixed+
+
Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?>
+
Kernel driver in use: pcieport
+
   
+
  00:06.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Family 14h Processor Root Port [1022:1514] (prog-if 00 [Normal decode])
+
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
Latency: 0, Cache Line Size: 64 bytes
+
Bus: primary=00, secondary=02, subordinate=02, sec-latency=0
+
I/O behind bridge: 0000e000-0000efff
+
Memory behind bridge: fff00000-000fffff
+
Prefetchable memory behind bridge: 00000000d0100000-00000000d01fffff
+
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
+
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
+
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
+
Capabilities: [50] Power Management version 3
+
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
+
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
+
Capabilities: [58] Express (v2) Root Port (Slot+), MSI 00
+
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
+
ExtTag+ RBE+ FLReset-
+
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
+
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+
+
MaxPayload 128 bytes, MaxReadReq 128 bytes
+
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
+
LnkCap: Port #3, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <64ns, L1 <1us
+
ClockPM- Surprise- LLActRep+ BwNot+
+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
+
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-
+
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
+
Slot #6, PowerLimit 75.000W; Interlock- NoCompl+
+
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
+
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
+
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
+
Changed: MRL- PresDet+ LinkState+
+
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
+
RootCap: CRSVisible-
+
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
+
DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd-
+
DevCtl2: Completion Timeout: 65ms to 210ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
+
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis+
+
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
+
Compliance De-emphasis: -6dB
+
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
+
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
+
Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+
+
Address: 0000000000000000  Data: 0000
+
Capabilities: [b0] Subsystem: Advanced Micro Devices, Inc. [AMD] Device [1022:1234]
+
Capabilities: [b8] HyperTransport: MSI Mapping Enable+ Fixed+
+
Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?>
+
Kernel driver in use: pcieport
+
   
+
  00:11.0 SATA controller [0106]: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 SATA Controller [AHCI mode] [1002:4391] (rev 40) (prog-if 01 [AHCI 1.0])
+
Subsystem: Advanced Micro Devices, Inc. [AMD/ATI] Device [1002:4393]
+
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
Latency: 32
+
Interrupt: pin A routed to IRQ 19
+
Region 0: I/O ports at f190 [size=8]
+
Region 1: I/O ports at f180 [size=4]
+
Region 2: I/O ports at f170 [size=8]
+
Region 3: I/O ports at f160 [size=4]
+
Region 4: I/O ports at f150 [size=16]
+
Region 5: Memory at feb4f000 (32-bit, non-prefetchable) [size=1K]
+
Capabilities: [70] SATA HBA v1.0 InCfgSpace
+
Capabilities: [a4] PCI Advanced Features
+
AFCap: TP+ FLR+
+
AFCtrl: FLR-
+
AFStatus: TP-
+
Kernel driver in use: ahci
+
+
00:12.0 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB OHCI0 Controller [1002:4397] (prog-if 10 [OHCI])
+
Subsystem: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB OHCI0 Controller [1002:4397]
+
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
Latency: 32, Cache Line Size: 64 bytes
+
Interrupt: pin A routed to IRQ 18
+
Region 0: Memory at feb4e000 (32-bit, non-prefetchable) [size=4K]
+
Kernel driver in use: ohci_hcd
+
   
+
  00:12.2 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB EHCI Controller [1002:4396] (prog-if 20 [EHCI])
+
Subsystem: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB EHCI Controller [1002:4396]
+
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
Latency: 32, Cache Line Size: 64 bytes
+
Interrupt: pin B routed to IRQ 17
+
Region 0: Memory at feb4d000 (32-bit, non-prefetchable) [size=256]
+
Capabilities: [c0] Power Management version 2
+
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)
+
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
+
Bridge: PM- B3+
+
Capabilities: [e4] Debug port: BAR=1 offset=00e0
+
Kernel driver in use: ehci-pci
+
   
+
  00:13.0 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB OHCI0 Controller [1002:4397] (prog-if 10 [OHCI])
+
Subsystem: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB OHCI0 Controller [1002:4397]
+
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
Latency: 32, Cache Line Size: 64 bytes
+
Interrupt: pin A routed to IRQ 18
+
Region 0: Memory at feb4c000 (32-bit, non-prefetchable) [size=4K]
+
Kernel driver in use: ohci_hcd
+
   
+
  00:13.2 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB EHCI Controller [1002:4396] (prog-if 20 [EHCI])
+
Subsystem: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB EHCI Controller [1002:4396]
+
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
Latency: 32, Cache Line Size: 64 bytes
+
Interrupt: pin B routed to IRQ 17
+
Region 0: Memory at feb4b000 (32-bit, non-prefetchable) [size=256]
+
Capabilities: [c0] Power Management version 2
+
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)
+
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME+
+
Bridge: PM- B3+
+
Capabilities: [e4] Debug port: BAR=1 offset=00e0
+
Kernel driver in use: ehci-pci
+
+
00:14.0 SMBus [0c05]: Advanced Micro Devices, Inc. [AMD/ATI] SBx00 SMBus Controller [1002:4385] (rev 42)
+
Subsystem: Advanced Micro Devices, Inc. [AMD/ATI] SBx00 SMBus Controller [1002:4385]
+
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
+
Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
Kernel driver in use: piix4_smbus
+
   
+
  00:14.1 IDE interface [0101]: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 IDE Controller [1002:439c] (rev 40) (prog-if 8a [Master SecP PriP])
+
Subsystem: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 IDE Controller [1002:439c]
+
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
Latency: 32
+
Interrupt: pin B routed to IRQ 17
+
Region 0: I/O ports at 01f0 [size=8]
+
Region 1: I/O ports at 03f4
+
Region 2: I/O ports at 0170 [size=8]
+
Region 3: I/O ports at 0374
+
Region 4: I/O ports at f100 [size=16]
+
Kernel driver in use: pata_atiixp
+
   
+
  00:14.2 Audio device [0403]: Advanced Micro Devices, Inc. [AMD/ATI] SBx00 Azalia (Intel HDA) [1002:4383] (rev 40)
+
Subsystem: Jetway Information Co., Ltd. Device [16f3:1705]
+
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
Latency: 32, Cache Line Size: 64 bytes
+
Interrupt: pin A routed to IRQ 16
+
Region 0: Memory at feb40000 (64-bit, non-prefetchable) [size=16K]
+
Capabilities: [50] Power Management version 2
+
Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
+
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
+
Kernel driver in use: snd_hda_intel
+
   
+
  00:14.3 ISA bridge [0601]: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 LPC host controller [1002:439d] (rev 40)
+
Subsystem: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 LPC host controller [1002:439d]
+
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
Latency: 0
+
   
+
  00:14.4 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD/ATI] SBx00 PCI to PCI Bridge [1002:4384] (rev 40) (prog-if 01 [Subtractive decode])
+
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop+ ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
Latency: 64
+
Bus: primary=00, secondary=03, subordinate=03, sec-latency=64
+
I/O behind bridge: 0000f000-00000fff
+
Memory behind bridge: fff00000-000fffff
+
Prefetchable memory behind bridge: fff00000-000fffff
+
Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
+
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
+
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
+
   
+
  00:14.5 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB OHCI2 Controller [1002:4399] (prog-if 10 [OHCI])
+
Subsystem: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB OHCI2 Controller [1002:4399]
+
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
Latency: 32, Cache Line Size: 64 bytes
+
Interrupt: pin C routed to IRQ 18
+
Region 0: Memory at feb4a000 (32-bit, non-prefetchable) [size=4K]
+
Kernel driver in use: ohci_hcd
+
   
+
  00:15.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD/ATI] SB700/SB800/SB900 PCI to PCI bridge (PCIE port 0) [1002:43a0] (prog-if 00 [Normal decode])
+
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
Latency: 0, Cache Line Size: 64 bytes
+
Bus: primary=00, secondary=04, subordinate=04, sec-latency=0
+
I/O behind bridge: 0000d000-0000dfff
+
Memory behind bridge: fff00000-000fffff
+
Prefetchable memory behind bridge: 00000000d0000000-00000000d00fffff
+
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
+
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
+
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
+
Capabilities: [50] Power Management version 3
+
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
+
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
+
Capabilities: [58] Express (v2) Root Port (Slot-), MSI 00
+
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
+
ExtTag+ RBE+ FLReset-
+
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
+
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+
+
MaxPayload 128 bytes, MaxReadReq 128 bytes
+
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
+
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <64ns, L1 <1us
+
ClockPM- Surprise- LLActRep+ BwNot+
+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
+
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-
+
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
+
RootCap: CRSVisible-
+
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
+
DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd-
+
DevCtl2: Completion Timeout: 65ms to 210ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
+
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
+
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
+
Compliance De-emphasis: -6dB
+
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
+
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
+
Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+
+
Address: 0000000000000000 Data: 0000
+
Capabilities: [b0] Subsystem: Advanced Micro Devices, Inc. [AMD/ATI] Device [1002:0000]
+
Capabilities: [b8] HyperTransport: MSI Mapping Enable+ Fixed+
+
Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?>
+
Kernel driver in use: pcieport
+
   
+
  00:16.0 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB OHCI0 Controller [1002:4397] (prog-if 10 [OHCI])
+
Subsystem: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB OHCI0 Controller [1002:4397]
+
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
Latency: 32, Cache Line Size: 64 bytes
+
Interrupt: pin A routed to IRQ 18
+
Region 0: Memory at feb49000 (32-bit, non-prefetchable) [size=4K]
+
Kernel driver in use: ohci_hcd
+
   
+
  00:16.2 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB EHCI Controller [1002:4396] (prog-if 20 [EHCI])
+
Subsystem: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB EHCI Controller [1002:4396]
+
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
Latency: 32, Cache Line Size: 64 bytes
+
Interrupt: pin B routed to IRQ 17
+
Region 0: Memory at feb48000 (32-bit, non-prefetchable) [size=256]
+
Capabilities: [c0] Power Management version 2
+
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)
+
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
+
Bridge: PM- B3+
+
Capabilities: [e4] Debug port: BAR=1 offset=00e0
+
Kernel driver in use: ehci-pci
+
   
+
  00:18.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 0 [1022:1700] (rev 43)
+
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
   
+
  00:18.1 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 1 [1022:1701]
+
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
   
+
  00:18.2 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 2 [1022:1702]
+
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
   
+
  00:18.3 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 3 [1022:1703]
+
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
Capabilities: [f0] Secure device <?>
+
Kernel driver in use: k10temp
+
   
+
  00:18.4 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 4 [1022:1704]
+
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
   
+
  00:18.5 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 6 [1022:1718]
+
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
   
+
  00:18.6 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 5 [1022:1716]
+
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
   
+
  00:18.7 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 7 [1022:1719]
+
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
   
+
  02:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller [10ec:8168] (rev 06)
+
Subsystem: Realtek Semiconductor Co., Ltd. RTL8111/8168 PCI Express Gigabit Ethernet controller [10ec:8168]
+
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
Latency: 0, Cache Line Size: 64 bytes
+
Interrupt: pin A routed to IRQ 40
+
Region 0: I/O ports at e000 [size=256]
+
Region 2: Memory at d0104000 (64-bit, prefetchable) [size=4K]
+
Region 4: Memory at d0100000 (64-bit, prefetchable) [size=16K]
+
Capabilities: [40] Power Management version 3
+
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
+
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
+
Capabilities: [50] MSI: Enable+ Count=1/1 Maskable- 64bit+
+
Address: 00000000fee0300c  Data: 4171
+
Capabilities: [70] Express (v2) Endpoint, MSI 01
+
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us
+
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
+
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
+
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
+
MaxPayload 128 bytes, MaxReadReq 4096 bytes
+
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend-
+
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <512ns, L1 <64us
+
ClockPM+ Surprise- LLActRep- BwNot-
+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
+
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
+
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported
+
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
+
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
+
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
+
Compliance De-emphasis: -6dB
+
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
+
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
+
Capabilities: [b0] MSI-X: Enable- Count=4 Masked-
+
Vector table: BAR=4 offset=00000000
+
PBA: BAR=4 offset=00000800
+
Capabilities: [d0] Vital Product Data
+
Unknown small resource type 00, will not decode more.
+
Capabilities: [100 v1] Advanced Error Reporting
+
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
+
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
+
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
+
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
+
AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
+
Capabilities: [140 v1] Virtual Channel
+
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
+
Arb: Fixed- WRR32- WRR64- WRR128-
+
Ctrl: ArbSelect=Fixed
+
Status: InProgress-
+
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
+
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
+
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01
+
Status: NegoPending- InProgress-
+
Capabilities: [160 v1] Device Serial Number 01-00-00-00-68-4c-e0-00
+
Kernel driver in use: r8169
+
   
+
  04:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller [10ec:8168] (rev 06)
+
Subsystem: Realtek Semiconductor Co., Ltd. RTL8111/8168 PCI Express Gigabit Ethernet controller [10ec:8168]
+
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+
Latency: 0, Cache Line Size: 64 bytes
+
Interrupt: pin A routed to IRQ 41
+
Region 0: I/O ports at d000 [size=256]
+
Region 2: Memory at d0004000 (64-bit, prefetchable) [size=4K]
+
Region 4: Memory at d0000000 (64-bit, prefetchable) [size=16K]
+
Capabilities: [40] Power Management version 3
+
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
+
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
+
Capabilities: [50] MSI: Enable+ Count=1/1 Maskable- 64bit+
+
Address: 00000000fee0300c Data: 4181
+
Capabilities: [70] Express (v2) Endpoint, MSI 01
+
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us
+
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
+
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
+
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
+
MaxPayload 128 bytes, MaxReadReq 4096 bytes
+
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
+
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <512ns, L1 <64us
+
ClockPM+ Surprise- LLActRep- BwNot-
+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
+
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
+
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported
+
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
+
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
+
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
+
Compliance De-emphasis: -6dB
+
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
+
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
+
Capabilities: [b0] MSI-X: Enable- Count=4 Masked-
+
Vector table: BAR=4 offset=00000000
+
PBA: BAR=4 offset=00000800
+
Capabilities: [d0] Vital Product Data
+
Unknown small resource type 00, will not decode more.
+
Capabilities: [100 v1] Advanced Error Reporting
+
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
+
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
+
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
+
CESta: RxErr+ BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
+
AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
+
Capabilities: [140 v1] Virtual Channel
+
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
+
Arb: Fixed- WRR32- WRR64- WRR128-
+
Ctrl: ArbSelect=Fixed
+
Status: InProgress-
+
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
+
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
+
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01
+
Status: NegoPending- InProgress-
+
Capabilities: [160 v1] Device Serial Number 02-00-00-00-68-4c-e0-00
+
Kernel driver in use: r8169
+
  
 +
Investigate in board support:
 +
* acpi/routing.asl
 +
* mptable.c
  
=== SuperI/O tool log ===
+
=== weird AGESA issue ===
  
  superiotool r4.0-5364-gb16690d
+
The function call goes something like this; In
Found Fintek F71869AD (vid=0x3419, id=0x0710) at 0x2e
+
  mainboard/jetway/nf81-t56n-lf/agesawrapper.c
Register dump:
+
the function
idx 02 07 20 21 25 26 27 28  29 2a 2b 2c 2d
+
  UINT32 agesawrapper_amdinitpost(VOID)
val 00 0b 10 07 00 00 a1 01  6f 24 00 60 2f
+
calls
def 00 00 08 14 00 00 MM 38  6f 07 0f 00 28
+
  status = AmdInitPost ((AMD_POST_PARAMS *)AmdParamStruct.NewStructPtr);
  LDN 0x00 (Floppy)
+
this returns a error code of
idx 30 60 61 70 74 f0 f2 f4
+
  AGESA_WARNING = 0x4
  val 00 03 f0 06 02 0e ff 00
+
this triggers
def 01 03 f0 06 02 0e 03 00
+
  if(status != AGESA_SUCCESS) agesawrapper_amdreadeventlog();
LDN 0x01 (COM1)
+
giving the resulting message:
idx 30 60 61 70 f0
+
val 01 03 f8 04 00
+
def 01 03 f8 04 00
+
LDN 0x02 (COM2)
+
idx 30 60 61 70 f0 f1
+
val 00 02 f8 03 00 44
+
def 01 02 f8 03 00 04
+
LDN 0x03 (Parallel port)
+
idx 30 60 61 70 74 f0
+
  val 00 03 78 07 03 42
+
def 01 03 78 07 03 42
+
  LDN 0x04 (Hardware monitor)
+
idx 30 60 61 70
+
val 01 02 25 00
+
def 01 02 95 00
+
LDN 0x05 (Keyboard)
+
idx 30 60 61 70 72 f0 fe ff
+
val 01 00 60 01 0c ff 81 29
+
def 01 00 60 01 0c 83 81 29
+
LDN 0x06 (GPIO)
+
idx 30 60 61 70 f0 f1 f2 f3  e0 e1 e2 e3 e4 e5 e6 d0  d1 d2 d3 c0 c1 c2 b0 b1  b2 b3 a0 a1 a2 a3 90 91  92 93
+
val 01 0a 00 00 00 3f 00 00  20 df 91 00 00 00 05 00  ff a7 00 ff 00 00 00 ff  73 00 00 1f 00 ff 00 ff  00 00
+
def 00 00 00 00 00 3f NA 00  00 ff NA 00 00 00 00 00  ff NA 00 00 ff NA 00 0f  NA 00 00 1f NA 00 00 3f  NA 00
+
LDN 0x07 (BSEL)
+
idx 30 60 61 f0 f2 f3 f4 f5  f6 f7
+
val 00 00 00 01 ff ff ff 12  0a 01
+
def 00 00 00 01 00 00 NA 00  0a 00
+
LDN 0x0a (PME, ACPI)
+
idx 30 f0 f1 f2 f3 f4 f5 f6  f7 f8 f9 fe ff
+
val 00 00 6a 00 00 46 1c 1f  86 00 00 00 00
+
def 00 00 00 NA NA 06 1c 1f  86 00 00 00 00
+
  
== Building a coreboot image ==
+
EventLog:      EventClass = 2, EventInfo = 8040100.
 +
...
 +
 
 +
grep'ing we have that:
 +
AGESA.h:#define CPU_ERROR_HEAP_BUFFER_HANDLE_IS_NOT_PRESENT    0x08040100ul
 +
 
 +
However tracing the call back to where '''AGESA_WARNING''' is set goes back to:
 +
vendor/amd/agesa/f14/Proc/Mem/Main/mmflow.c
 +
line '''290''' here:
 +
Retval = NBPtr[Die].MCTPtr->ErrCode;
 +
with '''Die=0'''.
 +
 
 +
=== Coreboot S3 suspend/resume ===
 +
 
 +
S3 Suspend/Resume works by running:
 +
# echo "mem" > /sys/power/state
 +
However a issue remains of wanrings about resources being '''not assigned'''.
 +
 
 +
For details see in '''src/device/pnp_device.c''' the function:
 +
 
 +
static void pnp_set_resource(device_t dev, struct resource *resource)
 +
{
 +
if (!(resource->flags & IORESOURCE_ASSIGNED)) {
 +
printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx "
 +
      "not assigned\n", dev_path(dev), resource->index,
 +
      resource_type(resource), resource->size);
 +
return;
 +
}
 +
  ...
 +
 
 +
and in '''src/device/device_util.c'''  the function:
 +
 
 +
const char *resource_type(struct resource *resource)
 +
{
 +
static char buffer[RESOURCE_TYPE_MAX];
 +
snprintf(buffer, sizeof (buffer), "%s%s%s%s",
 +
((resource->flags & IORESOURCE_READONLY) ? "ro" : ""),
 +
((resource->flags & IORESOURCE_PREFETCH) ? "pref" : ""),
 +
((resource->flags == 0) ? "unused" :
 +
  (resource->flags & IORESOURCE_IO) ? "io" :
 +
  (resource->flags & IORESOURCE_DRQ) ? "drq" :
 +
  (resource->flags & IORESOURCE_IRQ) ? "irq" :
 +
  (resource->flags & IORESOURCE_MEM) ? "mem" : "??????"),
 +
((resource->flags & IORESOURCE_PCI64) ? "64" : ""));
 +
return buffer;
 +
}
 +
 
 +
and in '''src/include/device/resource.h''' the struct resource:
 +
 
 +
struct resource {
 +
..
 +
  unsigned long index; /* Bus specific per device resource id */
 +
..
 +
 
 +
Analysis:
 +
 +
  ERROR: PCI: 00:18.0 1088 ??????64 size: 0x0000000000 not assigned
 +
        -----------^ ---^ -------^      -----------^
 +
                    |    |        |                  |
 +
                    |    |        |                  +--- resource->size
 +
                    |    |        |
 +
                    |    |        +--- resource_type(resource)
 +
                    |    |
 +
                    |    +--- resource->index
 +
                    |
 +
                    +--- dev_path(dev)
  
XXX: to complete..
+
A '''dev_path''' of type '''DEVICE_PATH_PCI''' (Host Bridge) at 18.0 of '''IORESOURCE_MEM''' type has a bus specific index of '''1088'''.
  
== Coreboot boot log ==
+
Possibly related to the devicetree.cb ??
  
  coreboot-4.0-5365-gdbef612-dirty-alterapraxisptyltd Mon Jan 27 19:18:58 EST 2014 starting...
+
See log below:
  BSP Family_Model: 00500f20
+
 
cpu_init_detectedx = 00000000
+
Booting from Hard Disk...
agesawrapper_amdinitmmio passed.
+
Booting from 0000:7c00
agesawrapper_amdinitreset passed.
+
àüüàààüàààààààüüàààààààààààüüüüüüààààüüàüààüüààüàüüàààüüààüüüü                                                                                                                                                      à
agesawrapper_amdinitearly passed.                                                                                       
+
agesawrapper_amdinitpost passed.                                                                                         
+
  coreboot-4.0-5634-gfe71e8b-ap-jupiter-alpha Mon Mar 10 02:01:03 EST 2014 starting...
agesawrapper_amdinitenv BiosAllocateBuffer BiosHeapBaseAddr: 10000                                                       
+
  S3 detected
BiosAllocateBuffer BiosHeapBaseAddr: 10000                                                                               
+
  CBFS: loading stage fallback/coreboot_ram @ 0x200000 (1429552 bytes), entry @ 0x200000
BiosAllocateBuffer BiosHeapBaseAddr: 10000                                                                               
+
  coreboot-4.0-5634-gfe71e8b-ap-jupiter-alpha Mon Mar 10 02:01:03 EST 2014 booting...
passed.
+
Loading image.
+
  CBFS: loading stage fallback/coreboot_ram @ 0x200000 (1343532 bytes), entry @ 0x200000
+
Jumping to image.
+
  coreboot-4.0-5365-gdbef612-dirty-alterapraxisptyltd Mon Jan 27 19:18:58 EST 2014 booting...
+
BS: BS_PRE_DEVICE times (us): entry 0 run 2 exit 0
+
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 6 exit 0
+
 
  Enumerating buses...
 
  Enumerating buses...
Show all devs...Before device enumeration.
 
Root Device: enabled 1
 
CPU_CLUSTER: 0: enabled 1
 
APIC: 00: enabled 1
 
DOMAIN: 0000: enabled 1
 
PCI: 00:00.0: enabled 1
 
PCI: 00:01.0: enabled 1
 
PCI: 00:01.1: enabled 1
 
PCI: 00:04.0: enabled 1
 
PCI: 00:05.0: enabled 0
 
PCI: 00:06.0: enabled 1
 
PCI: 00:07.0: enabled 0
 
PCI: 00:08.0: enabled 0
 
PCI: 00:11.0: enabled 1
 
PCI: 00:12.0: enabled 1
 
PCI: 00:12.2: enabled 1
 
PCI: 00:13.0: enabled 1
 
PCI: 00:13.2: enabled 1
 
PCI: 00:14.0: enabled 1
 
I2C: 00:50: enabled 1
 
I2C: 00:51: enabled 1
 
PCI: 00:14.1: enabled 1
 
PCI: 00:14.2: enabled 1
 
PCI: 00:14.3: enabled 1
 
PNP: 004e.0: enabled 0
 
PNP: 004e.3: enabled 0
 
PNP: 004e.4: enabled 0
 
PNP: 004e.5: enabled 1
 
PNP: 004e.6: enabled 0
 
PNP: 004e.a: enabled 0
 
PNP: 004e.10: enabled 1
 
PNP: 004e.11: enabled 1
 
PCI: 00:14.4: enabled 1
 
PCI: 00:14.5: enabled 1
 
PCI: 00:14.6: enabled 0
 
PCI: 00:15.0: enabled 1
 
PCI: 00:15.1: enabled 0
 
PCI: 00:15.2: enabled 0
 
PCI: 00:15.3: enabled 0
 
PCI: 00:16.0: enabled 1
 
PCI: 00:16.2: enabled 1
 
PCI: 00:18.0: enabled 1
 
PCI: 00:18.1: enabled 1
 
PCI: 00:18.2: enabled 1
 
PCI: 00:18.3: enabled 1
 
PCI: 00:18.4: enabled 1
 
PCI: 00:18.5: enabled 1
 
PCI: 00:18.6: enabled 1
 
PCI: 00:18.7: enabled 1
 
Compare with tree...
 
Root Device: enabled 1
 
  CPU_CLUSTER: 0: enabled 1
 
  APIC: 00: enabled 1
 
  DOMAIN: 0000: enabled 1
 
  PCI: 00:00.0: enabled 1
 
  PCI: 00:01.0: enabled 1
 
  PCI: 00:01.1: enabled 1
 
  PCI: 00:04.0: enabled 1
 
  PCI: 00:05.0: enabled 0
 
  PCI: 00:06.0: enabled 1
 
  PCI: 00:07.0: enabled 0
 
  PCI: 00:08.0: enabled 0
 
  PCI: 00:11.0: enabled 1
 
  PCI: 00:12.0: enabled 1
 
  PCI: 00:12.2: enabled 1
 
  PCI: 00:13.0: enabled 1
 
  PCI: 00:13.2: enabled 1
 
  PCI: 00:14.0: enabled 1
 
    I2C: 00:50: enabled 1
 
    I2C: 00:51: enabled 1
 
  PCI: 00:14.1: enabled 1
 
  PCI: 00:14.2: enabled 1
 
  PCI: 00:14.3: enabled 1
 
    PNP: 004e.0: enabled 0
 
    PNP: 004e.3: enabled 0
 
    PNP: 004e.4: enabled 0
 
    PNP: 004e.5: enabled 1
 
    PNP: 004e.6: enabled 0
 
    PNP: 004e.a: enabled 0
 
    PNP: 004e.10: enabled 1
 
    PNP: 004e.11: enabled 1
 
  PCI: 00:14.4: enabled 1
 
  PCI: 00:14.5: enabled 1
 
  PCI: 00:14.6: enabled 0
 
  PCI: 00:15.0: enabled 1
 
  PCI: 00:15.1: enabled 0
 
  PCI: 00:15.2: enabled 0
 
  PCI: 00:15.3: enabled 0
 
  PCI: 00:16.0: enabled 1
 
  PCI: 00:16.2: enabled 1
 
  PCI: 00:18.0: enabled 1
 
  PCI: 00:18.1: enabled 1
 
  PCI: 00:18.2: enabled 1
 
  PCI: 00:18.3: enabled 1
 
  PCI: 00:18.4: enabled 1
 
  PCI: 00:18.5: enabled 1
 
  PCI: 00:18.6: enabled 1
 
  PCI: 00:18.7: enabled 1
 
 
  Mainboard NF81-T56N-LF Enable.
 
  Mainboard NF81-T56N-LF Enable.
scan_static_bus for Root Device
 
 
  setup_bsp_ramtop, TOP MEM: msr.lo = 0xe0000000, msr.hi = 0x00000000
 
  setup_bsp_ramtop, TOP MEM: msr.lo = 0xe0000000, msr.hi = 0x00000000
 
  setup_bsp_ramtop, TOP MEM2: msr.lo = 0x1f000000, msr.hi = 0x00000001
 
  setup_bsp_ramtop, TOP MEM2: msr.lo = 0x1f000000, msr.hi = 0x00000001
 
  setup_uma_memory: uma size 0x18000000, memory start 0xc8000000
 
  setup_uma_memory: uma size 0x18000000, memory start 0xc8000000
CPU_CLUSTER: 0 enabled
 
DOMAIN: 0000 enabled
 
CPU_CLUSTER: 0 scanning...
 
  AP siblings=1
 
CPU: APIC: 00 enabled
 
CPU: APIC: 01 enabled
 
DOMAIN: 0000 scanning...
 
PCI: pci_scan_bus for bus 00
 
PCI: 00:00.0 [1022/1510] ops
 
PCI: 00:00.0 [1022/1510] enabled
 
PCI: 00:01.0 [1002/9806] enabled
 
 
  PCI: Static device PCI: 00:04.0 not found, disabling it.
 
  PCI: Static device PCI: 00:04.0 not found, disabling it.
  Capability: type 0x01 @ 0x50
+
  sm_init().
Capability: type 0x10 @ 0x58
+
  Enabling Common Clock Configuration
Capability: type 0x05 @ 0xa0
+
  ASPM: Enabled L0s and L1
Capability: type 0x0d @ 0xb0
+
  Enabling Common Clock Configuration
Capability: type 0x08 @ 0xb8
+
  ASPM: Enabled L0s and L1
Capability: type 0x01 @ 0x50
+
Capability: type 0x10 @ 0x58
+
PCI: 00:06.0 subordinate bus PCI Express
+
PCI: 00:06.0 [1022/1514] enabled
+
sb800_enable() SB800 - Smbus.c - alink_ab_indx - Start.
+
SB800 - Smbus.c - alink_ab_indx - End.
+
PCI: 00:11.0 [1002/4393] ops
+
PCI: 00:11.0 [1002/4393] enabled
+
sb800_enable() PCI: 00:12.0 [1002/4397] ops
+
PCI: 00:12.0 [1002/4397] enabled
+
sb800_enable() PCI: 00:12.2 [1002/4396] ops
+
PCI: 00:12.2 [1002/4396] enabled
+
sb800_enable() PCI: 00:13.0 [1002/4397] ops
+
PCI: 00:13.0 [1002/4397] enabled
+
sb800_enable() PCI: 00:13.2 [1002/4396] ops
+
PCI: 00:13.2 [1002/4396] enabled
+
sb800_enable() sm_init().
+
  IOAPIC: Clearing IOAPIC at 0xfec00000
+
  IOAPIC: 24 interrupts
+
  IOAPIC: reg 0x00000000 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
+
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
+
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
+
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
+
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
+
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
+
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
+
IOAPIC: Initializing IOAPIC at 0xfec00000
+
IOAPIC: Bootstrap Processor Local APIC = 0x00
+
IOAPIC: ID = 0x02
+
IOAPIC: Dumping registers
+
  reg 0x0000: 0x02000000
+
  reg 0x0001: 0x00178021
+
  reg 0x0002: 0x02000000
+
IOAPIC: 24 interrupts
+
IOAPIC: Enabling interrupts on FSB
+
  IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
+
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
+
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
+
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
+
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
+
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
+
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
+
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
+
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
+
PCI: 00:14.0 [1002/4385] enabled
+
sb800_enable() PCI: Static device PCI: 00:14.1 not found, disabling it.
+
sb800_enable() hda enabled
+
PCI: 00:14.2 [1002/4383] ops
+
PCI: 00:14.2 [1002/4383] enabled
+
sb800_enable() PCI: 00:14.3 [1002/439d] bus ops
+
PCI: 00:14.3 [1002/439d] enabled
+
sb800_enable() PCI: 00:14.4 [1002/4384] bus ops
+
PCI: 00:14.4 [1002/4384] enabled
+
sb800_enable() PCI: 00:14.5 [1002/4399] ops
+
PCI: 00:14.5 [1002/4399] enabled
+
sb800_enable() gec disabled
+
sb800_enable() Capability: type 0x01 @ 0x50
+
Capability: type 0x10 @ 0x58
+
Capability: type 0x0d @ 0xb0
+
Capability: type 0x08 @ 0xb8
+
Capability: type 0x01 @ 0x50
+
Capability: type 0x10 @ 0x58
+
PCI: 00:15.0 subordinate bus PCI Express
+
PCI: 00:15.0 [1002/43a0] enabled
+
sb800_enable() Capability: type 0x01 @ 0x50
+
Capability: type 0x10 @ 0x58
+
Capability: type 0x0d @ 0xb0
+
Capability: type 0x08 @ 0xb8
+
Capability: type 0x01 @ 0x50
+
Capability: type 0x10 @ 0x58
+
PCI: 00:15.1 subordinate bus PCI Express
+
PCI: 00:15.1 [1002/43a1] disabled
+
sb800_enable() Capability: type 0x01 @ 0x50
+
Capability: type 0x10 @ 0x58
+
Capability: type 0x0d @ 0xb0
+
Capability: type 0x08 @ 0xb8
+
Capability: type 0x01 @ 0x50
+
Capability: type 0x10 @ 0x58
+
PCI: 00:15.2 subordinate bus PCI Express
+
PCI: 00:15.2 [1002/43a2] disabled
+
sb800_enable() Capability: type 0x01 @ 0x50
+
Capability: type 0x10 @ 0x58
+
Capability: type 0x0d @ 0xb0
+
Capability: type 0x08 @ 0xb8
+
Capability: type 0x01 @ 0x50
+
Capability: type 0x10 @ 0x58
+
PCI: 00:15.3 subordinate bus PCI Express
+
PCI: 00:15.3 [1002/43a3] disabled
+
sb800_enable() PCI: 00:16.0 [1002/4397] ops
+
PCI: 00:16.0 [1002/4397] enabled
+
sb800_enable() SB800 - Late.c - sb800_callout_entry - Start.
+
SB800 - Late.c - sb800_callout_entry - End.
+
SB800 - Late.c - sb800_callout_entry - Start.
+
SB800 - Late.c - sb800_callout_entry - End.
+
SB800 - Late.c - sb800_callout_entry - Start.
+
SB800 - Late.c - sb800_callout_entry - End.
+
SB800 - Late.c - sb800_callout_entry - Start.
+
SB800 - Late.c - sb800_callout_entry - End.
+
SB800 - Late.c - sb800_callout_entry - Start.
+
SB800 - Late.c - sb800_callout_entry - End.
+
SB800 - Late.c - sb800_callout_entry - Start.
+
SB800 - Late.c - sb800_callout_entry - End.
+
SB800 - Late.c - sb800_callout_entry - Start.
+
SB800 - Late.c - sb800_callout_entry - End.
+
SB800 - Late.c - sb800_callout_entry - Start.
+
SB800 - Late.c - sb800_callout_entry - End.
+
SB800 - Late.c - sb800_callout_entry - Start.
+
SB800 - Late.c - sb800_callout_entry - End.
+
SB800 - Late.c - sb800_callout_entry - Start.
+
SB800 - Late.c - sb800_callout_entry - End.
+
SB800 - Late.c - sb800_callout_entry - Start.
+
SB800 - Late.c - sb800_callout_entry - End.
+
SB800 - Late.c - sb800_callout_entry - Start.
+
SB800 - Late.c - sb800_callout_entry - End.
+
SB800 - Late.c - sb800_callout_entry - Start.
+
SB800 - Late.c - sb800_callout_entry - End.
+
SB800 - Late.c - sb800_callout_entry - Start.
+
SB800 - Late.c - sb800_callout_entry - End.
+
SB800 - Late.c - sb800_callout_entry - Start.
+
SB800 - Late.c - sb800_callout_entry - End.
+
SB800 - Late.c - sb800_callout_entry - Start.
+
SB800 - Late.c - sb800_callout_entry - End.
+
PCI: 00:16.2 [1002/4396] ops
+
PCI: 00:16.2 [1002/4396] enabled
+
PCI: 00:18.0 [1022/1700] enabled
+
PCI: 00:18.1 [1022/1701] enabled
+
PCI: 00:18.2 [1022/1702] enabled
+
PCI: 00:18.3 [1022/1703] enabled
+
PCI: 00:18.4 [1022/1704] enabled
+
PCI: 00:18.5 [1022/1718] enabled
+
PCI: 00:18.6 [1022/1716] enabled
+
PCI: 00:18.7 [1022/1719] enabled
+
PCI: Left over static devices:
+
PCI: 00:01.1
+
PCI: Check your devicetree.cb.
+
do_pci_scan_bridge for PCI: 00:06.0
+
PCI: pci_scan_bus for bus 01
+
PCI: 01:00.0 [10ec/8168] enabled
+
PCI: pci_scan_bus returning with max=001
+
Capability: type 0x01 @ 0x40
+
Capability: type 0x05 @ 0x50
+
Capability: type 0x10 @ 0x70
+
Capability: type 0x01 @ 0x50
+
Capability: type 0x10 @ 0x58
+
do_pci_scan_bridge returns max 1
+
scan_static_bus for PCI: 00:14.3
+
PNP: 004e.0 disabled
+
PNP: 004e.3 disabled
+
PNP: 004e.4 disabled
+
PNP: 004e.5 enabled
+
PNP: 004e.6 disabled
+
PNP: 004e.a disabled
+
PNP: 004e.10 enabled
+
PNP: 004e.11 enabled
+
PNP: 004e.1 enabled
+
PNP: 004e.2 enabled
+
PNP: 004e.7 enabled
+
scan_static_bus for PCI: 00:14.3 done
+
do_pci_scan_bridge for PCI: 00:14.4
+
PCI: pci_scan_bus for bus 02
+
PCI: pci_scan_bus returning with max=002
+
do_pci_scan_bridge returns max 2
+
do_pci_scan_bridge for PCI: 00:15.0
+
PCI: pci_scan_bus for bus 03
+
PCI: pci_scan_bus returning with max=003
+
do_pci_scan_bridge returns max 3
+
PCI: pci_scan_bus returning with max=003
+
scan_static_bus for Root Device done
+
 
  done
 
  done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 4525821 exit 0
 
found VGA at PCI: 00:01.0
 
Setting up VGA for PCI: 00:01.0
 
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 
 
  Allocating resources...
 
  Allocating resources...
 
  Reading resources...
 
  Reading resources...
Root Device read_resources bus 0 link: 0
 
CPU_CLUSTER: 0 read_resources bus 0 link: 0
 
 
  APIC: 00 missing read_resources
 
  APIC: 00 missing read_resources
 
  APIC: 01 missing read_resources
 
  APIC: 01 missing read_resources
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 
 
Fam14h - domain_read_resources
 
DOMAIN: 0000 read_resources bus 0 link: 0
 
 
Fam14h - nb_read_resources
 
PCI: 00:06.0 read_resources bus 1 link: 0
 
PCI: 00:06.0 read_resources bus 1 link: 0 done
 
PCI: 00:14.0 read_resources bus 0 link: 0
 
 
  I2C: 00:50 missing read_resources
 
  I2C: 00:50 missing read_resources
 
  I2C: 00:51 missing read_resources
 
  I2C: 00:51 missing read_resources
PCI: 00:14.0 read_resources bus 0 link: 0 done
 
SB800 - Lpc.c - lpc_read_resources - Start.
 
SB800 - Lpc.c - lpc_read_resources - End.
 
PCI: 00:14.3 read_resources bus 0 link: 0
 
PNP: 004e.10 missing read_resources
 
PNP: 004e.11 missing read_resources
 
PCI: 00:14.3 read_resources bus 0 link: 0 done
 
PCI: 00:14.4 read_resources bus 2 link: 0
 
PCI: 00:14.4 read_resources bus 2 link: 0 done
 
PCI: 00:15.0 register 10(ffffffff), read-only ignoring it
 
PCI: 00:15.0 register 14(ffffffff), read-only ignoring it
 
PCI: 00:15.0 register 38(ffffffff), read-only ignoring it
 
PCI: 00:15.0 read_resources bus 3 link: 0
 
PCI: 00:15.0 read_resources bus 3 link: 0 done
 
DOMAIN: 0000 read_resources bus 0 link: 0 done
 
Root Device read_resources bus 0 link: 0 done
 
 
  Done reading resources.
 
  Done reading resources.
Show resources in subtree (Root Device)...After reading.
 
  Root Device child on link 0 CPU_CLUSTER: 0
 
  CPU_CLUSTER: 0 child on link 0 APIC: 00
 
    APIC: 00
 
    APIC: 01
 
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
 
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
 
    PCI: 00:00.0
 
    PCI: 00:00.0 resource base f8000000 size 1000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
 
    PCI: 00:01.0
 
    PCI: 00:01.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
 
    PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14
 
    PCI: 00:01.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 18
 
    PCI: 00:04.0
 
    PCI: 00:05.0
 
    PCI: 00:06.0 child on link 0 PCI: 01:00.0
 
    PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
 
    PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 
    PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 
    PCI: 01:00.0
 
    PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
 
    PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18
 
    PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20
 
    PCI: 00:07.0
 
    PCI: 00:08.0
 
    PCI: 00:11.0
 
    PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
 
    PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
 
    PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
 
    PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
 
    PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
 
    PCI: 00:11.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24
 
    PCI: 00:12.0
 
    PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 
    PCI: 00:12.2
 
    PCI: 00:12.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
 
    PCI: 00:13.0
 
    PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 
    PCI: 00:13.2
 
    PCI: 00:13.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
 
    PCI: 00:14.0 child on link 0 I2C: 00:50
 
    I2C: 00:50
 
    I2C: 00:51
 
    PCI: 00:14.1
 
    PCI: 00:14.2
 
    PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 
    PCI: 00:14.3 child on link 0 PNP: 004e.0
 
    PCI: 00:14.3 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 200 index a0
 
    PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
 
    PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
 
    PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
 
    PNP: 004e.0
 
    PNP: 004e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
 
    PNP: 004e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
 
    PNP: 004e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
 
    PNP: 004e.3
 
    PNP: 004e.3 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
 
    PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
 
    PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
 
    PNP: 004e.4
 
    PNP: 004e.4 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
 
    PNP: 004e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
 
    PNP: 004e.5
 
    PNP: 004e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
 
    PNP: 004e.5 resource base 64 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
 
    PNP: 004e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
 
    PNP: 004e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 72
 
    PNP: 004e.6
 
    PNP: 004e.a
 
    PNP: 004e.10
 
    PNP: 004e.10 resource base 3f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
 
    PNP: 004e.10 resource base 4 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
 
    PNP: 004e.11
 
    PNP: 004e.11 resource base 2f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
 
    PNP: 004e.11 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
 
    PNP: 004e.1
 
    PNP: 004e.1 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
 
    PNP: 004e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
 
    PNP: 004e.2
 
    PNP: 004e.2 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
 
    PNP: 004e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
 
    PNP: 004e.7
 
    PNP: 004e.7 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
 
    PCI: 00:14.4
 
    PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 
    PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
 
    PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 
    PCI: 00:14.5
 
    PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 
    PCI: 00:14.6
 
    PCI: 00:15.0
 
    PCI: 00:15.1
 
    PCI: 00:15.2
 
    PCI: 00:15.3
 
    PCI: 00:16.0
 
    PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 
    PCI: 00:16.2
 
    PCI: 00:16.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
 
    PCI: 00:18.0
 
    PCI: 00:18.1
 
    PCI: 00:18.2
 
    PCI: 00:18.3
 
    PCI: 00:18.4
 
    PCI: 00:18.5
 
    PCI: 00:18.6
 
    PCI: 00:18.7
 
DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 
PCI: 00:06.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
 
PCI: 01:00.0 10 *  [0x0 - 0xff] io
 
PCI: 00:06.0 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
 
PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 
PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 
PCI: 00:06.0 1c *  [0x0 - 0xfff] io
 
PCI: 00:01.0 14 *  [0x1000 - 0x10ff] io
 
PCI: 00:11.0 20 *  [0x1400 - 0x140f] io
 
PCI: 00:11.0 10 *  [0x1410 - 0x1417] io
 
PCI: 00:11.0 18 *  [0x1418 - 0x141f] io
 
PNP: 004e.1 60 *  [0x1420 - 0x1427] io
 
PNP: 004e.2 60 *  [0x1428 - 0x142f] io
 
PNP: 004e.7 60 *  [0x1430 - 0x1437] io
 
PCI: 00:11.0 14 *  [0x1438 - 0x143b] io
 
PCI: 00:11.0 1c *  [0x143c - 0x143f] io
 
DOMAIN: 0000 compute_resources_io: base: 1440 size: 1440 align: 12 gran: 0 limit: 7ff done
 
DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
 
PCI: 00:06.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 
PCI: 01:00.0 20 *  [0x0 - 0x3fff] prefmem
 
PCI: 01:00.0 18 *  [0x4000 - 0x4fff] prefmem
 
PCI: 00:06.0 compute_resources_prefmem: base: 5000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
 
PCI: 00:06.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 
PCI: 00:06.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
 
PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 
PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
 
PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 
PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
 
PCI: 00:01.0 10 *  [0x0 - 0xfffffff] prefmem
 
PCI: 00:06.0 24 *  [0x10000000 - 0x100fffff] prefmem
 
PCI: 00:01.0 18 *  [0x10100000 - 0x1013ffff] mem
 
PCI: 00:14.2 10 *  [0x10140000 - 0x10143fff] mem
 
PCI: 00:12.0 10 *  [0x10144000 - 0x10144fff] mem
 
PCI: 00:13.0 10 *  [0x10145000 - 0x10145fff] mem
 
PCI: 00:14.5 10 *  [0x10146000 - 0x10146fff] mem
 
PCI: 00:16.0 10 *  [0x10147000 - 0x10147fff] mem
 
PCI: 00:11.0 24 *  [0x10148000 - 0x101483ff] mem
 
PCI: 00:12.2 10 *  [0x10148400 - 0x101484ff] mem
 
PCI: 00:13.2 10 *  [0x10148500 - 0x101485ff] mem
 
PCI: 00:16.2 10 *  [0x10148600 - 0x101486ff] mem
 
PCI: 00:14.3 a0 *  [0x10148700 - 0x10148700] mem
 
DOMAIN: 0000 compute_resources_mem: base: 10148701 size: 10148701 align: 28 gran: 0 limit: ffffffff done
 
avoid_fixed_resources: DOMAIN: 0000
 
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 000007ff
 
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
 
constrain_resources: DOMAIN: 0000
 
constrain_resources: PCI: 00:00.0
 
constrain_resources: PCI: 00:01.0
 
constrain_resources: PCI: 00:06.0
 
constrain_resources: PCI: 01:00.0
 
constrain_resources: PCI: 00:11.0
 
constrain_resources: PCI: 00:12.0
 
constrain_resources: PCI: 00:12.2
 
constrain_resources: PCI: 00:13.0
 
constrain_resources: PCI: 00:13.2
 
constrain_resources: PCI: 00:14.0
 
constrain_resources: I2C: 00:50
 
constrain_resources: I2C: 00:51
 
constrain_resources: PCI: 00:14.2
 
constrain_resources: PCI: 00:14.3
 
constrain_resources: PNP: 004e.5
 
skipping PNP: 004e.5@62 fixed resource, size=0!
 
constrain_resources: PNP: 004e.10
 
skipping PNP: 004e.10@60 fixed resource, size=0!
 
skipping PNP: 004e.10@70 fixed resource, size=0!
 
constrain_resources: PNP: 004e.11
 
skipping PNP: 004e.11@60 fixed resource, size=0!
 
skipping PNP: 004e.11@70 fixed resource, size=0!
 
constrain_resources: PNP: 004e.1
 
constrain_resources: PNP: 004e.2
 
constrain_resources: PNP: 004e.7
 
constrain_resources: PCI: 00:14.4
 
constrain_resources: PCI: 00:14.5
 
constrain_resources: PCI: 00:15.0
 
constrain_resources: PCI: 00:16.0
 
constrain_resources: PCI: 00:16.2
 
constrain_resources: PCI: 00:18.0
 
constrain_resources: PCI: 00:18.1
 
constrain_resources: PCI: 00:18.2
 
constrain_resources: PCI: 00:18.3
 
constrain_resources: PCI: 00:18.4
 
constrain_resources: PCI: 00:18.5
 
constrain_resources: PCI: 00:18.6
 
constrain_resources: PCI: 00:18.7
 
avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 000007ff
 
        lim->base 00000000 lim->limit 0000005f
 
avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff
 
        lim->base 00000000 lim->limit f7ffffff
 
 
  Setting resources...
 
  Setting resources...
  DOMAIN: 0000 allocate_resources_io: base:0 size:1440 align:12 gran:0 limit:5f
+
  ERROR: PCI: 00:18.0 1080 ??????64 size: 0x0000000000 not assigned
!! Resource didn't fit !!
+
  ERROR: PCI: 00:18.0 1088 ??????64 size: 0x0000000000 not assigned
    aligned base 0 size 1000 limit 5f
+
  Done setting resources.
    fff needs to be <= 5f (limit)
+
  Done allocating resources.
    PCI: 00:06.0 1c *  [0x0 - 0xfff] io
+
  Enabling resources...
PCI: 00:06.0 1c *  [0x0 - 0xfff] io
+
  done.
!! Resource didn't fit !!
+
  Initializing devices...
    aligned base 0 size 100 limit 5f
+
  Initializing CPU #0
    ff needs to be <= 5f (limit)
+
  Enabling cache
    PCI: 00:01.0 14 *  [0x1000 - 0x10ff] io
+
  Setting up local apic...done.
  PCI: 00:01.0 14 *  [0x1000 - 0x10ff] io
+
  CPU #0 initialized
Assigned: PCI: 00:11.0 20 *  [0x0 - 0xf] io
+
  Initializing CPU #1
Assigned: PCI: 00:11.0 10 *  [0x10 - 0x17] io
+
  Waiting for 1 CPUS to stop
Assigned: PCI: 00:11.0 18 *  [0x18 - 0x1f] io
+
  Enabling cache
Assigned: PNP: 004e.1 60 *  [0x20 - 0x27] io
+
  Setting up local apic...done.
Assigned: PNP: 004e.2 60 *  [0x28 - 0x2f] io
+
  CPU #1 initialized
Assigned: PNP: 004e.7 60 *  [0x30 - 0x37] io
+
  Devices initialized
Assigned: PCI: 00:11.0 14 *  [0x38 - 0x3b] io
+
  Finalize devices...
Assigned: PCI: 00:11.0 1c *  [0x3c - 0x3f] io
+
  Devices finalized
DOMAIN: 0000 allocate_resources_io: next_base: 40 size: 1440 align: 12 gran: 0 done
+
 
  PCI: 00:06.0 allocate_resources_io: base:0 size:1000 align:12 gran:12 limit:5f
+
=== Coreboot boot log ===
  !! Resource didn't fit !!
+
 
    aligned base 0 size 100 limit 5f
+
See [http://www.coreboot.org/Supported_Motherboards#jetway.2Fnf81-t56n-lf] for a recent log.
    ff needs to be <= 5f (limit)
+
    PCI: 01:00.0 10 *  [0x0 - 0xff] io
+
  PCI: 01:00.0 10 *  [0x0 - 0xff] io
+
PCI: 00:06.0 allocate_resources_io: next_base: 0 size: 1000 align: 12 gran: 12 done
+
PCI: 00:14.4 allocate_resources_io: base:5f size:0 align:12 gran:12 limit:5f
+
  PCI: 00:14.4 allocate_resources_io: next_base: 5f size: 0 align: 12 gran: 12 done
+
DOMAIN: 0000 allocate_resources_mem: base:e0000000 size:10148701 align:28 gran:0 limit:f7ffffff
+
Assigned: PCI: 00:01.0 10 *  [0xe0000000 - 0xefffffff] prefmem
+
  Assigned: PCI: 00:06.0 24 *  [0xf0000000 - 0xf00fffff] prefmem
+
Assigned: PCI: 00:01.0 18 *  [0xf0100000 - 0xf013ffff] mem
+
Assigned: PCI: 00:14.2 10 *  [0xf0140000 - 0xf0143fff] mem
+
  Assigned: PCI: 00:12.0 10 *  [0xf0144000 - 0xf0144fff] mem
+
  Assigned: PCI: 00:13.0 10 *  [0xf0145000 - 0xf0145fff] mem
+
  Assigned: PCI: 00:14.5 10 *  [0xf0146000 - 0xf0146fff] mem
+
Assigned: PCI: 00:16.0 10 *  [0xf0147000 - 0xf0147fff] mem
+
Assigned: PCI: 00:11.0 24 *  [0xf0148000 - 0xf01483ff] mem
+
Assigned: PCI: 00:12.2 10 *  [0xf0148400 - 0xf01484ff] mem
+
Assigned: PCI: 00:13.2 10 *  [0xf0148500 - 0xf01485ff] mem
+
Assigned: PCI: 00:16.2 10 *  [0xf0148600 - 0xf01486ff] mem
+
Assigned: PCI: 00:14.3 a0 *  [0xf0148700 - 0xf0148700] mem
+
DOMAIN: 0000 allocate_resources_mem: next_base: f0148701 size: 10148701 align: 28 gran: 0 done
+
PCI: 00:06.0 allocate_resources_prefmem: base:f0000000 size:100000 align:20 gran:20 limit:f7ffffff
+
  Assigned: PCI: 01:00.0 20 *  [0xf0000000 - 0xf0003fff] prefmem
+
  Assigned: PCI: 01:00.0 18 *  [0xf0004000 - 0xf0004fff] prefmem
+
  PCI: 00:06.0 allocate_resources_prefmem: next_base: f0005000 size: 100000 align: 20 gran: 20 done
+
  PCI: 00:06.0 allocate_resources_mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
+
  PCI: 00:06.0 allocate_resources_mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
+
PCI: 00:14.4 allocate_resources_prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
+
PCI: 00:14.4 allocate_resources_prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
+
PCI: 00:14.4 allocate_resources_mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
+
  PCI: 00:14.4 allocate_resources_mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
+
  Root Device assign_resources, bus 0 link: 0
+
   
+
Fam14h - domain_set_resources
+
  amsr - incoming dev = 0027b4cc
+
adsr: (before) basek = 0, limitk = 11effffff.
+
adsr: (after) basek = 0, limitk = 47bfff, sizek = 47c000.
+
adsr - 0xa0000 to 0xbffff resource.
+
  adsr: mmio_basek=00380000, basek=00000300, limitk=0047bfff
+
0: mmio_basek=00380000, basek=00400000, limitk=0047bfff
+
  adsr - mmio_basek = 380000.
+
dword=c8000000
+
nvram_pos=f8, dword>>(8*i)=0
+
nvram_pos=f9, dword>>(8*i)=0
+
nvram_pos=fa, dword>>(8*i)=0
+
nvram_pos=fb, dword>>(8*i)=c8
+
CBMEM region c7fe0000-c7ffffff (cbmem_late_set_table)
+
DOMAIN: 0000 assign_resources, bus 0 link: 0
+
+
Fam14h - nb_set_resources
+
+
Fam14h - create_vga_resource
+
+
Fam14h - set_resource
+
PCI: 00:00.0 c0010058 <- [0x00f8000000 - 0x00f8ffffff] size 0x01000000 gran 0x00 mem <mmconfig>
+
PCI: 00:01.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
+
ERROR: PCI: 00:01.0 14 io size: 0x0000000100 not assigned
+
PCI: 00:01.0 18 <- [0x00f0100000 - 0x00f013ffff] size 0x00040000 gran 0x12 mem
+
PCI: 00:06.0 1c <- [0x0000000000 - 0x0000000fff] size 0x00001000 gran 0x0c bus 01 io
+
PCI: 00:06.0 24 <- [0x00f0000000 - 0x00f00fffff] size 0x00100000 gran 0x14 bus 01 prefmem
+
PCI: 00:06.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 mem
+
PCI: 00:06.0 assign_resources, bus 1 link: 0
+
ERROR: PCI: 01:00.0 10 io size: 0x0000000100 not assigned
+
PCI: 01:00.0 18 <- [0x00f0004000 - 0x00f0004fff] size 0x00001000 gran 0x0c prefmem64
+
PCI: 01:00.0 20 <- [0x00f0000000 - 0x00f0003fff] size 0x00004000 gran 0x0e prefmem64
+
PCI: 00:06.0 assign_resources, bus 1 link: 0
+
PCI: 00:11.0 10 <- [0x0000000010 - 0x0000000017] size 0x00000008 gran 0x03 io
+
PCI: 00:11.0 14 <- [0x0000000038 - 0x000000003b] size 0x00000004 gran 0x02 io
+
PCI: 00:11.0 18 <- [0x0000000018 - 0x000000001f] size 0x00000008 gran 0x03 io
+
PCI: 00:11.0 1c <- [0x000000003c - 0x000000003f] size 0x00000004 gran 0x02 io
+
PCI: 00:11.0 20 <- [0x0000000000 - 0x000000000f] size 0x00000010 gran 0x04 io
+
PCI: 00:11.0 24 <- [0x00f0148000 - 0x00f01483ff] size 0x00000400 gran 0x0a mem
+
PCI: 00:12.0 10 <- [0x00f0144000 - 0x00f0144fff] size 0x00001000 gran 0x0c mem
+
PCI: 00:12.2 10 <- [0x00f0148400 - 0x00f01484ff] size 0x00000100 gran 0x08 mem
+
PCI: 00:13.0 10 <- [0x00f0145000 - 0x00f0145fff] size 0x00001000 gran 0x0c mem
+
PCI: 00:13.2 10 <- [0x00f0148500 - 0x00f01485ff] size 0x00000100 gran 0x08 mem
+
PCI: 00:14.2 10 <- [0x00f0140000 - 0x00f0143fff] size 0x00004000 gran 0x0e mem64
+
SB800 - Lpc.c - lpc_set_resources - Start.
+
PCI: 00:14.3 a0 <- [0x00f0148702 - 0x00f0148702] size 0x00000001 gran 0x00 mem
+
PCI: 00:14.3 assign_resources, bus 0 link: 0
+
PNP: 004e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
+
PNP: 004e.5 62 <- [0x0000000064 - 0x0000000063] size 0x00000000 gran 0x00 io
+
PNP: 004e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
+
ERROR: PNP: 004e.5 72 irq size: 0x0000000001 not assigned
+
PNP: 004e.10 missing set_resources
+
PNP: 004e.11 missing set_resources
+
PNP: 004e.1 60 <- [0x0000000020 - 0x0000000027] size 0x00000008 gran 0x03 io
+
ERROR: PNP: 004e.1 70 irq size: 0x0000000001 not assigned
+
PNP: 004e.2 60 <- [0x0000000028 - 0x000000002f] size 0x00000008 gran 0x03 io
+
ERROR: PNP: 004e.2 70 irq size: 0x0000000001 not assigned
+
PNP: 004e.7 60 <- [0x0000000030 - 0x0000000037] size 0x00000008 gran 0x03 io
+
PCI: 00:14.3 assign_resources, bus 0 link: 0
+
SB800 - Lpc.c - lpc_set_resources - End.
+
  
 
{{PD-self}}
 
{{PD-self}}

Latest revision as of 04:19, 9 June 2014

This page describes how to use coreboot on the Jetway NF81-T56N-LF mainboard.

This page is a work in progress. ACPI is still being worked on, however due to the nature of ACPI it may take some time to get this right.

Known Issues

  • pcie 06.0 bridge sometimes hangs probing the nic behind it. Linux reports a borked IRQ addr. They are likely connected? (Fix ACPI?).
  • suspend/resume could do with some work to clean up nasty warnings.. (Fix ACPI).
  • some werid AGESA issue affects a number of boards

Overview

Hardware

  • AMD Fusion G-series AMD Fusion G-T56N (1.65 GHz dual core) APU
  • AMD A55E part of the chipset, AMD A55E (Hudson-E1) southbridge
  • F71869AD Fintek F71869AD Super I/O
  • RTL8111E Twin Realtek RTL8111E network controllers
  • VT1705 6-Channel HD Audio (via VIA VT1705), AC97 AD/DA

Details

The NF81-T56N-LF is a IPC form factor embedded board:

  • AMD Fusion G-T56N (1.65 GHz dual core) APU
    • 2x SO-DIMM sockets for DDR3 800-1066 SDRAM (Fixed at 1.5V)
    • VGA and LVDS (via Analogix ANX3110)
  • AMD A55E (Hudson-E1) southbridge
    • 6x USB 2.0/1.1 ports
    • 5x SATA3 6Gb/s, 1x mSATA socket
    • 6-Channel HD Audio (via VIA VT1705)
    • PCI and ISA (via ITE IT8888)??
    • NEC uPD78F0532 microcontroller on I2C ("SEMA")??
  • 2x RJ45 GbE (via Realtek RTL8111E x2)
  • Fintek F71869AD Super I/O
    • PS/2 KB/MS port
    • RS232 header (via Unisonic UTC 75232 RS232 driver/receiver)
    • GPIO header
    • CIR header
  • 1x MXIC MX25L1606E (SO8, soldered) 16 Mbit SPI flash (BIOS)

Note: MX25L1606E is 16Mbit, 8bits in a byte, so 2MB. Jetway lies claiming the SPI flash is 16MB. They also use red pen over the chip so you wont see this deceit.

Building a coreboot image

Make a fresh clone of Coreboot into a empty directory and run:

make crossgcc-i386

Make a cup of tea.. Then run:

make menuconfig

and select Jetway/NF81-t56N-LF under "Mainboard -> Mainboard vendor/model" leaving everything else as defaults. Then finally do,

make

To flash the board with flashrom run:

flashrom -p ft2232_spi:type=2232H,port=A -c "MX25L1605A/MX25L1606E" -w build/coreboot.rom

assuming you have a SPI flasher setup.

Status

Device/functionality Status Comments
CPU
CPU works OK
L1 cache enabled OK Always on
L2 cache enabled OK Always on
L3 cache enabled N/A
Multiple CPU support N/A
Multi-core support N/A
Hardware virtualization OK
RAM
EDO N/A
SDRAM N/A
SO-DIMM N/A
DDR N/A
DDR2 N/A
DDR3 OK Tested with 4GB two-rank module.
Dual channel support N/A
ECC support  ?
On-board Hardware
On-board IDE 3.5" N/A
On-board IDE 2.5" N/A
On-board SATA OK
On-board SCSI N/A
On-board USB OK
On-board VGA OK BIOS/console: works.
On-board ethernet OK
On-board audio OK Basic two channel audio works fine.
On-board modem N/A
On-board FireWire N/A
On-board smartcard reader N/A
On-board CompactFlash N/A
On-board PCMCIA N/A
Add-on slots/cards
ISA add-on cards N/A
Audio/Modem-Riser (AMR/CNR) cards N/A
PCI add-on cards OK
Mini-PCI add-on cards N/A
PCI-X add-on cards N/A
AGP graphics cards N/A
PCI Express x1 add-on cards OK miniPCIe slot works, mSATA/miniPCIe slot does not!?
PCI Express x2 add-on cards N/A
PCI Express x4 add-on cards N/A
PCI Express x8 add-on cards N/A
PCI Express x16 add-on cards N/A
PCI Express x32 add-on cards N/A
HTX add-on cards N/A
Legacy / Super I/O
Floppy N/A
Serial port 1 (COM1) OK
Serial port 2 (COM2) N/A
Parallel port N/A
PS/2 keyboard OK
PS/2 mouse OK
Game port N/A
Infrared Untested CIR header currently turned off in devicetree.cb
PC speaker OK
DiskOnChip N/A
Miscellaneous
Sensors / fan control OK
Hardware watchdog Pending What needs to be done here??
SMBus OK
CAN bus N/A
CPU frequency scaling OK
Other powersaving features N/A
ACPI WIP Mostly working, needs a good Review!
Reboot OK
Poweroff OK
Suspend OK
Nonstandard LEDs N/A
High precision event timers (HPET) OK
Random number generator (RNG) OK
Wake on modem ring N/A
Wake on LAN Untested
Wake on keyboard Untested
Wake on mouse Untested
Flashrom OK MXIC MX25L1606E 2MB SPI Flash

Issue Analysis

pcie 06.0 bridge hang issue

The pcie 06.0 bridge hang issue is the primary remaining issue.

The Interrupt Mask Register (IMR) and Interrupt Service Register (ISR) are responsible for firing up different IRQs. The IMR bits line up with the ISR bits to work in sync. If an IMR bit is low, then the corresponding ISR bit with never fire an IRQ when the time comes for it to happen. The IMR is located at 0x3C and the ISR is located at 0x3E.


Observe in the vendor bios pci configuration space dump attached below that, indx. 0x3C (IMR) = 0x0b and indx. 0x3E (ISR) = 0x10.

IMR val. = 0000 1011 = INTB
ISR val. = 0000 1010
====================
        &= 0000 1010
====================
root@archiso ~ # hexdump -C /sys/bus/pci/devices/0000:00:06.0/config
00000000  22 10 14 15 07 00 10 00  00 00 04 06 10 00 01 00  |"...............|
00000010  00 00 00 00 00 00 00 00  00 02 02 00 e1 e1 00 00  |................|
00000020  f0 ff 00 00 11 d0 11 d0  00 00 00 00 00 00 00 00  |................|
00000030  00 00 00 00 50 00 00 00  00 00 00 00 0b 01 10 00  |....P...........|
00000040  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
00000050  01 58 03 c8 00 00 00 00  10 a0 42 01 20 80 00 00  |.X........B. ...|
00000060  00 08 00 00 11 0c 30 03  40 00 11 70 80 25 34 00  |......0.@..p.%4.|
00000070  00 00 48 01 00 00 01 00  00 00 00 00 1f 00 00 00  |..H.............|
00000080  06 00 00 00 00 00 00 00  21 00 00 00 00 00 00 00  |........!.......|
00000090  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
000000a0  05 b0 80 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
000000b0  0d b8 00 00 22 10 34 12  08 00 03 a8 00 00 00 00  |....".4.........|
000000c0  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
*
000000e0  50 00 00 00 02 00 00 00  00 00 00 00 00 00 00 00  |P...............|
000000f0  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
00000100  0b 00 01 00 01 00 01 01  00 00 00 00 00 00 00 00  |................|
00000110  02 00 01 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
00000120  01 00 00 00 ff 00 00 80  00 00 00 00 01 00 00 00  |................|
00000130  00 00 00 00 00 00 02 00  00 00 00 00 00 00 00 00  |................|
00000140  03 00 01 00 01 00 00 00  00 87 0c 00 00 00 00 00  |................|
00000150  01 00 01 00 00 00 00 00  00 00 00 00 30 20 06 00  |............0 ..|
00000160  00 00 00 00 00 20 00 00  00 00 00 00 00 00 00 00  |..... ..........|
00000170  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
*
00000190  0d 00 01 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
000001a0  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
*
00001000

Investigate in board support:

* acpi/routing.asl
* mptable.c

weird AGESA issue

The function call goes something like this; In

mainboard/jetway/nf81-t56n-lf/agesawrapper.c

the function

UINT32 agesawrapper_amdinitpost(VOID)

calls

status = AmdInitPost ((AMD_POST_PARAMS *)AmdParamStruct.NewStructPtr);

this returns a error code of

AGESA_WARNING = 0x4

this triggers

if(status != AGESA_SUCCESS) agesawrapper_amdreadeventlog();

giving the resulting message:

EventLog:       EventClass = 2, EventInfo = 8040100.
...

grep'ing we have that:

AGESA.h:#define CPU_ERROR_HEAP_BUFFER_HANDLE_IS_NOT_PRESENT     0x08040100ul

However tracing the call back to where AGESA_WARNING is set goes back to:

vendor/amd/agesa/f14/Proc/Mem/Main/mmflow.c

line 290 here:

Retval = NBPtr[Die].MCTPtr->ErrCode;

with Die=0.

Coreboot S3 suspend/resume

S3 Suspend/Resume works by running:

# echo "mem" > /sys/power/state

However a issue remains of wanrings about resources being not assigned.

For details see in src/device/pnp_device.c the function:

static void pnp_set_resource(device_t dev, struct resource *resource)
{
	if (!(resource->flags & IORESOURCE_ASSIGNED)) {
		printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx "
		       "not assigned\n", dev_path(dev), resource->index,
		       resource_type(resource), resource->size); 
		return;
	}
 ...

and in src/device/device_util.c the function:

const char *resource_type(struct resource *resource)
{
	static char buffer[RESOURCE_TYPE_MAX];
	snprintf(buffer, sizeof (buffer), "%s%s%s%s",
		 ((resource->flags & IORESOURCE_READONLY) ? "ro" : ""),
		 ((resource->flags & IORESOURCE_PREFETCH) ? "pref" : ""),
		 ((resource->flags == 0) ? "unused" :
		  (resource->flags & IORESOURCE_IO) ? "io" :
		  (resource->flags & IORESOURCE_DRQ) ? "drq" :
		  (resource->flags & IORESOURCE_IRQ) ? "irq" :
		  (resource->flags & IORESOURCE_MEM) ? "mem" : "??????"),
		 ((resource->flags & IORESOURCE_PCI64) ? "64" : ""));
	return buffer;
}

and in src/include/device/resource.h the struct resource:

struct resource {
..
 	unsigned long index;	/* Bus specific per device resource id */
..

Analysis:

 ERROR: PCI: 00:18.0 1088 ??????64 size: 0x0000000000 not assigned
        -----------^ ---^ -------^       -----------^
                   |    |        |                  |
                   |    |        |                  +--- resource->size
                   |    |        |
                   |    |        +--- resource_type(resource)
                   |    |
                   |    +--- resource->index
                   |
                   +--- dev_path(dev)

A dev_path of type DEVICE_PATH_PCI (Host Bridge) at 18.0 of IORESOURCE_MEM type has a bus specific index of 1088.

Possibly related to the devicetree.cb ??

See log below:

Booting from Hard Disk...
Booting from 0000:7c00
àüüàààüàààààààüüàààààààààààüüüüüüààààüüàüààüüààüàüüàààüüààüüüü                                                                                                                                                      à

coreboot-4.0-5634-gfe71e8b-ap-jupiter-alpha Mon Mar 10 02:01:03 EST 2014 starting...
S3 detected
CBFS: loading stage fallback/coreboot_ram @ 0x200000 (1429552 bytes), entry @ 0x200000
coreboot-4.0-5634-gfe71e8b-ap-jupiter-alpha Mon Mar 10 02:01:03 EST 2014 booting...
Enumerating buses...
Mainboard NF81-T56N-LF Enable.
setup_bsp_ramtop, TOP MEM: msr.lo = 0xe0000000, msr.hi = 0x00000000
setup_bsp_ramtop, TOP MEM2: msr.lo = 0x1f000000, msr.hi = 0x00000001
setup_uma_memory: uma size 0x18000000, memory start 0xc8000000
PCI: Static device PCI: 00:04.0 not found, disabling it.
sm_init().
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
done
Allocating resources...
Reading resources...
APIC: 00 missing read_resources
APIC: 01 missing read_resources
I2C: 00:50 missing read_resources
I2C: 00:51 missing read_resources
Done reading resources.
Setting resources...
ERROR: PCI: 00:18.0 1080 ??????64 size: 0x0000000000 not assigned
ERROR: PCI: 00:18.0 1088 ??????64 size: 0x0000000000 not assigned
Done setting resources.
Done allocating resources.
Enabling resources...
done.
Initializing devices...
Initializing CPU #0
Enabling cache
Setting up local apic...done.
CPU #0 initialized
Initializing CPU #1
Waiting for 1 CPUS to stop
Enabling cache
Setting up local apic...done.
CPU #1 initialized
Devices initialized
Finalize devices...
Devices finalized

Coreboot boot log

See [1] for a recent log.

Public domain I, the copyright holder of this work, hereby release it into the public domain. This applies worldwide.

In case this is not legally possible:
I grant anyone the right to use this work for any purpose, without any conditions, unless such conditions are required by law.