Difference between revisions of "DFI NF570 Build Tutorial"

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m (Hm, "used with permission" it seems. Still, pretty tiny and useless IMHO.)
 
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This page describes how to use coreboot on the '''[http://us.dfi.com.tw/Product/xx_product_spec_details_r_us.jsp?PRODUCT_ID=5115&CATEGORY_TYPE=INFINITY&SITE=US DFI Infinity NF570]''' series mainboard. It is maintained by [[User:ChrisLingard|Chris Lingard]].
 
This page describes how to use coreboot on the '''[http://us.dfi.com.tw/Product/xx_product_spec_details_r_us.jsp?PRODUCT_ID=5115&CATEGORY_TYPE=INFINITY&SITE=US DFI Infinity NF570]''' series mainboard. It is maintained by [[User:ChrisLingard|Chris Lingard]].
  
 +
Though not officially adopted by the coreboot team, I am maintaining a patch for coreboot-v2, that will add this motherboard to the options.
  
 
This board would be too easy for any experienced corebooter; but it is an ideal entry point for someone who has never hot swapped a chip before, nor flashed a BIOS.
 
This board would be too easy for any experienced corebooter; but it is an ideal entry point for someone who has never hot swapped a chip before, nor flashed a BIOS.
Line 9: Line 10:
  
 
The designers have chosen an identical chip set to the Gigabyte M57SLI, so I only had to make trivial code changes for it to work to the standard shown below.  All credit to coreboot's M57SLI team.
 
The designers have chosen an identical chip set to the Gigabyte M57SLI, so I only had to make trivial code changes for it to work to the standard shown below.  All credit to coreboot's M57SLI team.
 
 
Here is a picture of the motherboard:
 
 
[[Image:INFINITY NF570SLI-M2-G.jpg|DFI Infinity mother board]]
 
 
 
  
 
The BIOS chip is bottom left, below, and slightly left of the battery.
 
The BIOS chip is bottom left, below, and slightly left of the battery.
Line 124: Line 118:
 
|RAM_SODIMM_status = N/A
 
|RAM_SODIMM_status = N/A
 
|RAM_DDR_status = N/A
 
|RAM_DDR_status = N/A
|RAM_DDR_comments = N/A
+
|RAM_DDR_comments =  
 
|RAM_DDR2_status = OK
 
|RAM_DDR2_status = OK
 
|RAM_DDR2_comments = Using  2 cards of 2GB 667
 
|RAM_DDR2_comments = Using  2 cards of 2GB 667
 
|RAM_DDR3_status = N/A
 
|RAM_DDR3_status = N/A
 
|RAM_dualchannel_status = Untested
 
|RAM_dualchannel_status = Untested
|RAM_ecc_status = Untested
+
|RAM_ecc_status = N/A
  
|IDE_status = N/A
+
|IDE_status = OK
|IDE_comments =  
+
|IDE_comments = My standard Seagate as system disk
 
|IDE_CF_status =  
 
|IDE_CF_status =  
 
|IDE_CF_comments =  
 
|IDE_CF_comments =  
Line 242: Line 236:
  
  
== The payload filo ==
+
== The payload ==
  
See the documentation about coreboot, and why it needs a payload. So far I have only used filo.
+
See the documentation about coreboot, and why it needs a payload.
 +
 
 +
=== filo ===
  
 
Copy your /boot/grub directory to /boot/filo.  This stops any interaction between grub and filo.  Your future BIOS will boot according to /boot/filo/menu.lst, and the hard disk will boot according to /boot/grub/menu.lst.
 
Copy your /boot/grub directory to /boot/filo.  This stops any interaction between grub and filo.  Your future BIOS will boot according to /boot/filo/menu.lst, and the hard disk will boot according to /boot/grub/menu.lst.
Line 387: Line 383:
  
 
Build your filo.elf and copy it into /boot.  Boot it via the grub command line and make sure it works.
 
Build your filo.elf and copy it into /boot.  Boot it via the grub command line and make sure it works.
 +
 +
=== Grub2 ===
 +
 +
There are hints and a wiki page, but no proper documentation.
 +
 +
Grub2 did not work for me.  It did show a help screen, but did not boot the system,  If you embed a menu into the grub2 payload, it just reboots the machine, after showing the "Grub2 Welcome" message
 +
 +
Since you get the source via svn, I probably caught it on a bad day; hopefully they will get it to work soon.
 +
 +
 +
=== A Linux Payload ===
 +
 +
This was a lot easier than I thought it would be.  You need to buy some SST49LF160C chips, So 16 M Bits gives you 2M bytes.  There do not seem to be any bigger chips.
 +
 +
You need a system with a small kernel.  The first system on this machine is "Linux from Scratch", and with careful pruning I have got the kernel down to  around 1.8M bytes.
 +
 +
Get the program mkelfImage, and set up a command something like
 +
 +
<pre>
 +
 +
/usr/sbin/mkelfImage --append="root=/dev/hda3 "  /boot/vmlinuz-2.6.27  linux.elf
 +
 +
</pre>
 +
 +
Your kernel number and the partition may vary, of course.
 +
 +
Then copy the kernel.elf file into /boot, and check that it works on grub's command line
 +
 +
You can use this as a payload now, and change the size of BIOS chip in your build parameters from 4 M bit to 16 M bit.  Then put in a new chip and flash it.
 +
 +
You should build a static kexec and add that to the coreboot build, I am working on it.
 +
 +
But this boots my system; I have built kexec on this system,and can boot into other systems from there; though this is not a good idea unless you stop your services, unmount most partitions, and remount the rest read only.
 +
 +
But I still want a menu so I can choose which system I want; so I am thinking of using some sort of screen, to ask which system the booted kernel will kexec into.
 +
  
 
== Null Modem Cable ==
 
== Null Modem Cable ==
Line 435: Line 467:
 
.
 
.
  
The next step is to use that file to flash a brand new chip.  To hot swap the BIOS chip I found it best to lay the machine on its back so you can put the chip out vertically.  So gently extract the BIOS chip and put it into an anti-static bag.  Get one of you new chips and locate it very carefully into position, note the bevel on one corner.  Gentle pressure will now push the chip home.  Put the computer back onto its feet, and check that the chip is there.
+
The next step is to use that file to flash a brand new chip.  To hot swap the BIOS chip I found it best to lay the machine on its back so you can put the chip out vertically.  So gently extract the BIOS chip and put it into an anti-static bag.  Get one of your new chips and locate it very carefully into position, note the bevel on one corner.  Gentle pressure will now push the chip home.  Put the computer back onto its feet, and check that the chip is there.
  
 
<pre>
 
<pre>
Line 489: Line 521:
 
You can now reboot, and have fun,
 
You can now reboot, and have fun,
  
== Gremlins, bugs and Gotcha ==
+
== Gremlins, Bugs and Gotchas ==
  
 +
 +
=== Ethernet ===
 
The ethernet gets changed from eth0 to eth1 by udev during the kernel start up.
 
The ethernet gets changed from eth0 to eth1 by udev during the kernel start up.
 +
 +
=== My splash screen looks horrible ===
  
 
Splash screens get wrecked, due to lack of video driver at start up.
 
Splash screens get wrecked, due to lack of video driver at start up.
  
  
 +
=== Invalid CMOS error ===
 +
 +
You might see this error in the coreboot log, and want to correct it.
 +
<pre>
 +
PCI: 00:01.0 init
 +
set power on after power fail
 +
RTC Init
 +
Invalid CMOS LB checksum
 +
PNP: 002e.1 init
 +
</pre>
 +
Hack the program that outputs this error something like
 +
<pre>
 +
        sum = (~sum)&0x0ffff;
 +
        printk_debug("Sum is %x\n", sum);
 +
        old_sum = ((CMOS_READ(cks_loc)<<8) | CMOS_READ(cks_loc+1))&0x0ffff;
 +
        printk_debug("Read from memory %x\n", old_sum);
 +
        return sum == old_sum;
 +
</pre>
 +
 +
Run this coreboot so that you see the values being used.
 +
 +
Now build nvramtool from coreboot's source package, and use it to reset the CMOS value to the correct value.
 +
 +
Now you have the correct value to compare against, this fault will disapear.
  
  
 +
== Timing ==
  
 
{| border="0" style="font-size: smaller"
 
{| border="0" style="font-size: smaller"
Line 520: Line 581:
 
|}
 
|}
  
 +
there is no difference in the speed that jobs run. Compiling the latest version of gcc takes about 26 minutes,  this is a ''make bootstrap'', building both a 32 bit and 64 bit compiler.
  
 
{{PD-self}}
 
{{PD-self}}

Latest revision as of 14:45, 26 September 2010

This page describes how to use coreboot on the DFI Infinity NF570 series mainboard. It is maintained by Chris Lingard.

Though not officially adopted by the coreboot team, I am maintaining a patch for coreboot-v2, that will add this motherboard to the options.

This board would be too easy for any experienced corebooter; but it is an ideal entry point for someone who has never hot swapped a chip before, nor flashed a BIOS.

After much failure trying to get a motherboard modified with a switch and a second BIOS socket, I found one with a socketed BIOS. It comes in three flavors:

NF570 SLI-M2/G, NS570-M2/G and NF550-M2/G

The designers have chosen an identical chip set to the Gigabyte M57SLI, so I only had to make trivial code changes for it to work to the standard shown below. All credit to coreboot's M57SLI team.

The BIOS chip is bottom left, below, and slightly left of the battery.


Status

Device/functionality Status Comments
CPU
CPU works OK AMD Athlon(tm) dual core Processor 6000+
L1 cache enabled OK CPU: L1 Cache: 64K (64 bytes/line) (each core)
L2 cache enabled OK CPU: L2 Cache: 1MB (each core)
L3 cache enabled N/A
Multiple CPU support N/A
Multi-core support OK Works fine, tested with prolonged builds like gcc and glibc
Hardware virtualization Untested
RAM
EDO N/A
SDRAM N/A
SO-DIMM N/A
DDR N/A
DDR2 OK Using 2 cards of 2GB 667
DDR3 N/A
Dual channel support Untested
ECC support N/A
On-board Hardware
On-board IDE 3.5" OK My standard Seagate as system disk
On-board IDE 2.5" N/A
On-board SATA OK Tested: SATA port 1 , that is my CD/DVD RW.
On-board SCSI Unknown
On-board USB WIP Should be OK.all the right modules are loaded by kernel/udev
On-board VGA N/A
On-board ethernet OK
On-board audio OK
On-board modem N/A
On-board FireWire Untested
On-board smartcard reader N/A
On-board CompactFlash N/A
On-board PCMCIA N/A
Add-on slots/cards
ISA add-on cards N/A
Audio/Modem-Riser (AMR/CNR) cards N/A
PCI add-on cards Untested
Mini-PCI add-on cards Unknown
PCI-X add-on cards Unknown
AGP graphics cards N/A
PCI Express x1 add-on cards Untested
PCI Express x2 add-on cards N/A
PCI Express x4 add-on cards N/A
PCI Express x8 add-on cards N/A
PCI Express x16 add-on cards OK Tested: Saphire ati clone radion card. Works using the radionhd X11 driver.
PCI Express x32 add-on cards N/A
HTX add-on cards N/A
Legacy / Super I/O
Floppy WIP Does not work with either the factory or coreboot BIOS
Serial port 1 (COM1) OK
Serial port 2 (COM2) N/A
Parallel port Untested
PS/2 keyboard OK
PS/2 mouse OK
Game port Untested
Infrared N/A
PC speaker OK
DiskOnChip N/A
Miscellaneous
Sensors / fan control Untested
Hardware watchdog Untested
SMBus Unknown
CAN bus N/A
CPU frequency scaling Untested
Other powersaving features N/A
ACPI WIP The Linux kernel does the right thing
Reboot OK
Poweroff OK
Suspend Unknown
Nonstandard LEDs OK
High precision event timers (HPET) Untested
Random number generator (RNG) N/A
Wake on modem ring Untested
Wake on LAN Untested
Wake on keyboard Untested
Wake on mouse Untested
Flashrom OK Works fine with coreboot and with the proprietary BIOS.

Hardware

  • AMD Athlon(tm) 64 dual core
  • Nvidea MCP55
  • ITE IT8716F
  • PMC Pm49FL004

lspci -tvnn

-[0000:00]-+-00.0  nVidia Corporation MCP55 Memory Controller [10de:0369]
          +-01.0  nVidia Corporation MCP55 LPC Bridge [10de:0362]
          +-01.1  nVidia Corporation MCP55 SMBus [10de:0368]
          +-01.2  nVidia Corporation MCP55 Memory Controller [10de:036a]
          +-01.3  nVidia Corporation MCP55 SMU [10de:036b]
          +-02.0  nVidia Corporation MCP55 USB Controller [10de:036c]
          +-02.1  nVidia Corporation MCP55 USB Controller [10de:036d]
          +-04.0  nVidia Corporation MCP55 IDE [10de:036e]
          +-05.0  nVidia Corporation MCP55 SATA Controller [10de:037f]
          +-05.1  nVidia Corporation MCP55 SATA Controller [10de:037f]
          +-05.2  nVidia Corporation MCP55 SATA Controller [10de:037f]
          +-06.0-[0000:01]----07.0  VIA Technologies, Inc. VT6306 Fire II IEEE 1394 OHCI Link Layer Controller [1106:3044]
          +-06.1  nVidia Corporation MCP55 High Definition Audio [10de:0371]
          +-08.0  nVidia Corporation MCP55 Ethernet [10de:0373]
          +-0b.0-[0000:02]--
          +-0c.0-[0000:03]--
          +-0d.0-[0000:04]--
          +-0e.0-[0000:05]--
          +-0f.0-[0000:06]--+-00.0  ATI Technologies Inc RV630 [Radeon HD 2600XT] [1002:9588]
          |                 \-00.1  ATI Technologies Inc RV630/M76 audio device [Radeon HD 2600 Series] [1002:aa08]
          +-18.0  Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration [1022:1100]
          +-18.1  Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map [1022:1101]
          +-18.2  Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller [1022:1102]
          \-18.3  Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control [1022:1103]


The payload

See the documentation about coreboot, and why it needs a payload.

filo

Copy your /boot/grub directory to /boot/filo. This stops any interaction between grub and filo. Your future BIOS will boot according to /boot/filo/menu.lst, and the hard disk will boot according to /boot/grub/menu.lst. Get and compile filo-0.5. Here is my configuration file



# Do NOT add spaces or comments at the end of option lines.
# It confuses some versions of make.

# Use grub instead of autoboot?
USE_GRUB = 1

# Grub menu.lst path
MENULST_FILE = "hda1:/filo/menu.lst"
# Via Epia-MII CF boot:
#MENULST_FILE = "hde1:/boot/filo/menu.lst"

# time before default menu.lst is chosen. Set to 0 to ignore
MENULST_TIMEOUT = 0

# Image filename for automatic boot and optional command line parameter
AUTOBOOT_FILE = "hda1:/vmlinuz root=/dev/hda3 console=tty0 console=ttyS0,115200"
#AUTOBOOT_FILE = "mem@0xfff80000"
#AUTOBOOT_FILE = "hde1@0"
#AUTOBOOT_FILE = "uda1:/vmlinuz.elf"
#AUTOBOOT_FILE = "flashb@0x00400000,0x154a00 console=tty0 console=ttyS0,115200"

# Time in second before booting AUTOBOOT_FILE
AUTOBOOT_DELAY = 2

# Driver for hard disk, CompactFlash, and CD-ROM on IDE bus
IDE_DISK = 1

# Add a short delay when polling status registers
# (required on some broken SATA controllers)
# NOTE: Slows down access significantly, so disable
# whenever possible.
#IDE_DISK_POLL_DELAY = 1

# SATA drives seem to have problems reporting their spinup.
# This will delay FILO start by 5s so the disks have some time to settle.
# (required on some broken SATA controllers)
# NOTE: Slows down access significantly, so disable
# whenever possible.
#SLOW_SATA = 1

# Use PCMCIA compact flash on Via Epia MII10000 and MII6000E
# This device is referred to as hde.
#PCMCIA_CF = 1

# Driver for USB Storage
#USB_DISK = 1

# Driver for NAND flash storage
#FLASH_DISK = 1

# VGA text console
VGA_CONSOLE = 1
PC_KEYBOARD = 1

# Serial console
SERIAL_CONSOLE = 1
SERIAL_IOBASE = 0x3f8
# if SERIAL_SPEED is commented out, the speed will not be changed.
#SERIAL_SPEED = 115200

# Filesystems
FSYS_EXT2FS = 1
#FSYS_FAT = 1
#FSYS_JFS = 1
#FSYS_MINIX = 1
#FSYS_REISERFS = 1
#FSYS_XFS = 1
FSYS_ISO9660 = 1
#FSYS_CRAMFS = 1
#FSYS_SQUASHFS = 1

# Support for boot disk image in bootable CD-ROM (El Torito)
ELTORITO = 1

# PCI support
SUPPORT_PCI = 1

# Enable this to scan PCI busses above bus 0
# AMD64 based boards do need this.
PCI_BRUTE_SCAN = 1

# Sound support (needs SUPPORT_PCI)
#SUPPORT_SOUND = 1

# Sound drivers
#VIA_SOUND = 1

# Debugging
#DEBUG_ALL = 1
#DEBUG_ELFBOOT = 1
#DEBUG_ELFNOTE = 1
#DEBUG_LINUXBIOS = 1
#DEBUG_MALLOC = 1
#DEBUG_MULTIBOOT = 1
#DEBUG_SEGMENT = 1
#DEBUG_SYS_INFO = 1
#DEBUG_TIMER = 1
#DEBUG_BLOCKDEV = 1
#DEBUG_PCI = 1
#DEBUG_VIA_SOUND = 1
#DEBUG_LINUXLOAD = 1
#DEBUG_IDE = 1
#DEBUG_USB = 1
#DEBUG_ELTORITO = 1
#DEBUG_FLASH = 1
#DEBUG_ARTECBOOT = 1


# i386 options

# Loader for standard Linux kernel image, a.k.a. /vmlinuz
LINUX_LOADER = 1

# Loader for Windows CE image


# Leave disabled for now. Not supported.
#WINCE_LOADER = 1

# Artecboot loader support
#ARTEC_BOOT = 1

# Boot FILO from Multiboot loader (eg. GRUB)
MULTIBOOT_IMAGE = 1

The only ones that I changed are the MULTIBOOT_IMAGE-1. This makes filo build a bootable filo.elf


And MENULIST_FILE = "hda1:/filo/menu.lst", you set up this file above; this is what will be used when you use coreboot. Note that /boot is the first partition on my disk.

If boot is a directory in the root partition and suppose this is the third partition, then this would become MENULIST_FILE = "hda3:/boot/filo/menu.lst"

Build your filo.elf and copy it into /boot. Boot it via the grub command line and make sure it works.

Grub2

There are hints and a wiki page, but no proper documentation.

Grub2 did not work for me. It did show a help screen, but did not boot the system, If you embed a menu into the grub2 payload, it just reboots the machine, after showing the "Grub2 Welcome" message

Since you get the source via svn, I probably caught it on a bad day; hopefully they will get it to work soon.


A Linux Payload

This was a lot easier than I thought it would be. You need to buy some SST49LF160C chips, So 16 M Bits gives you 2M bytes. There do not seem to be any bigger chips.

You need a system with a small kernel. The first system on this machine is "Linux from Scratch", and with careful pruning I have got the kernel down to around 1.8M bytes.

Get the program mkelfImage, and set up a command something like


/usr/sbin/mkelfImage --append="root=/dev/hda3 "   /boot/vmlinuz-2.6.27   linux.elf

Your kernel number and the partition may vary, of course.

Then copy the kernel.elf file into /boot, and check that it works on grub's command line

You can use this as a payload now, and change the size of BIOS chip in your build parameters from 4 M bit to 16 M bit. Then put in a new chip and flash it.

You should build a static kexec and add that to the coreboot build, I am working on it.

But this boots my system; I have built kexec on this system,and can boot into other systems from there; though this is not a good idea unless you stop your services, unmount most partitions, and remount the rest read only.

But I still want a menu so I can choose which system I want; so I am thinking of using some sort of screen, to ask which system the booted kernel will kexec into.


Null Modem Cable

If you have two machines you can see the output from coreboot. Get a good quality Null Modem cable and test it by running minicom on both machines. The only change that I made was to use ttyS0, instead of minicom's default of ttyS1.

Just for information the settings are:

Serial Device         : /dev/ttyS0
Lockfile Location     : /var/lock
Callin Program        :
Callout Program       :
Bps/Par/Bits          : 115200 8N1
Hardware Flow Control : No
Software Flow Control : No


The BIOS chip

This motherboard has a socketed BIOS chip, so buy half a dozen empty Pm49FL004 chips. You will also need some sort of chip extractor tool.

Build flashrom, it is a utility program that is included in coreboot's source, and install it.

Then do something like

sudo flashrom   -V  -c Pm49FL004

Your output should contain the lines

Probing for PMC Pm49FL004, 512 KB: probe_jedec: id1 0x9d, id2 0x6e
Found chip "PMC Pm49FL004" (512 KB) at physical address 0xfff80000.
No operations were specified.

You can now take a copy of the factory BIOS. First read the factory BIOS into a file

sudo flashrom   -V  -c Pm49FL004  -r -o factory

And then verify it


sudo flashrom   -V  -c Pm49FL004   -v  factory

You now have a verified copy of the factory BIOS, ready to reprogram new chips. .

The next step is to use that file to flash a brand new chip. To hot swap the BIOS chip I found it best to lay the machine on its back so you can put the chip out vertically. So gently extract the BIOS chip and put it into an anti-static bag. Get one of your new chips and locate it very carefully into position, note the bevel on one corner. Gentle pressure will now push the chip home. Put the computer back onto its feet, and check that the chip is there.


sudo flashrom   -V  -c Pm49FL004

You should see the output


Probing for PMC Pm49FL004, 512 KB: probe_jedec: id1 0x9d, id2 0x6e
Found chip "PMC Pm49FL004" (512 KB) at physical address 0xfff80000.
No operations were specified.

You can now flash this chip with the factory BIOS. but before you can write to it you must erase it.


sudo flashrom   -V  -c Pm49FL004  -E

sudo flashrom   -V  -c Pm49FL004  -w  factory

And verify that it is a good copy


sudo flashrom   -V  -c Pm49FL004  -v  factory

You can now reboot the machine and check that it works. You will need to interrupt the BIOS, read the optimized setting, reset the boot order, then write the settings back.

Repeat this procedure until you have two backup copies, then put those two copies away somewhere safe. You now have an emergency recovery procedure.

You may like to repeat this so that you have a spare factory BIOS chip to keep near the machine,

Coreboot

You can now build coreboot, check that the payloads are your working filo.elf, and just follow the build instructions. Set minicom working on the second machine, you might like to capture the data into a file. Write the coreboot image to the flash chip, after erasing first, then verify it.

sudo flashrom   -V  -c Pm49FL004  -E
sudo flashrom   -V  -c Pm49FL004  -w  coreboot.rom
sudo flashrom   -V  -c Pm49FL004  -v  coreboot.rom

You can now reboot, and have fun,

Gremlins, Bugs and Gotchas

Ethernet

The ethernet gets changed from eth0 to eth1 by udev during the kernel start up.

My splash screen looks horrible

Splash screens get wrecked, due to lack of video driver at start up.


Invalid CMOS error

You might see this error in the coreboot log, and want to correct it.

PCI: 00:01.0 init
set power on after power fail
RTC Init
Invalid CMOS LB checksum
PNP: 002e.1 init

Hack the program that outputs this error something like

        sum = (~sum)&0x0ffff;
        printk_debug("Sum is %x\n", sum);
        old_sum = ((CMOS_READ(cks_loc)<<8) | CMOS_READ(cks_loc+1))&0x0ffff;
        printk_debug("Read from memory %x\n", old_sum);
        return sum == old_sum;

Run this coreboot so that you see the values being used.

Now build nvramtool from coreboot's source package, and use it to reset the CMOS value to the correct value.

Now you have the correct value to compare against, this fault will disapear.


Timing

BIOS Power up — OS loader Linux — console login Summary
Vendor BIOS (boot from IDE disk) 7 9 16
coreboot (boot from IDE disk) 5 9 14

there is no difference in the speed that jobs run. Compiling the latest version of gcc takes about 26 minutes, this is a make bootstrap, building both a 32 bit and 64 bit compiler.

Public domain I, the copyright holder of this work, hereby release it into the public domain. This applies worldwide.

In case this is not legally possible:
I grant anyone the right to use this work for any purpose, without any conditions, unless such conditions are required by law.