Dell Latitude CPi A366XT

The Dell Latitude CPi A366XT

The Dell Latitude CPi A366XT is an older laptop with 440BX chipset. We're currently evaluating if it's possible to write coreboot support for it.

Hardware

Overview:

• Northbridge: Intel 440BX
• Southbridge: Intel 82371EB
• Super I/O: SMSC FDC37N958FR
  • The Super I/O also "contains" the embedded controller (EC), which is an 8051 derivate.
• Audio/video controller: Neomagic NM2200 MagicGraph/MagicMedia 256AV
• PCMCIA controller: Texas Instruments PCI1225
• ROM/BIOS chip: AM29F040B (PLCC, 512 KB, parallel protocol, socketed)
  • Unfortunately you can not hot-swap a chip in this laptop, it'll immediately do a hard poweroff if you try it (the EC firmware, which is part of the flash chip, likely doesn't like you removing the chip).

lspci -tvnn:

-[0000:00]-+-00.0  Intel Corporation 440BX/ZX/DX - 82443BX/ZX/DX Host bridge [8086:7190]
           +-01.0-[0000:01]--+-00.0  Neomagic Corporation NM2200 [MagicGraph 256AV] [10c8:0005]
           |                 \-00.1  Neomagic Corporation NM2200 [MagicMedia 256AV Audio] [10c8:8005]
           +-03.0  Texas Instruments PCI1225 [104c:ac1c]
           +-03.1  Texas Instruments PCI1225 [104c:ac1c]
           +-07.0  Intel Corporation 82371AB/EB/MB PIIX4 ISA [8086:7110]
           +-07.1  Intel Corporation 82371AB/EB/MB PIIX4 IDE [8086:7111]
           +-07.2  Intel Corporation 82371AB/EB/MB PIIX4 USB [8086:7112]
           \-07.3  Intel Corporation 82371AB/EB/MB PIIX4 ACPI [8086:7113]

cat /proc/cpuinfo:

processor       : 0
vendor_id       : GenuineIntel
cpu family      : 6
model           : 6
model name      : Mobile Pentium II
stepping        : 10
cpu MHz         : 363.984
cache size      : 256 KB
fdiv_bug        : no
hlt_bug         : no
f00f_bug        : no
coma_bug        : no
fpu             : yes
fpu_exception   : yes
cpuid level     : 2
wp              : yes
flags           : fpu vme de pse tsc msr pae mce cx8 sep mtrr pge mca cmov pat pse36 mmx fxsr up
bogomips        : 728.89
clflush size    : 32

Photos

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  Board1 top

• 

  Board1 bottom

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  Board2 top

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  Board2 bottom

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  Frame

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  ROM chip (PLCC, socketed), RAM

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  PCMCIA controller

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  Southbridge

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  Super I/O

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  Integrated audio/video controller

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