http://www.coreboot.org/index.php?title=Developer_Manual/Memory_map&feed=atom&action=historyDeveloper Manual/Memory map - Revision history2013-05-18T20:21:53ZRevision history for this page on the wikiMediaWiki 1.20.5http://www.coreboot.org/index.php?title=Developer_Manual/Memory_map&diff=9937&oldid=prevUwe at 22:33, 18 September 20102010-09-18T22:33:16Z<p></p>
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<td colspan='2' style="background-color: white; color:black;">Revision as of 22:33, 18 September 2010</td>
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<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>All memory below 1 MB has special rules attached to it. Due to legacy reasons, you can't allocate memory freely in that area without taking care.</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>All memory below 1 MB has special rules attached to it. Due to legacy reasons, you can't allocate memory freely in that area without taking care.</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>* 0x00000 - 0x9FFFF: Low 640kB. Should not be clobbered on S3 suspend/resume (exceptions?)</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* <ins class="diffchange diffchange-inline">'''</ins>0x00000 - 0x9FFFF<ins class="diffchange diffchange-inline">'''</ins>: Low 640kB. Should not be clobbered on S3 suspend/resume (exceptions?)</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>* 0xA0000 - 0xAFFFF: VGA graphics memory.</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* <ins class="diffchange diffchange-inline">'''</ins>0xA0000 - 0xAFFFF<ins class="diffchange diffchange-inline">'''</ins>: VGA graphics memory.</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>* 0xB0000 - 0xB7FFF: Old monochrome graphics text mode memory. May not apply for recent cards.</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* <ins class="diffchange diffchange-inline">'''</ins>0xB0000 - 0xB7FFF<ins class="diffchange diffchange-inline">'''</ins>: Old monochrome graphics text mode memory. May not apply for recent cards.</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>* 0xB8000 - 0xBFFFF: VGA text mode memory.</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* <ins class="diffchange diffchange-inline">'''</ins>0xB8000 - 0xBFFFF<ins class="diffchange diffchange-inline">'''</ins>: VGA text mode memory.</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>== Above 1MB ==</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>== Above 1MB ==</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>* 0xFEC0_0000 <del class="diffchange diffchange-inline">may </del>be fixed location IO APIC. Other possible locations are 0xFECX_YZ00 (note that 0xFEC cannot be changed)</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* <ins class="diffchange diffchange-inline">'''</ins>0xFEC0_0000<ins class="diffchange diffchange-inline">''': May </ins>be fixed location IO APIC. Other possible locations are 0xFECX_YZ00 (note that 0xFEC cannot be changed)</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>* 0xFEC0_0000 <del class="diffchange diffchange-inline">is </del>SB600 APIC BAR, can be changed</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* <ins class="diffchange diffchange-inline">'''</ins>0xFEC0_0000<ins class="diffchange diffchange-inline">''': </ins>SB600 APIC BAR, can be changed</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>* 0xFEEx_xxxx are internal APIC cycles for IRQ (MSI)</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* <ins class="diffchange diffchange-inline">'''</ins>0xFEEx_xxxx<ins class="diffchange diffchange-inline">''': These </ins>are internal APIC cycles for IRQ (MSI)</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>* 0xFEC0_0000 - 0xFEC7_FFFF VIA APIC in SB (fixed)</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* <ins class="diffchange diffchange-inline">'''</ins>0xFEC0_0000 - 0xFEC7_FFFF<ins class="diffchange diffchange-inline">''': </ins>VIA APIC in SB (fixed)</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>* 0xFEC8_0000 - 0xFECB_FFFF VIA VPXII APIC</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* <ins class="diffchange diffchange-inline">'''</ins>0xFEC8_0000 - 0xFECB_FFFF<ins class="diffchange diffchange-inline">''': </ins>VIA VPXII APIC</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>* 0xFED4_4000 - 0xFED4_FFFF Trusted platform module (TPM) MEM decode (fixed)</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* <ins class="diffchange diffchange-inline">'''</ins>0xFED4_4000 - 0xFED4_FFFF<ins class="diffchange diffchange-inline">''': </ins>Trusted platform module (TPM) MEM decode (fixed)</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>* 0xFF00_0000 - 0xFFFF_FFFF 16 MByte ROM mapped into address space</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* <ins class="diffchange diffchange-inline">'''</ins>0xFF00_0000 - 0xFFFF_FFFF<ins class="diffchange diffchange-inline">''': </ins>16 MByte ROM mapped into address space</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>* 0xFF80_0000 - 0xFFFF_FFFF 8 MByte ROM mapped into address space</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* <ins class="diffchange diffchange-inline">'''</ins>0xFF80_0000 - 0xFFFF_FFFF<ins class="diffchange diffchange-inline">''': </ins>8 MByte ROM mapped into address space</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>* 0xFFC0_0000 - 0xFFFF_FFFF 4 MByte ROM mapped into address space</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* <ins class="diffchange diffchange-inline">'''</ins>0xFFC0_0000 - 0xFFFF_FFFF<ins class="diffchange diffchange-inline">''': </ins>4 MByte ROM mapped into address space</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>* 0xFFE0_0000 - 0xFFFF_FFFF 2 MByte ROM mapped into address space</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* <ins class="diffchange diffchange-inline">'''</ins>0xFFE0_0000 - 0xFFFF_FFFF<ins class="diffchange diffchange-inline">''': </ins>2 MByte ROM mapped into address space</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>* 0xFFF0_0000 - 0xFFFF_FFFF 1 MByte ROM mapped into address space</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* <ins class="diffchange diffchange-inline">'''</ins>0xFFF0_0000 - 0xFFFF_FFFF<ins class="diffchange diffchange-inline">''': </ins>1 MByte ROM mapped into address space</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>* 0xFFF8_0000 - 0xFFFF_FFFF 512 kByte ROM mapped into address space</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* <ins class="diffchange diffchange-inline">'''</ins>0xFFF8_0000 - 0xFFFF_FFFF<ins class="diffchange diffchange-inline">''': </ins>512 kByte ROM mapped into address space</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>* 0xFFFC_0000 - 0xFFFF_FFFF 256 kByte ROM mapped into address space</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* <ins class="diffchange diffchange-inline">'''</ins>0xFFFC_0000 - 0xFFFF_FFFF<ins class="diffchange diffchange-inline">''': </ins>256 kByte ROM mapped into address space</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>* 0xFFFE_0000 - 0xFFFF_FFFF 128 kByte ROM mapped into address space</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* <ins class="diffchange diffchange-inline">'''</ins>0xFFFE_0000 - 0xFFFF_FFFF<ins class="diffchange diffchange-inline">''': </ins>128 kByte ROM mapped into address space</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>Some southbridges will restrict initial ROM mapping size to 1 MB or less. Some southbridges can't support more than 1MB or 4 MB. Some southbridges allow you to map the ROM anywhere.</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>Some southbridges will restrict initial ROM mapping size to 1 MB or less. Some southbridges can't support more than 1MB or 4 MB. Some southbridges allow you to map the ROM anywhere.</div></td></tr>
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<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>= coreboot related settings/usage =</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>= coreboot related settings/usage =</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>* 0x00000200: Location of stage2 in v3 (note: this may be obsolete in v4. TODO: Check)</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* <ins class="diffchange diffchange-inline">'''</ins>0x00000200<ins class="diffchange diffchange-inline">'''</ins>: Location of stage2 in v3 (note: this may be obsolete in v4. TODO: Check)</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>* 0xFEC00000: '''DEVICE_MEM_HIGH'''. The area between '''DEVICE_MEM_HIGH''' and 0xFFFFFFFF (4 GB) will be avoided by the resource allocator.</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* <ins class="diffchange diffchange-inline">'''</ins>0xFEC00000<ins class="diffchange diffchange-inline">'''</ins>: '''DEVICE_MEM_HIGH'''. The area between '''DEVICE_MEM_HIGH''' and 0xFFFFFFFF (4 GB) will be avoided by the resource allocator.</div></td></tr>
</table>Uwehttp://www.coreboot.org/index.php?title=Developer_Manual/Memory_map&diff=9936&oldid=prevUwe at 22:31, 18 September 20102010-09-18T22:31:09Z<p></p>
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<td colspan='2' style="background-color: white; color:black;">← Older revision</td>
<td colspan='2' style="background-color: white; color:black;">Revision as of 22:31, 18 September 2010</td>
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<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>This page contains the description of various memory areas important for coreboot development.</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>This page contains the description of various <ins class="diffchange diffchange-inline">'''</ins>memory areas<ins class="diffchange diffchange-inline">''' </ins>important for coreboot development.</div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div> </div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins class="diffchange diffchange-inline">= Physical memory properties =</ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div> </div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins class="diffchange diffchange-inline">== Below 1MB ==</ins></div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div><del style="color: red; font-weight: bold; text-decoration: none;">=Physical memory properties=</del></div></td><td colspan="2"> </td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div><del style="color: red; font-weight: bold; text-decoration: none;">==Below 1MB==</del></div></td><td colspan="2"> </td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>All memory below 1 MB has special rules attached to it. Due to legacy reasons, you can't allocate memory freely in that area without taking care.</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>All memory below 1 MB has special rules attached to it. Due to legacy reasons, you can't allocate memory freely in that area without taking care.</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div><del style="color: red; font-weight: bold; text-decoration: none;">*0x00000 - 0x9FFFF: Low 640kB. Should not be clobbered on S3 suspend/resume (exceptions?)</del></div></td><td colspan="2"> </td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div><del style="color: red; font-weight: bold; text-decoration: none;">*0xA0000 - 0xAFFFF: VGA graphics memory.</del></div></td><td colspan="2"> </td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div><del style="color: red; font-weight: bold; text-decoration: none;">*0xB0000 - 0xB7FFF: Old monochrome graphics text mode memory. May not apply for recent cards.</del></div></td><td colspan="2"> </td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div><del style="color: red; font-weight: bold; text-decoration: none;">*0xB8000 - 0xBFFFF: VGA text mode memory.</del></div></td><td colspan="2"> </td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>==Above 1MB==</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins class="diffchange diffchange-inline">* 0x00000 - 0x9FFFF: Low 640kB. Should not be clobbered on S3 suspend/resume (exceptions?)</ins></div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*0xFEC0_0000 may be fixed location IO APIC. Other possible locations are 0xFECX_YZ00 (<del class="diffchange diffchange-inline">not </del>that 0xFEC cannot be changed)</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins class="diffchange diffchange-inline">* 0xA0000 - 0xAFFFF: VGA graphics memory.</ins></div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*0xFEC0_0000 is SB600 APIC BAR, can be changed</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins class="diffchange diffchange-inline">* 0xB0000 - 0xB7FFF: Old monochrome graphics text mode memory. May not apply for recent cards.</ins></div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*0xFEEx_xxxx are internal APIC cycles for IRQ (MSI)</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins class="diffchange diffchange-inline">* 0xB8000 - 0xBFFFF: VGA text mode memory.</ins></div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*0xFEC0_0000 - 0xFEC7_FFFF VIA APIC in SB (fixed)</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div> </div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*0xFEC8_0000 - 0xFECB_FFFF VIA VPXII APIC</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>== Above 1MB ==</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*0xFED4_4000 - 0xFED4_FFFF <del class="diffchange diffchange-inline">trusted </del>platform module MEM decode (fixed)</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div> </div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*0xFF00_0000 - 0xFFFF_FFFF 16 MByte ROM mapped into address space</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* 0xFEC0_0000 may be fixed location IO APIC. Other possible locations are 0xFECX_YZ00 (<ins class="diffchange diffchange-inline">note </ins>that 0xFEC cannot be changed)</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*0xFF80_0000 - 0xFFFF_FFFF 8 MByte ROM mapped into address space</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* 0xFEC0_0000 is SB600 APIC BAR, can be changed</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*0xFFC0_0000 - 0xFFFF_FFFF 4 MByte ROM mapped into address space</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* 0xFEEx_xxxx are internal APIC cycles for IRQ (MSI)</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*0xFFE0_0000 - 0xFFFF_FFFF 2 MByte ROM mapped into address space</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* 0xFEC0_0000 - 0xFEC7_FFFF VIA APIC in SB (fixed)</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*0xFFF0_0000 - 0xFFFF_FFFF 1 MByte ROM mapped into address space</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* 0xFEC8_0000 - 0xFECB_FFFF VIA VPXII APIC</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*0xFFF8_0000 - 0xFFFF_FFFF 512 kByte ROM mapped into address space</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* 0xFED4_4000 - 0xFED4_FFFF <ins class="diffchange diffchange-inline">Trusted </ins>platform module <ins class="diffchange diffchange-inline">(TPM) </ins>MEM decode (fixed)</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*0xFFFC_0000 - 0xFFFF_FFFF 256 kByte ROM mapped into address space</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* 0xFF00_0000 - 0xFFFF_FFFF 16 MByte ROM mapped into address space</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*0xFFFE_0000 - 0xFFFF_FFFF 128 kByte ROM mapped into address space</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* 0xFF80_0000 - 0xFFFF_FFFF 8 MByte ROM mapped into address space</div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* 0xFFC0_0000 - 0xFFFF_FFFF 4 MByte ROM mapped into address space</div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* 0xFFE0_0000 - 0xFFFF_FFFF 2 MByte ROM mapped into address space</div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* 0xFFF0_0000 - 0xFFFF_FFFF 1 MByte ROM mapped into address space</div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* 0xFFF8_0000 - 0xFFFF_FFFF 512 kByte ROM mapped into address space</div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* 0xFFFC_0000 - 0xFFFF_FFFF 256 kByte ROM mapped into address space</div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* 0xFFFE_0000 - 0xFFFF_FFFF 128 kByte ROM mapped into address space</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>Some southbridges will restrict initial ROM mapping size to 1 MB or less. Some southbridges can't support more than 1MB or 4 MB. Some southbridges allow you to map the ROM anywhere.</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>Some southbridges will restrict initial ROM mapping size to 1 MB or less. Some southbridges can't support more than 1MB or 4 MB. Some southbridges allow you to map the ROM anywhere.</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>=<del class="diffchange diffchange-inline">Coreboot </del>related settings/usage=</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>= <ins class="diffchange diffchange-inline">coreboot </ins>related settings/usage =</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*0x00000200: Location of stage2 in v3</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div> </div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*0xFEC00000: DEVICE_MEM_HIGH. The area between DEVICE_MEM_HIGH and 0xFFFFFFFF (4 GB) will be avoided by the resource allocator.</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* 0x00000200: Location of stage2 in v3 <ins class="diffchange diffchange-inline">(note: this may be obsolete in v4. TODO: Check)</ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>* 0xFEC00000: <ins class="diffchange diffchange-inline">'''</ins>DEVICE_MEM_HIGH<ins class="diffchange diffchange-inline">'''</ins>. The area between <ins class="diffchange diffchange-inline">'''</ins>DEVICE_MEM_HIGH<ins class="diffchange diffchange-inline">''' </ins>and 0xFFFFFFFF (4 GB) will be avoided by the resource allocator.</div></td></tr>
</table>Uwehttp://www.coreboot.org/index.php?title=Developer_Manual/Memory_map&diff=8686&oldid=prevUwe: moved Memory map to Developer Manual/Memory map: Belongs into the developer manual.2009-06-24T13:28:06Z<p>moved <a href="/index.php?title=Memory_map&action=edit&redlink=1" class="new" title="Memory map (page does not exist)">Memory map</a> to <a href="/Developer_Manual/Memory_map" title="Developer Manual/Memory map">Developer Manual/Memory map</a>: Belongs into the developer manual.</p>
<table class='diff diff-contentalign-left'>
<tr style='vertical-align: top;'>
<td colspan='1' style="background-color: white; color:black;">← Older revision</td>
<td colspan='1' style="background-color: white; color:black;">Revision as of 13:28, 24 June 2009</td>
</tr></table>Uwehttp://www.coreboot.org/index.php?title=Developer_Manual/Memory_map&diff=7661&oldid=prevHailfinger: /* Above 1MB */ SB600 APIC2008-12-09T18:27:48Z<p><span dir="auto"><span class="autocomment">Above 1MB: </span> SB600 APIC</span></p>
<table class='diff diff-contentalign-left'>
<col class='diff-marker' />
<col class='diff-content' />
<col class='diff-marker' />
<col class='diff-content' />
<tr style='vertical-align: top;'>
<td colspan='2' style="background-color: white; color:black;">← Older revision</td>
<td colspan='2' style="background-color: white; color:black;">Revision as of 18:27, 9 December 2008</td>
</tr><tr><td colspan="2" class="diff-lineno">Line 11:</td>
<td colspan="2" class="diff-lineno">Line 11:</td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>==Above 1MB==</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>==Above 1MB==</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>*0xFEC0_0000 may be fixed location IO APIC. Other possible locations are 0xFECX_YZ00 (not that 0xFEC cannot be changed)</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>*0xFEC0_0000 may be fixed location IO APIC. Other possible locations are 0xFECX_YZ00 (not that 0xFEC cannot be changed)</div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins style="color: red; font-weight: bold; text-decoration: none;">*0xFEC0_0000 is SB600 APIC BAR, can be changed</ins></div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>*0xFEEx_xxxx are internal APIC cycles for IRQ (MSI)</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>*0xFEEx_xxxx are internal APIC cycles for IRQ (MSI)</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>*0xFEC0_0000 - 0xFEC7_FFFF VIA APIC in SB (fixed)</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>*0xFEC0_0000 - 0xFEC7_FFFF VIA APIC in SB (fixed)</div></td></tr>
</table>Hailfingerhttp://www.coreboot.org/index.php?title=Developer_Manual/Memory_map&diff=7619&oldid=prevHailfinger: /* Above 1MB */ ROM mapping2008-11-27T16:05:45Z<p><span dir="auto"><span class="autocomment">Above 1MB: </span> ROM mapping</span></p>
<table class='diff diff-contentalign-left'>
<col class='diff-marker' />
<col class='diff-content' />
<col class='diff-marker' />
<col class='diff-content' />
<tr style='vertical-align: top;'>
<td colspan='2' style="background-color: white; color:black;">← Older revision</td>
<td colspan='2' style="background-color: white; color:black;">Revision as of 16:05, 27 November 2008</td>
</tr><tr><td colspan="2" class="diff-lineno">Line 12:</td>
<td colspan="2" class="diff-lineno">Line 12:</td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>*0xFEC0_0000 may be fixed location IO APIC. Other possible locations are 0xFECX_YZ00 (not that 0xFEC cannot be changed)</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>*0xFEC0_0000 may be fixed location IO APIC. Other possible locations are 0xFECX_YZ00 (not that 0xFEC cannot be changed)</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>*0xFEEx_xxxx are internal APIC cycles for IRQ (MSI)</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>*0xFEEx_xxxx are internal APIC cycles for IRQ (MSI)</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*<del class="diffchange diffchange-inline">FEC0_0000 </del>- <del class="diffchange diffchange-inline">FEC7_FFFF </del>VIA APIC in SB (fixed)</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>*<ins class="diffchange diffchange-inline">0xFEC0_0000 </ins>- <ins class="diffchange diffchange-inline">0xFEC7_FFFF </ins>VIA APIC in SB (fixed)</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*<del class="diffchange diffchange-inline">FEC8_0000 - FECB_FFFF </del>-VIA VPXII APIC</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>*<ins class="diffchange diffchange-inline">0xFEC8_0000 </ins>- <ins class="diffchange diffchange-inline">0xFECB_FFFF </ins>VIA VPXII APIC</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*<del class="diffchange diffchange-inline">FED4_4000 </del>- <del class="diffchange diffchange-inline">FED4_FFFF </del>trusted platform module MEM decode (fixed)</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>*<ins class="diffchange diffchange-inline">0xFED4_4000 </ins>- <ins class="diffchange diffchange-inline">0xFED4_FFFF </ins>trusted platform module MEM decode (fixed)</div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins class="diffchange diffchange-inline">*0xFF00_0000 - 0xFFFF_FFFF 16 MByte ROM mapped into address space</ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins class="diffchange diffchange-inline">*0xFF80_0000 - 0xFFFF_FFFF 8 MByte ROM mapped into address space</ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins class="diffchange diffchange-inline">*0xFFC0_0000 - 0xFFFF_FFFF 4 MByte ROM mapped into address space</ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins class="diffchange diffchange-inline">*0xFFE0_0000 - 0xFFFF_FFFF 2 MByte ROM mapped into address space</ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins class="diffchange diffchange-inline">*0xFFF0_0000 - 0xFFFF_FFFF 1 MByte ROM mapped into address space</ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins class="diffchange diffchange-inline">*0xFFF8_0000 - 0xFFFF_FFFF 512 kByte ROM mapped into address space</ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins class="diffchange diffchange-inline">*0xFFFC_0000 - 0xFFFF_FFFF 256 kByte ROM mapped into address space</ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins class="diffchange diffchange-inline">*0xFFFE_0000 - 0xFFFF_FFFF 128 kByte ROM mapped into address space</ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div> </div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins class="diffchange diffchange-inline">Some southbridges will restrict initial ROM mapping size to 1 MB or less. Some southbridges can't support more than 1MB or 4 MB. Some southbridges allow you to map the ROM anywhere.</ins></div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>=Coreboot related settings/usage=</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>=Coreboot related settings/usage=</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>*0x00000200: Location of stage2 in v3</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>*0x00000200: Location of stage2 in v3</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>*0xFEC00000: DEVICE_MEM_HIGH. The area between DEVICE_MEM_HIGH and 0xFFFFFFFF (4 GB) will be avoided by the resource allocator.</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>*0xFEC00000: DEVICE_MEM_HIGH. The area between DEVICE_MEM_HIGH and 0xFFFFFFFF (4 GB) will be avoided by the resource allocator.</div></td></tr>
</table>Hailfingerhttp://www.coreboot.org/index.php?title=Developer_Manual/Memory_map&diff=7618&oldid=prevHailfinger at 15:54, 27 November 20082008-11-27T15:54:22Z<p></p>
<table class='diff diff-contentalign-left'>
<col class='diff-marker' />
<col class='diff-content' />
<col class='diff-marker' />
<col class='diff-content' />
<tr style='vertical-align: top;'>
<td colspan='2' style="background-color: white; color:black;">← Older revision</td>
<td colspan='2' style="background-color: white; color:black;">Revision as of 15:54, 27 November 2008</td>
</tr><tr><td colspan="2" class="diff-lineno">Line 1:</td>
<td colspan="2" class="diff-lineno">Line 1:</td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>This page contains the description of various memory areas important for coreboot development.</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>This page contains the description of various memory areas important for coreboot development.</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div><del class="diffchange diffchange-inline">==</del>=Physical memory properties<del class="diffchange diffchange-inline">==</del>=</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>=Physical memory properties=</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>==Below 1MB==</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>==Below 1MB==</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>All memory below 1 MB has special rules attached to it. Due to legacy reasons, you can't allocate memory freely in that area without taking care.</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>All memory below 1 MB has special rules attached to it. Due to legacy reasons, you can't allocate memory freely in that area without taking care.</div></td></tr>
<tr><td colspan="2" class="diff-lineno">Line 16:</td>
<td colspan="2" class="diff-lineno">Line 16:</td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>*FED4_4000 - FED4_FFFF trusted platform module MEM decode (fixed)</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>*FED4_4000 - FED4_FFFF trusted platform module MEM decode (fixed)</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div><del class="diffchange diffchange-inline">==</del>=Coreboot related settings/usage<del class="diffchange diffchange-inline">==</del>=</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>=Coreboot related settings/usage=</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>*0x00000200: Location of stage2 in v3</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>*0x00000200: Location of stage2 in v3</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>*0xFEC00000: DEVICE_MEM_HIGH. The area between DEVICE_MEM_HIGH and 0xFFFFFFFF (4 GB) will be avoided by the resource allocator.</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>*0xFEC00000: DEVICE_MEM_HIGH. The area between DEVICE_MEM_HIGH and 0xFFFFFFFF (4 GB) will be avoided by the resource allocator.</div></td></tr>
</table>Hailfingerhttp://www.coreboot.org/index.php?title=Developer_Manual/Memory_map&diff=7617&oldid=prevHailfinger: New page: This page contains the description of various memory areas important for coreboot development. ===Physical memory properties=== ==Below 1MB== All memory below 1 MB has special rules attac...2008-11-27T15:53:54Z<p>New page: This page contains the description of various memory areas important for coreboot development. ===Physical memory properties=== ==Below 1MB== All memory below 1 MB has special rules attac...</p>
<p><b>New page</b></p><div>This page contains the description of various memory areas important for coreboot development.<br />
<br />
===Physical memory properties===<br />
==Below 1MB==<br />
All memory below 1 MB has special rules attached to it. Due to legacy reasons, you can't allocate memory freely in that area without taking care.<br />
*0x00000 - 0x9FFFF: Low 640kB. Should not be clobbered on S3 suspend/resume (exceptions?)<br />
*0xA0000 - 0xAFFFF: VGA graphics memory.<br />
*0xB0000 - 0xB7FFF: Old monochrome graphics text mode memory. May not apply for recent cards.<br />
*0xB8000 - 0xBFFFF: VGA text mode memory.<br />
<br />
==Above 1MB==<br />
*0xFEC0_0000 may be fixed location IO APIC. Other possible locations are 0xFECX_YZ00 (not that 0xFEC cannot be changed)<br />
*0xFEEx_xxxx are internal APIC cycles for IRQ (MSI)<br />
*FEC0_0000 - FEC7_FFFF VIA APIC in SB (fixed)<br />
*FEC8_0000 - FECB_FFFF -VIA VPXII APIC<br />
*FED4_4000 - FED4_FFFF trusted platform module MEM decode (fixed)<br />
<br />
===Coreboot related settings/usage===<br />
*0x00000200: Location of stage2 in v3<br />
*0xFEC00000: DEVICE_MEM_HIGH. The area between DEVICE_MEM_HIGH and 0xFFFFFFFF (4 GB) will be avoided by the resource allocator.</div>Hailfinger