EHCI Debug Port - Revision history

GNUtoo: /* More information */

2013-06-07T11:30:27Z

‎More information

2013-06-06T18:32:59Z

‎Finding the USB debug port

2013-03-17T09:43:22Z

2012-09-23T20:42:22Z

Fixed lspci command

2012-09-07T12:30:59Z

Added WIP tool

2012-07-29T09:37:44Z

ICH7: debug device working

2010-09-26T00:29:40Z

‎Supported chipsets

2010-09-25T19:39:13Z

‎Supported chipsets: MCP55 USB Debug support works fine.

2010-09-23T22:48:14Z

‎Using the EHCI debug port: usb_debug_io.c

2010-09-23T18:08:06Z

Typo.

@@ Line 74: / Line 74: @@
 Generally, each EHCI controller can offer at most one debug port. That port corresponds to a fixed physical USB port. Locating that physical port is rather difficult because you need to look at lots of information.
-Carl-Daniel Hailfinger has written [http://coreboot.org/pipermail/coreboot/2008-September/038635.html a script] which can help finding that port.
+Carl-Daniel Hailfinger [http://www.coreboot.org/pipermail/coreboot/2008-September/038618.html has written] [http://www.coreboot.org/pipermail/coreboot/attachments/20080909/ae11c291/attachment.sh a script] which can help finding that port.
 == Hardware capability ==

@@ Line 130: / Line 130: @@
 * 1039:7002 SiS EHCI (rev 00)
-== Where to buy ==
+== Devices/Dongles ==
-Currently there seems to be only two devices which can use the EHCI Debug Port, the '''NET20DC''' and the '''AMIDebug RX'''.
+To be able to use the debug port it needs to be connected to a compatible device.
 === NET20DC ===
@@ Line 145: / Line 149: @@
 * http://www.ami.com/amidebugrx/
 == More information ==

@@ Line 80: / Line 80: @@
 The Debug Port is optional, please check if EHCI controllers near you support it:
-  $ '''lspci -vs $(lspci|grep EHCI|cut -f1 -d' ')'''
+  $ '''for i in $(lspci|grep EHCI|cut -f1 -d' ') ; do
 :1d.7 USB Controller: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB2 EHCI Controller (rev 03) (prog-if 20 [EHCI])
   Subsystem: IBM Unknown device 0566
@@ Line 90: / Line 92: @@
 Look for a line like the last one above. Please include the PCI device ID too:
-  $ '''lspci -ns $(lspci|grep EHCI|cut -f1 -d' ')'''
+  $ '''for i in $(lspci|grep EHCI|cut -f1 -d' ') ; do
 :1d.7 0c03: 8086:265c (rev 03)

← Older revision		Revision as of 12:30, 7 September 2012
Line 141:		Line 141:

	* http://www.ami.com/amidebugrx/		* http://www.ami.com/amidebugrx/
		+
		+	== DIY ==
		+
		+	Or you can make your own usb debug dongle. See schematics and PCB here:
		+	And software for this dongle here: http://git.stackframe.org/?p=fx2lib;a=summary

	== More information ==		== More information ==

@@ Line 34: / Line 34: @@
 | Intel
 | 82801GX (ICH7)
-| style="background:yellow" | Untested
+| style="background:lime" | OK
+|

@@ Line 28: / Line 28: @@
 | AMD
 | SB700
-| style="background:yellow" | Untested
+| style="background:orange" | WIP
-| Should work fine, but untested.
+| Probably won't work, a patch is being prepared.
 |- bgcolor="#dddddd" valign="top"
@@ Line 47: / Line 47: @@
 | SiS966
 | style="background:yellow" | Untested
-| '''Note:''' It's unclear if the chipset actually has EHCI Debug Port functionality and if yes, whether the current coreboot code supports it properly (or whether it's just copy-pasted code from another chipset).
+| '''Note:''' It's unclear if the chipset actually has EHCI Debug Port functionality, and (if yes), whether the current coreboot code supports it properly (or whether it's just copy-pasted code from another chipset).
 |}

@@ Line 52: / Line 52: @@
 == Using the EHCI debug port ==
 To get a USB debug console, enable '''CONFIG_USBDEBUG''' (menu option '''USB 2.0 EHCI debug dongle support''') in coreboot's kconfig.
@@ Line 62: / Line 64: @@
 Then you can power up your coreboot target board and you should see the usual coreboot bootlog in minicom on your host PC.
 == Finding the USB debug port ==