GIGABYTE GA-M57SLI-S4 - Revision history

Quux: /* Which board do you have? */

2010-12-02T08:11:05Z

‎Which board do you have?

2010-12-02T08:02:40Z

‎Which board do you have?: 4 versions

2010-12-02T07:58:18Z

‎Which board do you have?: 4 versions BIOS

2010-12-02T06:57:57Z

‎SOIC hardware hack: Stuge's video talk (FOSSDEM)

2010-12-02T06:40:37Z

‎Which board do you have?: latest BIOS rev.

2010-09-26T14:27:00Z

2010-05-05T08:14:59Z

‎Building coreboot

2009-07-02T19:09:45Z

‎Status

2009-07-02T17:53:20Z

2009-06-21T09:51:56Z

@@ Line 18: / Line 18: @@
 * FHL  for  GA-M57SLI- S4  (rev. 2.0)    AM3 ready, soic
 * FJD  for  GA-M57SLI-DS4  (rev. 2.0)    AM3 ready, soic
 == Status ==

@@ Line 14: / Line 14: @@
 recent legacy BIOS variants are (for fallback purposes):
-F15E  GA-M57SLI- S4  (rev. 1.0)    non AM3   plcc (fifth variant: socketed plcc, maybe on early sample board only)
+* F15E for  GA-M57SLI- S4  (rev. 1.0)    non AM3,   plcc (fifth variant: socketed plcc, maybe on early sample board only)
-F15E  GA-M57SLI- S4  (rev. 1.1)    non AM3   plcc (not flashable with legacy tool here (no 'chipset support')
+* F15E for  GA-M57SLI- S4  (rev. 1.1)    non AM3,   plcc (not flashable with legacy tool here (no 'chipset support')
-FHL   GA-M57SLI- S4  (rev. 2.0)    AM3 ready soic
+* FHL  for  GA-M57SLI- S4  (rev. 2.0)    AM3 ready, soic
-FJD   GA-M57SLI-DS4  (rev. 2.0)    AM3 ready soic
+* FJD  for  GA-M57SLI-DS4  (rev. 2.0)    AM3 ready, soic
 == Status ==

@@ Line 1: / Line 1: @@
 == Which board do you have? ==
-The '''GIGABYTE GA-M57SLI-S4''' seems to exist in 4 versions as of 2007/05. The latest manufacturer BIOS update does not support all those hw versions, appearently there are certain hardware differences (no "chipset support" according to the 2010-dated flashing tool by Gigabyte).
+The '''GIGABYTE GA-M57SLI-S4''' seems to exist in 4 versions as of 2007/05.
 There is a version with a PLCC socket for the BIOS chip ([http://www.motherboards.org/imageview.html?i=/images/reviews/motherboards/1628_p6_6.jpg socketed BIOS]), but this might be a pre-production board since nobody has so far (2007/03) confirmed the purchase of a GA-M57SLI-S4 board with socketed BIOS. The mainboard photo on the backside of the GA-M57SLI-S4 box shows a ROM socket too.
@@ Line 11: / Line 11: @@
 | [[Image:m57slis4-spi.jpg|thumb|An SPI revision of the GA-M57SLI-S4]]
 |}
 == Status ==

@@ Line 143: / Line 143: @@
 If you have an SOIC revision, you can add a second SOIC chip in the unpopulated position, and use a switch to toggle between both chips.
-The most recent instructions by Peter Stuge can be found here [http://stuge.se/m57sli/]. This is the recommended modification. Peter's company also sells pre-modified boards if you don't want to do the soldering, contact peter at stuge dot se for more information.
+The most recent instructions by Peter Stuge can be found here [http://stuge.se/m57sli/]. This is the recommended modification. Peter's company also sells pre-modified boards if you don't want to do the soldering, contact peter at stuge dot se for more information. Also, you may watch Peter's video lecture on coreboot available at youtube asf. for recent info.
 Older instructions can be found here [http://coreboot.org/pipermail/coreboot/2007-September/024474.html here], and here are [http://stuge.se/lb/m57sli/ some photos]. These instructions have been [http://www.coreboot.org/pipermail/coreboot/2007-October/025906.html confirmed to work].

@@ Line 1: / Line 1: @@
 == Which board do you have? ==
-The '''GIGABYTE GA-M57SLI-S4''' seems to exist in 4 versions as of 2007/05.
+The '''GIGABYTE GA-M57SLI-S4''' seems to exist in 4 versions as of 2007/05. The latest manufacturer BIOS update does not support all those hw versions, appearently there are certain hardware differences (no "chipset support" according to the 2010-dated flashing tool by Gigabyte).
 There is a version with a PLCC socket for the BIOS chip ([http://www.motherboards.org/imageview.html?i=/images/reviews/motherboards/1628_p6_6.jpg socketed BIOS]), but this might be a pre-production board since nobody has so far (2007/03) confirmed the purchase of a GA-M57SLI-S4 board with socketed BIOS. The mainboard photo on the backside of the GA-M57SLI-S4 box shows a ROM socket too.

@@ Line 119: / Line 119: @@
 == Before you begin ==
-The fact that the BIOS is soldered onto the board complicates matters considerably, because it means that one flash of a faulty image will render your board unusable (it will be 'bricked'). [[Top Hat Flash]] does not work with the SST 49LF040B 33-4C-NHE soldered onto the GA-M57SLI-S4, but might work with other chips (FWH). This means a hardware hack is necessary to prevent accidental bricking of the board.
+The fact that the BIOS is soldered onto the board complicates matters considerably, because it means that one flash of a faulty image will render your board unusable (it will be 'bricked'). [[Developer Manual/Tools#Top_Hat_Flash|Top Hat Flash]] does not work with the SST 49LF040B 33-4C-NHE soldered onto the GA-M57SLI-S4, but might work with other chips (FWH). This means a hardware hack is necessary to prevent accidental bricking of the board.
 This board sells for around €83 ($104 in the US). With it's standard F8 legacy BIOS it requires the '''noapic''' boot parameter with most old kernels (legacy BIOS v. F12 is better).

@@ Line 409: / Line 409: @@
 === Building coreboot ===
-Make sure that the path to your payload is correct, by editing
+See the [[Build HOWTO]] for information on how to build coreboot for this board.
-−
-  targets/gigabyte/m57sli/Config.lb
-−
-and updating all the lines that start with 'payload'. There are 2 occurrences, one for the normal image, and one for the fallback image.
-−
-If you get compilation errors, you may need to disable the stack protector that is now enabled by default in the version of GCC shipped with some newer distros. See the [[stack protector]] page.
-−
-Now build a target directory:
-−
-  cd targets
-  ./buildtarget gigabyte/m57sli
-−
-Finally build the image:
-−
-  cd gigabyte/m57sli/m57sli
-  make
-−
-This will generate a linuxbios.rom image, which is 512KB large. That's the file that should be burned into your BIOS chip.
 == Burning coreboot ==

@@ Line 73: / Line 73: @@
 |HTX_status = N/A
-|Floppy_status = No
+|Floppy_status = Untested
-|Floppy_comments = Should work, but doesn't. Untested for a long time, maybe it will work with new revisions. '''***needs testing***'''
+|Floppy_comments = Should work, but '''***needs testing***'''.
 |COM1_status = OK
 |COM1_comments = Serial console for coreboot and Linux is fully operational.
 |COM2_status = N/A
-|PP_status = No
+|PP_status = OK
-|PP_comments = No device found on '''modprobe parport'''.
+|PP_comments = Works with a parallel port printer. (Needs coreboot v2 >= r4396.)
 |PS2_keyboard_status = OK
 |PS2_keyboard_comments = Works on Seabios without problems.

@@ Line 22: / Line 22: @@
 |CPU_multiple_status = N/A
 |CPU_multicore_status = OK
-|CPU_virt_status = Untested
+|CPU_virt_status = OK
 |RAM_EDO_status = N/A