Difference between revisions of "GSoC"

From coreboot
Jump to: navigation, search
Line 1: Line 1:
 
= Google Summer of Code 2011 =  
 
= Google Summer of Code 2011 =  
 
THIS PAGE NEEDS UPDATING for [http://www.google-melange.com/ GSoC 2011].
 
 
 
= Google Summer of Code 2010 =
 
  
 
http://3.bp.blogspot.com/_fxRR_bT3LgA/S5U3rk2J-eI/AAAAAAAACE8/mBRYQwSqvqQ/s400/2010_NoURL_300x267px.jpg
 
http://3.bp.blogspot.com/_fxRR_bT3LgA/S5U3rk2J-eI/AAAAAAAACE8/mBRYQwSqvqQ/s400/2010_NoURL_300x267px.jpg
  
Welcome to the [http://code.google.com/soc/ Google Summer of Code(tm)] page of the [[Welcome to coreboot|coreboot project]]. Apply for a coreboot GSoC project at http://socghop.appspot.com/.
+
Welcome to the [www.google-melange.com/ Google Summer of Code(tm)] page of the [[Welcome to coreboot|coreboot project]]. Apply for a coreboot GSoC project at http://socghop.appspot.com/.
  
 
This year, coreboot also tries to host some flashrom projects.
 
This year, coreboot also tries to host some flashrom projects.
Line 14: Line 9:
 
== Deadlines ==
 
== Deadlines ==
  
Make sure you check the [http://socghop.appspot.com/document/show/gsoc_program/google/gsoc2010/faqs#timeline Deadlines]
+
Make sure you check thehttps://socghop.appspot.com/document/show/gsoc_program/google/gsoc2011/timeline
  
  
 +
= Why work for coreboot =
  
= 2010 Projects =
+
Why would you like to work for coreboot?
  
== USB drivers for libpayload ==
+
* coreboot offers you the opportunity to work with modern technology "right on the iron".
 +
* Your application will be available to users worldwide and promoted along with all other coreboot projects.
 +
* We are a very passionate team - so you will interact directly with the project initiators and project leaders.
 +
* We have a large, helpful community. Over 100 experts in hardware and firmware lurk on our mailing list, many of them waiting to help you.
  
OHCI and XHCI drivers for libpayload.
 
  
Notice that libpayload code must be licensed BSD-style (so ports from FILO, SeaBIOS or Linux won't work).
+
= Summer of Code Application =
Pick a given set and tell us why it's enough work for the allocated time, but not too much for you. Also, which sources (if any) you want to draw from. We will not accept code that has been taken from other (GPL) projects. If you are taking this project you have to be willing and capable of writing your own hardware drivers.
+
  
=== Links ===
+
Please complete the standard Google SoC 2011 application. Prospective corebot GSoC student should provide the following information as part of their application.
* ?
+
  
=== Student ===
+
:Name:
 +
:Email:
 +
:IM/IRC/Skype/other contact:
  
* Patrick Georgi
+
:Country/Timezone:
 +
:School:
 +
:Degree Program:
 +
:Year:
  
=== Mentors ===
+
:Most students have some time off planned during GSoC. Do you have any vacations? When and how long?
* Stefan Reinauer
+
  
  
== TianoCore on coreboot ==
+
:coreboot welcomes students from all backgrounds and levels of experience. To be seriously consider for coreboot GSoC, we recommend joining the mailing list and IRC channel. Introduce yourself and mention that you are a prospective GSoC student. Ask questions and discuss the project that you are considering. Community involvement is a key component of coreboot development. By the time you have submitted your application, you should have downloaded, built a and booted coreboot  in QEMU, SimNow, or on real hardware. Please, email your serial output results to the mailing list.
  
[[Image:Tianocoreboot.png|160px|right]]
+
:The following information will help coreboot match students with mentors and projects.
  
[http://www.tianocore.org/ Tiano Core] is Intel's EFI implementation. Unlike coreboot, it is not a firmware, but rather a bootloader. In 2008 there was an initial port of TianoCore to run on coreboot, but there are many things left to do.
+
:Please comment on your software and firmware experience.
  
* Improve Tiano Core / EDK2 running as a coreboot payload
+
:Have you participated in the coreboot community before?
* Implement a coreboot framebuffer driver for Tiano Core
+
* Implement a coreboot flash filesystem (CBFS) driver for Tiano Core
+
* Integrate and automate check out and build process of Tiano Core
+
* Create CorebootPkg using OVMF instead of DUET.
+
* Provide a script that creates working binaries for the EDK shell, EDK apps, FAT driver(?), ...
+
* The final work must compile on a cross gcc, and coreboot's crossgcc script has to be adapted so it can build this compiler (if the default script is not capable of doing so yet)
+
  
This project requires no hardware skills, but especially in case of TianoCore will require knowledge of Microsoft compilers as well as the GNU tool chain.
+
:Have you contributed to an open source project? Which one? What was your experience?
  
=== Links ===
+
:Have you built and run coreboot? Did you have problems?
* [http://www.tianocore.org/ Tiano Core]
+
* https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2/
+
  
=== Mentors ===
+
:Bonus, Did you find and fix a coreboot bug? Did you send a patch to the email list?
* [[User:Rminnich|Ron Minnich]]
+
* [[User:Stepan|Stefan Reinauer]]
+
* [[User:MJones|Marc Jones]]
+
  
== Payload infrastructure ==
 
  
Incorporate payload building into the coreboot build. kconfig options could be added for supported payloads, those payload could be updated to build with kconfig as well. Payloads that build with libpayload need would need default configs. Payloads should also be built with the crossgcc tools. This is related to the libpayload and board config infrastructure above. ---[[User:MJones|MJones]]
+
:Please provide an overview of your project and a break down your project in small specific goals. Explain what risks or potential problems your project might experience. What would you expect as a minimum level of success? Do you have a stretch goal? 
  
=== Links ===
 
* ?
 
  
=== Mentors ===
+
Feel free to keep your application short. A 15 page essay is no better than a 2 page summary. If you wish to write 15 pages, you are of course welcome to do so, and we will gladly put your paper up on the web page. But it is not required for the application.
* ?
+
 
 +
== How to apply ==
 +
 
 +
The Drupal project has a great page on [http://drupal.org/node/59037 How to write an SOC application].
 +
 
 +
Please also read Google's [http://code.google.com/p/google-summer-of-code/wiki/AdviceforStudents Advice for Students].
 +
 
 +
== Some Caveats ==
 +
 
 +
* Google Summer-of-Code projects are a full (day-) time job. This means we expect roughly 30-40 hours per week on your project, during the three months of coding. Obviously we have flexibility, but if your schedule (exams, courses) does not give you this amount of spare time, then maybe you should not apply.
 +
* Getting paid by Google requires that you meet certain milestones. First, you must be in good standing with the community before the official start of the program. We suggest you post some design emails to the mailing list, and get feedback on them, both before applying, and during the "community bonding period" between acceptance and official start. Also, you must have made progress and committed significant code before the mid-term point.
 +
* We require accepted students to have a blog, where you will write about your project on a regular basis. This is so that the community at large can be involved and help you. SoC is not a private contract between your mentor and you. http://blogs.coreboot.org/
 +
 
 +
Note that "regular basis" in the last item does _not_ mean "3 days before evaluation deadlines". You should be "around" all the time (reporting your feedback, sending in partial successes).
 +
We don't expect our students to be experts in our problem domain, but we don't want you to fail because some basic misunderstanding was in your way of completing the task.
 +
 
 +
== Time Frame ==
 +
 
 +
'''DEADLINE FOR STUDENT APPLICATIONS:''' Students who are interested in working on a coreboot-related GSoC project must apply between '''March 28, 2011''' and '''April 8, 2011'''! If you want to apply, please get in contact with us right away, not just when you send your application!
 +
 
 +
== Student requirements ==
 +
 
 +
We will only accept your proposal if you have demonstrated that you can work with our codebase. For that, you have to send a patch to the list which is acceptable. Just ask for simple tasks on the mailing list or on IRC.
 +
 
 +
= Contact =
 +
 
 +
If you are interested in becoming a GSoC student, please contact [mailto:marcj303@gmail.com Marc Jones].
 +
 
 +
There is also an IRC channel on irc.freenode.net: #coreboot
 +
 
 +
= Possible ideas =
 +
The following are some ideas that have come up in the community. Some are more or less suitable for GSoC and prospective students' application should expand on some ideas and pair back others.
  
 
== flashrom ==
 
== flashrom ==
Line 80: Line 97:
  
 
=== Multiple GUIs for flashrom ===
 
=== Multiple GUIs for flashrom ===
 
 
* flashrom text mode GUI (for command line and flashrom-as-payload)
 
* flashrom text mode GUI (for command line and flashrom-as-payload)
 
* flashrom graphics mode GUI (should be cross-platform, Sean Nelson has preliminary code you can base this on)
 
* flashrom graphics mode GUI (should be cross-platform, Sean Nelson has preliminary code you can base this on)
  
 
=== Recovery of dead boards and onboard flash updates ===
 
=== Recovery of dead boards and onboard flash updates ===
 
 
* flashrom as payload
 
* flashrom as payload
 
* flashrom remote flashing for coreboot panic room mode
 
* flashrom remote flashing for coreboot panic room mode
Line 91: Line 106:
  
 
=== SPI bitbanging hardware support ===
 
=== SPI bitbanging hardware support ===
 
 
* flashrom support for Nvidia SPI chipset hardware
 
* flashrom support for Nvidia SPI chipset hardware
 
* flashrom support for RayeR SPIPGM hardware
 
* flashrom support for RayeR SPIPGM hardware
Line 101: Line 115:
  
 
=== Generic flashrom infrastructure improvements ===
 
=== Generic flashrom infrastructure improvements ===
 
 
* flashrom support for automatic recovery in case something goes wrong
 
* flashrom support for automatic recovery in case something goes wrong
 
* flashrom support for partial reflashing
 
* flashrom support for partial reflashing
 
* flashrom support for bytewise flashing (similar to the point above)
 
* flashrom support for bytewise flashing (similar to the point above)
  
= Why work for coreboot =
 
 
Why would you like to work for coreboot?
 
 
* coreboot offers you the opportunity to work with modern technology "right on the iron".
 
* Your application will be available to users worldwide and promoted along with all other coreboot projects.
 
* We are a very passionate team - so you will interact directly with the project initiators and project leaders.
 
* We have a large, helpful community. Over 100 experts in hardware and firmware lurk on our mailing list, many of them waiting to help you.
 
 
 
= Summer of Code Application =
 
 
Please complete the standard [http://code.google.com/soc/ Google SoC 2010 application]. Additionally, please provide information on the following:
 
 
# Who are you? What are you studying?
 
# Why are you the right person for this task?
 
# Do you have any other commitments that we should know about?
 
# List your C, Assembler and hardware experience.
 
# List your history with open source projects.
 
# What is your preferred method of contact? (Phone, email, Skype, etc)
 
 
Feel free to keep your application short. A 15 page essay is no better than a 2 page summary. If you wish to write 15 pages, you are of course welcome to do so, and we will gladly put your paper up on the web page. But it is not required for the application.
 
 
== How to apply ==
 
 
The Drupal project has a great page on [http://drupal.org/node/59037 How to write an SOC application].
 
 
Please also read Google's [http://code.google.com/p/google-summer-of-code/wiki/AdviceforStudents Advice for Students].
 
 
== Some Caveats ==
 
 
* Google Summer-of-Code projects are a full (day-) time job. This means we expect roughly 30-40 hours per week on your project, during the three months of coding. Obviously we have flexibility, but if your schedule (exams, courses) does not give you this amount of spare time, then maybe you should not apply.
 
* Getting paid by Google requires that you meet certain milestones. First, you must be in good standing with the community before the official start of the program. We suggest you post some design emails to the mailing list, and get feedback on them, both before applying, and during the "community bonding period" between acceptance and official start. Also, you must have made progress and committed significant code before the mid-term point.
 
* We are thinking of requiring accepted students to have a blog, where you will write about your project on a regular basis. This is so that the community at large can be involved and help you. SoC is not a private contract between your mentor and you.
 
 
Note that "regular basis" in the last item does _not_ mean "3 days before evaluation deadlines". You should be "around" all the time (reporting your feedback, sending in partial successes).
 
We don't expect our students to be experts in our problem domain, but we don't want you to fail because some basic misunderstanding was in your way of completing the task.
 
 
== Time Frame ==
 
 
'''DEADLINE FOR STUDENT APPLICATIONS:''' Students who are interested in working on a coreboot-related GSoC project must apply between '''March 29, 2010''' and '''April 9, 2010'''! If you want to apply, please get in contact with us right away, not just when you send your application!
 
 
== Student requirements ==
 
 
We will only accept your proposal if you have demonstrated that you can work with our codebase. For that, you have to send a patch to the list which is acceptable. Just ask for simple tasks on the mailing list or on IRC.
 
 
= Contact =
 
 
If you are interested in becoming a GSoC student, please contact [mailto:stepan@coresystems.de Stefan Reinauer].
 
 
There is also an IRC channel on irc.freenode.net: #coreboot
 
 
= Possible ideas =
 
  
 
== Infrastructure for automatic code checking ==
 
== Infrastructure for automatic code checking ==
 
 
We already have a build bot that builds various configurations of coreboot. It would be nice to extend it with various code validation routines, for example:
 
We already have a build bot that builds various configurations of coreboot. It would be nice to extend it with various code validation routines, for example:
 
* Validate that there's no regression in doxygen documentation (eg. are all arguments to functions still explained in @param tags, eg. after new arguments were added?)
 
* Validate that there's no regression in doxygen documentation (eg. are all arguments to functions still explained in @param tags, eg. after new arguments were added?)
Line 174: Line 133:
  
 
=== Mentors ===
 
=== Mentors ===
* [[User:MJones|Marc Jones]]
 
 
* [[User:Stepan|Stefan Reinauer]]
 
* [[User:Stepan|Stefan Reinauer]]
  
 +
== coreboot ports for Family14 mainboards ==
 +
Identify potential mainboards to port based on the recently released AMD Family 14 support. The goal would be to support publicly available plaftorms with a number of payloads and operating systems.
 +
 +
=== Mentor ===
 +
*
 +
 +
== coreboot ACPI/S3/power managment ==
 +
coreboot has support for ACPI tables and S3 support for some platforms, but it is very mainboard specific. Create a generic solution for ACPI table generation and S3 support.
 +
 +
=== Mentor ===
 +
*
 +
 +
 +
== coreboot test suite ==
 +
Create a test suite to gather and report coreboot mainboard and payload settings. This project may leverage libpayload, coreinfo, memtest86, BITS, and other tools. The goal is to help coreboot developers identify problems and to test coreboot features.
 +
 +
=== Links ===
 +
* [http://biosbits.org/ BITS]
 +
 +
=== Mentor ===
 +
*
  
 
==coreboot port to Marvell ARM SOC's with PCIe==
 
==coreboot port to Marvell ARM SOC's with PCIe==
Line 188: Line 167:
 
* [[User:Rminnich|Ron Minnich]]
 
* [[User:Rminnich|Ron Minnich]]
  
== coreboot port to AMD 800 series chipsets ==
 
(probably too big of a task)
 
:I'm not sure that this is too of a big task. I think 800 is closely related to 780 and would be slightly harder than a 780 board port. ---[[User:MJones|MJones]]
 
 
=== Mentors ===
 
* [[User:Stepan|Stefan Reinauer]]
 
* [[User:MJones|Marc Jones]]
 
 
== coreboot mass-porting to AMD 780 series mainboards ==
 
 
Grab a couple of AMD 780 based mainboards and port coreboot to it.
 
 
=== Mentors ===
 
* [[User:Rminnich|Ron Minnich]]
 
* [[User:Stepan|Stefan Reinauer]]
 
* [[User:MJones|Marc Jones]]
 
  
 
== coreboot panic room ==
 
== coreboot panic room ==
Line 233: Line 196:
 
* [[User:Stepan|Stefan Reinauer]]
 
* [[User:Stepan|Stefan Reinauer]]
  
== coreboot GeodeLX port from v3 to v4 ==
 
 
significant parts of that are already done, so it's hard to fill a full GSoC with that. One thing could be "verify that everything is brought over", but that's nothing that can be reasonably proven (and it might also be too close to "documentation tasks", which are not allowed)
 
 
=== Links ===
 
* ?
 
 
=== Mentors ===
 
* ?
 
  
 
== Board config infrastructure ==
 
== Board config infrastructure ==
Line 286: Line 240:
 
= Previous Summer of Code projects =
 
= Previous Summer of Code projects =
  
We successfully participated in Google's Summer of Code in 2007, 2008 and 2009. See our [[Previous GSoC Projects|list of previous GSoC projects]].
+
We successfully participated in Google's Summer of Code in 2007, 2008, 2009, and 2010. See our [[Previous GSoC Projects|list of previous GSoC projects]].

Revision as of 21:16, 14 March 2011

Google Summer of Code 2011

2010_NoURL_300x267px.jpg

Welcome to the [www.google-melange.com/ Google Summer of Code(tm)] page of the coreboot project. Apply for a coreboot GSoC project at http://socghop.appspot.com/.

This year, coreboot also tries to host some flashrom projects.

Deadlines

Make sure you check thehttps://socghop.appspot.com/document/show/gsoc_program/google/gsoc2011/timeline


Why work for coreboot

Why would you like to work for coreboot?

  • coreboot offers you the opportunity to work with modern technology "right on the iron".
  • Your application will be available to users worldwide and promoted along with all other coreboot projects.
  • We are a very passionate team - so you will interact directly with the project initiators and project leaders.
  • We have a large, helpful community. Over 100 experts in hardware and firmware lurk on our mailing list, many of them waiting to help you.


Summer of Code Application

Please complete the standard Google SoC 2011 application. Prospective corebot GSoC student should provide the following information as part of their application.

Name:
Email:
IM/IRC/Skype/other contact:
Country/Timezone:
School:
Degree Program:
Year:
Most students have some time off planned during GSoC. Do you have any vacations? When and how long?


coreboot welcomes students from all backgrounds and levels of experience. To be seriously consider for coreboot GSoC, we recommend joining the mailing list and IRC channel. Introduce yourself and mention that you are a prospective GSoC student. Ask questions and discuss the project that you are considering. Community involvement is a key component of coreboot development. By the time you have submitted your application, you should have downloaded, built a and booted coreboot in QEMU, SimNow, or on real hardware. Please, email your serial output results to the mailing list.
The following information will help coreboot match students with mentors and projects.
Please comment on your software and firmware experience.
Have you participated in the coreboot community before?
Have you contributed to an open source project? Which one? What was your experience?
Have you built and run coreboot? Did you have problems?
Bonus, Did you find and fix a coreboot bug? Did you send a patch to the email list?


Please provide an overview of your project and a break down your project in small specific goals. Explain what risks or potential problems your project might experience. What would you expect as a minimum level of success? Do you have a stretch goal?


Feel free to keep your application short. A 15 page essay is no better than a 2 page summary. If you wish to write 15 pages, you are of course welcome to do so, and we will gladly put your paper up on the web page. But it is not required for the application.

How to apply

The Drupal project has a great page on How to write an SOC application.

Please also read Google's Advice for Students.

Some Caveats

  • Google Summer-of-Code projects are a full (day-) time job. This means we expect roughly 30-40 hours per week on your project, during the three months of coding. Obviously we have flexibility, but if your schedule (exams, courses) does not give you this amount of spare time, then maybe you should not apply.
  • Getting paid by Google requires that you meet certain milestones. First, you must be in good standing with the community before the official start of the program. We suggest you post some design emails to the mailing list, and get feedback on them, both before applying, and during the "community bonding period" between acceptance and official start. Also, you must have made progress and committed significant code before the mid-term point.
  • We require accepted students to have a blog, where you will write about your project on a regular basis. This is so that the community at large can be involved and help you. SoC is not a private contract between your mentor and you. http://blogs.coreboot.org/

Note that "regular basis" in the last item does _not_ mean "3 days before evaluation deadlines". You should be "around" all the time (reporting your feedback, sending in partial successes). We don't expect our students to be experts in our problem domain, but we don't want you to fail because some basic misunderstanding was in your way of completing the task.

Time Frame

DEADLINE FOR STUDENT APPLICATIONS: Students who are interested in working on a coreboot-related GSoC project must apply between March 28, 2011 and April 8, 2011! If you want to apply, please get in contact with us right away, not just when you send your application!

Student requirements

We will only accept your proposal if you have demonstrated that you can work with our codebase. For that, you have to send a patch to the list which is acceptable. Just ask for simple tasks on the mailing list or on IRC.

Contact

If you are interested in becoming a GSoC student, please contact Marc Jones.

There is also an IRC channel on irc.freenode.net: #coreboot

Possible ideas

The following are some ideas that have come up in the community. Some are more or less suitable for GSoC and prospective students' application should expand on some ideas and pair back others.

flashrom

Note: The list below is an idea collection. Individual list items are simple enough to serve only as partial GSoC task, but they are grouped to reasonable tasks. If you're interested, please talk to us on the flashrom mailing list and/or on IRC irc://irc.freenode.net/#flashrom

http://www.flashrom.org/GSoC/2010 has more flashrom ideas and suggestions.

Multiple GUIs for flashrom

  • flashrom text mode GUI (for command line and flashrom-as-payload)
  • flashrom graphics mode GUI (should be cross-platform, Sean Nelson has preliminary code you can base this on)

Recovery of dead boards and onboard flash updates

  • flashrom as payload
  • flashrom remote flashing for coreboot panic room mode
  • flashrom remote flashing with modified SerialICE

SPI bitbanging hardware support

  • flashrom support for Nvidia SPI chipset hardware
  • flashrom support for RayeR SPIPGM hardware
  • flashrom support for Paraflasher hardware
  • flashrom support for Willem hardware
  • flashrom support for some-yet-uninvented cheap universal LPC/FWH/SPI flasher hardware
  • flashrom support for bitbanging LPC/FWH (code exists, Uwe Hermann
  • flashrom support for bitbanging Parallel

Generic flashrom infrastructure improvements

  • flashrom support for automatic recovery in case something goes wrong
  • flashrom support for partial reflashing
  • flashrom support for bytewise flashing (similar to the point above)


Infrastructure for automatic code checking

We already have a build bot that builds various configurations of coreboot. It would be nice to extend it with various code validation routines, for example:

  • Validate that there's no regression in doxygen documentation (eg. are all arguments to functions still explained in @param tags, eg. after new arguments were added?)
  • Make code lint clean (and maybe extend lint to not fall into our traps), and run lint over the tree. Report regressions
  • Use LLVM's static code checking facilities, report regressions.
  • Work on code coverage support for coreboot code (dump data into ram, or via serial. Provide tools to fetch it). Analyse that data.

Links

Mentors

coreboot ports for Family14 mainboards

Identify potential mainboards to port based on the recently released AMD Family 14 support. The goal would be to support publicly available plaftorms with a number of payloads and operating systems.

Mentor

coreboot ACPI/S3/power managment

coreboot has support for ACPI tables and S3 support for some platforms, but it is very mainboard specific. Create a generic solution for ACPI table generation and S3 support.

Mentor


coreboot test suite

Create a test suite to gather and report coreboot mainboard and payload settings. This project may leverage libpayload, coreinfo, memtest86, BITS, and other tools. The goal is to help coreboot developers identify problems and to test coreboot features.

Links

Mentor

coreboot port to Marvell ARM SOC's with PCIe

Marvell Processors These ARM SOC's with PCIe will become popular in netbooks later this year. These systems can take advantage of coreboot's strength in properly configuring PCI devices, fast boot time and payload support.

Note that coreboot has in the past supported three different CPUs (x86, Alpha, PPC), so the structure is there for adding in a new processor family. We will need to find the right platform to do the work, but I (Ron) can provide a board and JTAG debugger if needed.

Mentors


coreboot panic room

Create a safe boot solution for coreboot to easily and cheaply recover the system in case of a panic().

Ron would like to base this solution around SerialICE. The basic idea is that the system always boots to SerialICE. There is a test in CMOS for 'last boot worked' and, if this is set, SerialICE finds a coreboot in cbfs and runs it. If 'last boot worked' is not set, or the user hits some magic keyboard sequence, SerialICE takes control.

SerialICE needs to be extended (not much) to make this work. Having this capability would make it possible for Ron to get some very hard ports working that are just not possible today. At the same time, there are lots of hardware boards to test this idea on, so it should be easy to get it working.

It might be possible to integrate this into the coreboot build as a bootblock option (in the same spot as the fallback/normal switch and the simple loader).

Mentors

coreboot cheap testing rig

The goal of this project is to create a cheap testing rig which works with the existing board test infrastructure. We have a hardware test system since 2006:

The initial version of our testing rig used a remote power switch and was rather expensive. With cheaper technologies such as X10, it's possible to drop the testing costs per board significantly.

Links

Mentors


Board config infrastructure

Design data structures that host information about the board layout so coreboot can better initialize components and generate all kinds of tables (mptable, pirq, acpi, ...) from that dynamically (at build or runtime, as appropriate). Adapt boards to use that instead of the current hardcodes.

Links

  •  ?

Mentors

  •  ?

Refactor AMD code

AMD K8 and AMD Fam10 are different enough to have their own code. This is unfortunate, as you have to decide which CPU type you use in a given mainboard. Refactor AMD code so a single image can support both chip types on a given board. Also move tables from get_bus_conf and the like to the device tree or kconfig options (or runtime detection), as appropriate.

Links

  •  ?

Mentors


Laptop support

This one is really HARD. If you're lucky and if you have datasheets, you can do it in maybe 1 month. If you're unlucky, it can take the whole GSoC or more. If there is interest, we'll try to find an embedded controller which won't cause you to give up in frustration. Still, it might be beneficial if you're willing to solder.

  • flashrom support for embedded controllers (ECs) in laptops


Links

Mentors

  •  ?

Your own Project Ideas

We have come up with some ideas for cool Summer of Code projects here. These are projects that we think can be managed in the short period of GSoC, and they cover areas where coreboot is trying to reach new users and new use cases.

But of course your application does not need to be based on any of the ideas listed below. The opposite: Maybe you have a great idea that we just didn't think of yet. Please let us know!

Feel free to contact us at the email address above, and don't hesitate to suggest whatever you have in mind.

Previous Summer of Code projects

We successfully participated in Google's Summer of Code in 2007, 2008, 2009, and 2010. See our list of previous GSoC projects.