IEI LX 800 - Revision history

Stepan: /* Building coreboot */

2010-05-05T08:12:36Z

‎Building coreboot

Uwe: IEI LX 800 Build Tutorial moved to IEI LX 800

2008-11-16T15:02:53Z

IEI LX 800 Build Tutorial moved to IEI LX 800

Nikola: /* Building FILO */

2008-04-29T07:50:42Z

‎Building FILO

Uwe at 01:25, 25 April 2008

2008-04-25T01:25:09Z

Uwe: /* Building coreboot */

2008-03-13T11:31:22Z

‎Building coreboot

Uwe at 11:30, 13 March 2008

2008-03-13T11:30:50Z

Nikola at 06:35, 13 March 2008

2008-03-13T06:35:43Z

Nikola at 05:46, 13 March 2008

2008-03-13T05:46:49Z

Nikola at 05:45, 13 March 2008

2008-03-13T05:45:21Z

Nikola at 12:43, 12 March 2008

2008-03-12T12:43:14Z

@@ Line 138: / Line 138: @@
 == Building coreboot ==
-For booting from 2 MB flash memory device uncomment the following lines to your '''Config.lb''':
+See the [[Build HOWTO]] for information on how to build coreboot for this board.
-−
- option ROM_SIZE = (2048 * 1024) - (36 * 1024) - (1216 * 1024) - (690 * 1024)
-−
-Then:
-−
- $ cd targets
- $ ./buildtarget iei/pcisa-lx-800-r10
- $ cd iei/pcisa-lx-800-r10/pcisa-lx-800-r10
- $ LANG=C make
-−
-The '''LANG=C''' is only for those users that uses a localised system.
 == Comparing boot time ==

@@ Line 115: / Line 115: @@
   USE_GRUB = 0
-  AUTOBOOT_FILE = "hdb1:/boot/bzImage initrd=hdb1:/boot/initrd.gz syscrtc=/dev/hdb1 clocksource=pit ide-delay=2 hda=none ide1=noprobe console=tty0 quiet"
+  AUTOBOOT_FILE = "hdb1:/boot/bzImage initrd=hdb1:/boot/initrd.gz clocksource=pit ide-delay=2 console=tty0 quiet"
   AUTOBOOT_DELAY = 0
   IDE_DISK = 1
@@ Line 128: / Line 128: @@
   USE_GRUB = 0
-  AUTOBOOT_FILE = "mem@0xffe00000,0x130000 initrd=mem@0xfff30000,0xac800 syscrtc=/dev/hdb1 clocksource=pit ide-delay=2 hda=none ide1=noprobe console=tty0 quiet"
+  AUTOBOOT_FILE = "mem@0xffe00000,0x130000 initrd=mem@0xfff30000,0xac800 clocksource=pit ide-delay=2 console=tty0 quiet"
   AUTOBOOT_DELAY = 0
   SERIAL_CONSOLE = 1

← Older revision		Revision as of 01:25, 25 April 2008
Line 1:		Line 1:
		+	This page describes how to use the '''[http://www.ieiworld.com/en/product_IPC.asp?model=PCISA-LX IEI PCISA-LX-800-R10]''' mainboard with coreboot.
		+
	== Status ==		== Status ==

← Older revision		Revision as of 11:31, 13 March 2008
Line 139:		Line 139:

	option ROM_SIZE = (2048 * 1024) - (36 * 1024) - (1216 * 1024) - (690 * 1024)		option ROM_SIZE = (2048 * 1024) - (36 * 1024) - (1216 * 1024) - (690 * 1024)
		+
		+	Then:

	$ cd targets		$ cd targets

@@ Line 63: / Line 63: @@
 |IR_status = N/A
 |Speaker_status = OK
-|Speaker_comments = Need a patch [http://www.coreboot.org/pipermail/coreboot/2008-March/031983.html].
+|Speaker_comments = Needs a [http://www.coreboot.org/pipermail/coreboot/2008-March/031983.html patch].
 |DiskOnChip_status = N/A
@@ Line 84: / Line 84: @@
 |WakeOnMouse_status = N/A
 |Flashrom_status = OK
-|Flashrom_comments = Works fine, both with coreboot and with the proprietary BIOS. Need a patch [http://www.coreboot.org/pipermail/coreboot/2008-March/031982.html].
+|Flashrom_comments = Works fine, both with coreboot and with the proprietary BIOS. Needs a [http://www.coreboot.org/pipermail/coreboot/2008-March/031982.html patch].
 }}
@@ Line 133: / Line 133: @@
   LINUX_LOADER = 1
   # MULTIBOOT_IMAGE = 1
 == Building coreboot ==
-For booting from 2MB flash memory device. Uncomments the following lines to your Config.lb:
+For booting from 2 MB flash memory device uncomment the following lines to your '''Config.lb''':
 option ROM_SIZE=2048*1024-36*1024-1216*1024-690*1024
   $ cd targets
@@ Line 179: / Line 179: @@
 |}
 == Required patches ==
-* This [http://www.coreboot.org/pipermail/coreboot/2008-March/031983.html] is needed to enable speaker.
+* This [http://www.coreboot.org/pipermail/coreboot/2008-March/031983.html patch] is needed to enable the PC speaker.
-* This [http://www.coreboot.org/pipermail/coreboot/2008-March/031982.html] is needed to enable write and erasing PM49fl004
+* This [http://www.coreboot.org/pipermail/coreboot/2008-March/031982.html patch] is needed to allow writing and erasing PM49FL004.
 {{Cc-by-2.5}}

@@ Line 158: / Line 158: @@
 |- bgcolor="#eeeeee"
 | Coreboot (bzImage+initrd on 2MB flash)
-| ?
+| 2
-| ?
+| 2
-| ?
+| 2
-| ?
+| 6
 |}
 {{Cc-by-2.5}}