JTAG/BSDL Guide - Revision history

Stepan at 13:04, 15 January 2008

2008-01-15T13:04:31Z

Uwe: Fix wiki syntax. Fix typos.

2006-10-06T16:25:10Z

Fix wiki syntax. Fix typos.

Stepan: /* ''External JTAG Links'' */ add a link to another opensource jtag site

2006-07-07T18:00:40Z

‎''External JTAG Links'': add a link to another opensource jtag site

Stepan: /* ''How can I connect to a JTAG port from Linux?'' */

2006-03-14T00:57:09Z

‎''How can I connect to a JTAG port from Linux?''

Stepan: /* ''Introduction'' */

2006-03-14T00:56:05Z

‎''Introduction''

Jcarr: /* ''A sample session'' */

2005-08-16T00:06:56Z

‎''A sample session''

Jcarr: add a sample JTAG session

2005-08-16T00:06:03Z

add a sample JTAG session

Jcarr: just more verbage

2005-08-14T05:58:16Z

just more verbage

Jcarr at 01:11, 29 July 2005

2005-07-29T01:11:58Z

Jcarr: A page about JTAG

2005-07-28T23:59:03Z

A page about JTAG

@@ Line 16: / Line 16: @@
 === Why JTAG? ===
-If you are designing a new hardware and you are interested in supporting LinuxBIOS, you should make a JTAG port available and select chips which allow programming via JTAG. While this is not yet possible for higher end x86 chips, it is often possible for embedded designs.
+If you are designing a new hardware and you are interested in supporting coreboot, you should make a JTAG port available and select chips which allow programming via JTAG. While this is not yet possible for higher end x86 chips, it is often possible for embedded designs.
 === How can I connect to a JTAG port from Linux? ===

@@ Line 1: / Line 1: @@
-= ''Introduction'' =
+== What is JTAG? ==
-JTAG ports are still very uncommon on x86 hardware. However, most hardware designs are moving in that direction so future x86 chips will probably also have JTAG ports. AMD's Geode GX2 systems are an example of x86 systems with JTAG support.
+[http://en.wikipedia.org/wiki/Jtag JTAG] is an IEEE standard that has been adopted to provide a consistant way of programming and debugging chips. JTAG is supported by a large number of chips and manufacturers. They include:
-−
-= ''What is JTAG?'' =
-−
-JTAG is an IEEE standard that has been adopted to provide a consistant way of programming and debugging chips. JTAG is supported by by a large number of chips and manufacturers. They include:
 * Many embedded PowerPC chips
@@ Line 12: / Line 8: @@
 * Most FPGA's
-Using chips that support JTAG decreases software development time and decreases the costs of doing development. Chips that do not have JTAG support usually require expensive hardware to configure and debug them. (thousands to tens of thousands of dollars). This is prohibitive to most Linux developers.
+Using chips that support JTAG decreases software development time and decreases the costs of doing development. Chips that do not have JTAG support usually require expensive hardware to configure and debug them (thousands to tens of thousands of dollars). This is prohibitive to most Linux developers.
-= ''Why JTAG?'' =
+=== Why JTAG? ===
 If you are designing a new hardware and you are interested in supporting LinuxBIOS, you should make a JTAG port available and select chips which allow programming via JTAG. While this is not yet possible for higher end x86 chips, it is often possible for embedded designs.
-= ''How can I connect to a JTAG port from Linux?'' =
+=== How can I connect to a JTAG port from Linux? ===
 For less than $20 you can buy a parallel to JTAG cable and be on your way. Once you have an adapter, you can use the jtag program that is part of the [http://openwince.sourceforge.net/ openwince sourceforge project].
-= ''I have the cable, now I can't talk to my chip.'' =
+=== I have the cable, now I can't talk to my chip ===
 The jtag program is still under development; lots of chips are not supported yet. Don't worry, you can add support for it. You need to find the corresponding BSDL file for the chip. Chip manufacturers provide BSDL files on their websites.
-= ''OK, I can see my chip over JTAG. Now what?'' =
+=== OK, I can see my chip over JTAG. Now what? ===
 That depends on the chip. Some chips will let you program them, some CPU's will let you single step instructions and do debugging. It depends on the chip and the manufacturer. CPU's that support single stepping make BIOS development particularly easy.
-= ''Darn, my board doesn't have a JTAG port!'' =
+=== Darn, my board doesn't have a JTAG port! ===
-= ''Darn, my chips don't work with JTAG!'' =
+=== Darn, my chips don't work with JTAG! ===
 Well, that's what being a smart consumer is about :) In general, don't buy hardware that isn't Linux friendly.
-= ''A sample session'' =
+== A sample session ==
 Here is a sample session using the GPL'd jtag tool from within a bash shell when scanning the JTAG bus that has a Xilinx Spartan-3 FPGA & and Xilinx CPLD on it.
@@ Line 60: / Line 60: @@
    jtag>
-= ''External JTAG Links'' =
+== External JTAG Links ==
 * [http://www.intel.com/design/flcomp/applnots/29218602.PDF Intel's JTAG Guide]
@@ Line 66: / Line 66: @@
 * [http://www.jtag.com/main.php jtag.com]
 * [http://openwince.sourceforge.net/jtag/ Jtag tools for Linux]
-* [http://packages.debian.org/testing/embedded/openwince-jtag JTAG tools packaged for debian]
+* [http://packages.debian.org/testing/embedded/openwince-jtag JTAG tools packaged for Debian]
 * [http://www.arium.com/products/ecm50ice.html Arium ECM-50 (Intel JTAG/ITL hardware debugger)]
 * [http://wiki.openwrt.org/OpenWrtDocs/Customizing/Hardware/JTAG_Cable Different JTAG cables and software]

← Older revision		Revision as of 18:00, 7 July 2006
Line 68:		Line 68:
	* [http://packages.debian.org/testing/embedded/openwince-jtag JTAG tools packaged for debian]		* [http://packages.debian.org/testing/embedded/openwince-jtag JTAG tools packaged for debian]
	* [http://www.arium.com/products/ecm50ice.html Arium ECM-50 (Intel JTAG/ITL hardware debugger)]		* [http://www.arium.com/products/ecm50ice.html Arium ECM-50 (Intel JTAG/ITL hardware debugger)]
		+	* [http://wiki.openwrt.org/OpenWrtDocs/Customizing/Hardware/JTAG_Cable Different JTAG cables and software]

@@ Line 20: / Line 20: @@
 = ''How can I connect to a JTAG port from Linux?'' =
-For less than $20 you can buy a parallel to JTAG cable and be on your way. Once you have an adapter, you can use the jtag program that is part of the openwince sourceforge project.
+For less than $20 you can buy a parallel to JTAG cable and be on your way. Once you have an adapter, you can use the jtag program that is part of the [http://openwince.sourceforge.net/ openwince sourceforge project].
 = ''I have the cable, now I can't talk to my chip.'' =

@@ Line 1: / Line 1: @@
 = ''Introduction'' =
-JTAG ports are still very uncommon on x86 hardware. However, most hardware designs are moving in that direction so future x86 chips will probably also have JTAG ports.
+JTAG ports are still very uncommon on x86 hardware. However, most hardware designs are moving in that direction so future x86 chips will probably also have JTAG ports. AMD's Geode GX2 systems are an example of x86 systems with JTAG support.
 = ''What is JTAG?'' =

@@ Line 39: / Line 39: @@
 Here is a sample session using the GPL'd jtag tool from within a bash shell when scanning the JTAG bus that has a Xilinx Spartan-3 FPGA & and Xilinx CPLD on it.
-jtag> cable parallel 0x378 DLC5
+  jtag> cable parallel 0x378 DLC5
-Initializing Xilinx DLC5 JTAG Parallel Cable III on parallel port at 0x378
+  Initializing Xilinx DLC5 JTAG Parallel Cable III on parallel port at 0x378
-jtag> detect
+  jtag> detect
-IR length: 14
+  IR length: 14
-Chain length: 2
+  Chain length: 2
-Device Id: 00000101000001000110000010010011
+  Device Id: 00000101000001000110000010010011
-  Manufacturer: Xilinx
+    Manufacturer: Xilinx
-  Unknown part!
+    Unknown part!
-Device Id: 00010001010000101000000010010011
+  Device Id: 00010001010000101000000010010011
-  Manufacturer: Xilinx
+    Manufacturer: Xilinx
-  Part:         xc3s1000_ft256
+    Part:         xc3s1000_ft256
-  Stepping:     0
+    Stepping:     0
-  Filename:     /usr/share/jtag/xilinx/xc3s1000_ft256/xc3s1000_ft256
+    Filename:     /usr/share/jtag/xilinx/xc3s1000_ft256/xc3s1000_ft256
-chain.c(110) Part 0 without active instruction
+  chain.c(110) Part 0 without active instruction
-chain.c(133) Part 0 without active instruction
+  chain.c(133) Part 0 without active instruction
-chain.c(110) Part 0 without active instruction
+  chain.c(110) Part 0 without active instruction
-jtag> instruction SAMPLE/PRELOAD
+  jtag> instruction SAMPLE/PRELOAD
-jtag> shift ir
+  jtag> shift ir
-chain.c(110) Part 0 without active instruction
+  chain.c(110) Part 0 without active instruction
-jtag>
+  jtag>
-−
 = ''External JTAG Links'' =

← Older revision		Revision as of 00:06, 16 August 2005
Line 34:		Line 34:

	Well, that's what being a smart consumer is about :) In general, don't buy hardware that isn't Linux friendly.		Well, that's what being a smart consumer is about :) In general, don't buy hardware that isn't Linux friendly.
		+
		+	= ''A sample session'' =
		+
		+	Here is a sample session using the GPL'd jtag tool from within a bash shell when scanning the JTAG bus that has a Xilinx Spartan-3 FPGA & and Xilinx CPLD on it.
		+
		+	jtag> cable parallel 0x378 DLC5
		+	Initializing Xilinx DLC5 JTAG Parallel Cable III on parallel port at 0x378
		+	jtag> detect
		+	IR length: 14
		+	Chain length: 2
		+	Device Id: 00000101000001000110000010010011
		+	Manufacturer: Xilinx
		+	Unknown part!
		+	Device Id: 00010001010000101000000010010011
		+	Manufacturer: Xilinx
		+	Part: xc3s1000_ft256
		+	Stepping: 0
		+	Filename: /usr/share/jtag/xilinx/xc3s1000_ft256/xc3s1000_ft256
		+	chain.c(110) Part 0 without active instruction
		+	chain.c(133) Part 0 without active instruction
		+	chain.c(110) Part 0 without active instruction
		+	jtag> instruction SAMPLE/PRELOAD
		+	jtag> shift ir
		+	chain.c(110) Part 0 without active instruction
		+	jtag>
		+

	= ''External JTAG Links'' =		= ''External JTAG Links'' =

← Older revision		Revision as of 01:11, 29 July 2005
Line 15:		Line 15:
	* [http://openwince.sourceforge.net/jtag/ Jtag tools for Linux]		* [http://openwince.sourceforge.net/jtag/ Jtag tools for Linux]
	* [http://packages.debian.org/testing/embedded/openwince-jtag JTAG tools packaged for debian]		* [http://packages.debian.org/testing/embedded/openwince-jtag JTAG tools packaged for debian]
		+	* [http://www.arium.com/products/ecm50ice.html Arium ECM-50 (Intel JTAG/ITL hardware debugger)]

← Older revision		Revision as of 23:59, 28 July 2005
Line 12:		Line 12:
	* [http://www.intel.com/design/flcomp/applnots/29218602.PDF Intel's JTAG Guide]		* [http://www.intel.com/design/flcomp/applnots/29218602.PDF Intel's JTAG Guide]
	* [http://ebsp.sourceforge.net/source/description.html The Experimental Boundary Scan project]		* [http://ebsp.sourceforge.net/source/description.html The Experimental Boundary Scan project]
		+	* [http://www.jtag.com/main.php jtag.com]
		+	* [http://openwince.sourceforge.net/jtag/ Jtag tools for Linux]
		+	* [http://packages.debian.org/testing/embedded/openwince-jtag JTAG tools packaged for debian]