Difference between revisions of "Board:lenovo/x60/Installation"

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== Flashing on the laptop instructions. ==
+
These Coreboot/Libreboot flashing instructions are designed for the [[Board:lenovo/x60|'''Lenovo X60''', '''X60s''', '''X60 tablet''',]] [[Board:lenovo/t60|'''T60''' and '''T60p''']].
'''Lenovo X60''', '''X60s''', '''T60''' and '''T60p''' flashing instructions.
+
  
These Lenovo laptops have a register that must be flipped before coreboot can be flashed.
+
{{Note|All ThinkPad X60 Series laptops work out of the box with Coreboot and Libreboot, no modifications necessary.}}
  
For those/some models with SPI flash chips you have also to modify flashrom. Because the chipset locks down the available commands that flashrom can send to the flash chip, you also need to change the flashrom source in a way that is not suitable to upstream.  Flash chips can be identified by various commands (REMS*, RDID etc.). Some of them reply with an ID for the vendor and the exact chip model; others just reply with a single byte which is fine if there is only a small number of chips to distinguish, but won't work for the huge number of flash chips known to flashrom. The problem with the vendor BIOS is that it forbids the higher quality identification commands, so you need to force flashrom to use the lower quality opcode for the chip in your Thinkpad. You have to know the chip model beforehand (e.g. by inspection). Known models on the x60s are SST25VF016B, MX25L1605D and maybe others.
+
{{Note|If you plan to use Libreboot with the T60 (FSF-Certified, cannot use proprietary blobs), it requires a ''ThinkPad T60 with Intel GPU and a 15" Flexview 1400x1050 SXGA+ display'' (1600x1200, 2048x1536, and 14.1" 1400x1050 panels are also known to work).
  
You will need: the flashrom source, a small patch for it, and [http://git.stuge.se/?p=bucts.git the bucts utility].
+
The libreboot project lists compatible screens at the time of writing, using changeset 5345 from review.coreboot.org: [http://libreboot.org/docs/index.html#supported_t60_list list of known-working lcd panels]
  
# Patch flashrom to use RES1 SPI identification and spi_chip_write_1 for your flash chip, as well as change the flash chip model id to fit the RES1 command. 
+
Thus, Libreboot users will have to make a custom FrankenPad; either by replacing the motherboard with an Intel board; or the screen and the inverter with an SXGA+ display, at great expense.}}
#: Alternatively, you can copy the existing definition first as it is done in [http://patchwork.coreboot.org/patch/3621/ this patch]. Choose either method: apply the patch in the link, or do the patch yourself, as per instruction below.
+
#* Find the definition of your flash chip in flashrom's flashchips.c
+
#* Change the .probe field to probe_spi_res1
+
#* Change the .model_id field to the RES1 ID given in the datasheet of the flash chip
+
#* Change the .write field to spi_chip_write_1
+
# Run <code>flashrom -p internal -r factory.bin</code>
+
#: This step is IMPORTANT since the factory BIOS in your machine is tied to your particular system board (or "planar" in IBM FRU terms) with a unique ID not present in factory BIOS updates.
+
# Run <code>dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k</code>
+
# Run <code>dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump</code>
+
#: Verify that the complete range is filled with ff bytes before proceeding! The above command must output:
+
#: <code>0000000 ffff ffff ffff ffff ffff ffff ffff ffff</code>
+
#: <code>*</code>
+
#: <code>0010000</code>
+
#: If this is not the case, the coreboot image needs to be rebuilt with the second-to-last 64kbyte block unused.
+
# Run <code>dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k conv=notrunc</code>
+
# Run <code>bucts 1</code>
+
# Run <code>flashrom -p internal -w coreboot.rom</code>
+
#: This will be slow, it will output errors for addresses 0x0 and 0x1f0000 when working with a 2 Mbyte flash chip, and it will say "FAILED!" at the end, see [http://www.flashrom.org/pipermail/flashrom/2012-April/009124.html Peter's mail] before you panic.
+
# Power cycle the machine (i.e. a cold boot, not just a reboot), now starting with coreboot
+
# Revert all changes made to flashrom (maybe backup the binary for later experiments)
+
# Run <code>flashrom -p internal -w coreboot.rom</code>.
+
#: This will successfully overwrite the entire flash chip, including the last 64k that were write protected with the factory BIOS.
+
# Run <code>bucts 0</code>
+
  
 +
{{Warning|The vast majority of ThinkPad T60/T60p laptops require [https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-T60p proprietary VGABIOS blobs] for the display to work (see the links for more information). '''Do not forget to build Coreboot with these blobs, or your machine will be BRICKED!'''
  
 +
* '''ThinkPad T60/T60p laptops with a 4:3 1024x768 XGA, or 16:10 Widescreen LCD''' [https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-T60p must extract the proprietary VGABIOS from the Lenovo BIOS, and build Coreboot with it.]
 +
** ''(Libreboot Users)'' [http://libreboot.org/docs/index.html#supported_t60_list These LCDs do not work with Libreboot.] You will have to replace them with a rare and expensive Flexview 1400x1050 SXGA+ display; which is only compatible with 15" ThinkPad T60/T60p models.
 +
* '''ThinkPad T60/T60p laptops with an ATI GPU'''  [https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-T60p must extract the proprietary VGABIOS from the Lenovo BIOS, and build Coreboot with it.]
 +
** All ThinkPad T60p and all Flexview SXGA+ T60 laptops come with an ATI GPU.
 +
** ''(Libreboot Users)'' Needless to say, [http://libreboot.org/docs/index.html#t60_ati_intel ATI T60/T60p laptops are NOT compatible with Libreboot.] You must replace the motherboard with an Intel one.}}
  
See also http://thread.gmane.org/gmane.linux.bios/69354 http://thread.gmane.org/gmane.linux.bios.flashrom/575
+
= Libreboot Flashing Procedure (Easy Method) =
  
== Recovery ==
+
{{Note|Libreboot is not officially part of the coreboot project. Do not contact coreboot for support; instead, contact the libreboot community.}}
If you had a bad flash you will need a recovery method.
+
  
If you only set bucts, then rebooted without doing any flash writes, things might be easier:
+
The [http://libreboot.org/ Libreboot distribution] distributes pre-compiled ROM images along with scripts and instructions for easy flashing. Choose between these two guides:
bucts sets a register that lives on the RTC well, ie. it is powered by the same source that keeps the clock alive. Usually that's a battery on the mainboard, and often there's some way to cut the source (by removing the battery, a jumper, or pads that can be shorted).
+
 
After doing that (for a few seconds, there might be some capacitors in the way that keep power stable), the register should be reset and the system should boot as normal.
+
* [http://libreboot.org/docs/index.html Official Libreboot Documentation] - Official documentation created by the Libreboot developers themselves.
 +
** '''Note:''' If you choose to follow the Official Libreboot Documentation, make sure to follow the Lenovo BIOS Backup procedure details below.
 +
* [https://github.com/bibanon/Coreboot-ThinkPads/wiki BASLQC Libreboot ThinkPad Guides] - Vastly streamlined unofficial Libreboot installation guide. Organized in a more straightforward fashion, and has a few tips and tricks for specific devices.
 +
** [https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-X60 ThinkPad X60 and X60 Tablet]
 +
** [https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-T60 ThinkPad T60 (Intel GPU)]
 +
** [https://github.com/bibanon/Coreboot-ThinkPads/wiki/Macbook-2-1 Macbook 2 1]
 +
** [https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-T60p ThinkPad T60/T60p (ATI GPU)] - Requires proprietary VGABIOS.
 +
 
 +
=== Back up Official Lenovo BIOS (Libreboot) ===
 +
 
 +
{{Warning|It is ''STRONGLY RECOMMENDED'' to back up the vendor BIOS; each vendor BIOS image has a unique, unrecoverable ID. Do not use another laptop's vendor BIOS image.}}
 +
 +
# Download, extract, and build the latest [http://www.libreboot.org/docs/release.html Libreboot binaries].
 +
# From the {{ic|libreboot_bin/}} directory, enter the {{ic|flashrom/}} directory. 
 +
#: {{ic|cd flashrom}}
 +
# Run ''both'' of these commands to backup the BIOS to {{ic|factory.bin}} (don't panic, nothing is being installed):
 +
#: {{ic|sudo ./flashrom_lenovobios_sst -p internal -r factory.bin}}
 +
#: {{ic|sudo ./flashrom_lenovobios_macronix -p internal -r factory.bin}}
 +
# If a {{ic|factory.bin}} file was created in the {{ic|flashrom/}} directory, the Lenovo BIOS has been backed up successfully. If not, try the commands again. Copy this dump to a safe place.
 +
# Return to the {{ic|libreboot_bin/}} directory. 
 +
#: {{ic|cd ..}}
 +
 
 +
* Source: [https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-X60#back-up-official-lenovo-bios BASLQC Libreboot ThinkPads - Backing up the Lenovo BIOS on the ThinkPad X60]
 +
 
 +
= Coreboot Flashing Procedure (Advanced) =
 +
 
 +
Below is a procedure that describes all the steps needed to flash Coreboot, in fine detail.
 +
 
 +
The Libreboot scripts have fully automated this complicated process, so these instructions have been expanded for educational purposes.
 +
 
 +
== Briefing ==
 +
 
 +
* '''Some SPI Flash chips require ''special flashrom patches''.'''
 +
** Flash chips can be identified by various commands (REMS*, RDID etc.). Some of them reply with an ID for the vendor and the exact chip model; others just reply with a single byte.
 +
** Unfortunately, the vendor BIOS forbids higher quality identification commands, so flashrom must be patched to use the lower quality opcodes.
 +
** This type of patch will never be merged upstream, so it must be applied manually.
 +
 
 +
* '''The ''BUCTS register bit'' must be flipped before flashing Coreboot.'''
 +
** [http://git.stuge.se/?p=bucts.git The bucts utility] can be used to flip the bit.
 +
** This register bit doubles as a unique safety net that allows the vendor BIOS and Coreboot to coexist.
 +
** Just unplug the CMOS battery to return to the vendor BIOS, in case Coreboot doesn't boot.
 +
 
 +
* '''The Coreboot ROM has to be specially patched to prevent it from overwriting the vendor BIOS.'''
 +
** If the vendor BIOS gets overwritten, it would defeat the purpose of the BUCTS safety net.
 +
** Just use this convenient little Bash one-liner to leave some free space at the beginning of the ROM.
 +
*: {{ic|1=dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k; dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump; dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k conv=notrunc}}
 +
 
 +
* '''It is important to figure out ''what type of flashchip'' is on the motherboard.'''.
 +
** Early Coreboot developers had to disassemble the entire laptop just to take a peek at the flashchip. A magnifying glass is needed to read the tiny text burned on top of the chip.
 +
** The Libreboot installation scripts have '''an ingenious new brute-force method''' of identifying the flashchip.
 +
** First, build two patched flashrom binaries, one for SST and one for Macronix. Then try both of the binaries until you find one that works.
 +
** Seems way too simple, but it's way better than ripping out the motherboard just to look at a chip.
 +
 
 +
== Flashrom Patch Definitions ==
 +
 
 +
: ''Source: [https://github.com/bibanon/Coreboot-ThinkPads/wiki/BIOS-Flashchip-Identification-Method#use-flashrom-to-identify-bios-chip-experimental BASQLC Libreboot ThinkPads - BIOS Flashchip Identification Method]''
 +
 
 +
Flashrom must be patched to use RES SPI identification and {{ic|spi_chip_write_1}} for your flash chip, and to set the flash chip {{ic|model_id}} to the RES opcode.
 +
 
 +
Below are the definitions that must be patched into {{ic|flashrom/flashchips.c}} :
 +
 
 +
* '''SST25VF016B'''
 +
** .probe - {{ic|probe_spi_res2}}
 +
** .model_id - {{ic|0x41}}
 +
** .write - {{ic|spi_chip_write_1}}
 +
* '''MX25l1605D'''
 +
** .probe - {{ic|probe_spi_res1}}
 +
** .model_id - {{ic|0x14}}
 +
** .write - {{ic|spi_chip_write_1}}
 +
* '''Atmel ???''' (T60 Only?)
 +
** Use -p internal:laptop=force_I_want_a_brick instead of -p internal, when running flashrom
 +
** No patches necessary. You still need to do 2 flashing rounds, with the bucts/dd trick outlined in this guide.
 +
 
 +
These definitions were painstakingly discovered from excessively long and hardly informative flashchip documentation, mailing lists, and the output of flashrom. These definitions been confirmed to work after rigorous testing, [https://github.com/bibanon/Coreboot-ThinkPads/wiki/BIOS-Flashchip-Identification-Method#use-flashrom-to-identify-bios-chip-experimental See this wiki page for more information.]
 +
 
 +
* [http://paste.flashrom.org/view.php?id=1454 Flashrom Pastebin - Thinkpad R60 Flashrom Output] - Probing for SST SST25VF016B.RES2, 2048 kB: probe_spi_res2: id1 0xbf, id2 0x41
 +
* [http://www.coreboot.org/pipermail/coreboot/2013-June/075962.html Coreboot Mailing List - Invalid OPCODE] - Allows us to infer that the model_id for {{ic|SST25VF016B}} is 0xbf
 +
* [http://coreboot.org/pipermail/coreboot/2013-June/076027.html Coreboot Mailing List - Bricked Lenovo T60]
 +
* [http://macbook.donderklumpen.de/coreboot/ Donderclumpen - Coreboot on Macbook 2,1]] - Found {{ic|id1 0xbf, id2 0x2541}} there, which corroborates with the inference from Peter Stuge.
 +
* [http://ww1.microchip.com/downloads/en/DeviceDoc/S71271_04.pdf SST - SST25VF016B Official Datasheet]
 +
 
 +
== What You Need ==
 +
 
 +
* The [http://flashrom.org/Download#Installation_from_source flashrom source] (at least r1613 to make sure the laptops are whitelisted to work with flashrom)
 +
* Flashrom patches for SST and Macronix flashchip support (provided in the next section).
 +
* [http://git.stuge.se/?p=bucts.git The bucts utility].
 +
* '''Dependencies''' (Debian/Ubuntu/Trisquel):
 +
** '''Version Control''' - {{ic|sudo apt-get install subversion git}}
 +
** '''Build Essentials''' - {{ic|sudo apt-get -y install build-essential}}
 +
** '''flashrom''' - {{ic|sudo apt-get install libpci-dev pciutils zlib1g-dev libftdi-dev}}
 +
** '''Coreboot''' - {{ic|sudo apt-get install libncurses-dev iasl libc6-dev bison flex git}}
 +
** '''GRUB2''' (optional) - {{ic|sudo apt-get install bison libopts25 libselinux1-dev autogen m4 autoconf help2man libopts25-dev flex libfont-freetype-perl automake autotools-dev libfreetype6-dev texinfo ttf-unifont}}
 +
 
 +
== Patch Flashrom ==
 +
 
 +
: ''Source: [https://github.com/bibanon/Coreboot-ThinkPads/wiki/BIOS-Flashchip-Identification-Method BASQLC Libreboot ThinkPads - Flashrom Patches]''
 +
 
 +
This method uses the ''brute force flashchip identification method'' used in the Libreboot flashing scripts. The idea is, if the patched flashrom can't identify the chip, it won't do anything; so why not try both patches?
 +
 
 +
''The most reliable method to identify the flashchip is to visually identify it; but flipping the motherboard requires complete disassembly.''
 +
 
 +
First, build both the SST and Macronix patches of Flashrom.
 +
 
 +
=== Step 1: Build Normal Flashrom ===
 +
 
 +
# Obtain the latest {{ic|flashrom}} source code with Subversion:
 +
#: {{ic|svn co svn://flashrom.org/flashrom/trunk flashrom}}
 +
# Build {{ic|flashrom</code> using the <code>make}} command.
 +
#: {{ic|make}}
 +
# Rename the {{ic|flashrom</code> binary to <code>flashrom_orig}} .
 +
#: {{ic|mv flashrom flashrom_orig}}
 +
 
 +
=== Step 2: Build SST-patched Flashrom  ===
 +
 
 +
# Open the <code>flashchips.c</code> file in the <code>flashrom</code> source code directory.
 +
# Use '''Ctrl-F''' to find the {{ic|SST25VF016B}} entry.
 +
# Modify the <code>.probe</code> , <code>.model_id</code> , and <code>.write</code> definitions with the following values.
 +
#* .probe - {{ic|probe_spi_res2}}
 +
#* .model_id - {{ic|0x41}}
 +
#* .write - {{ic|spi_chip_write_1}}
 +
# The result should look something like this:
 +
 
 +
{{bc|1={
 +
        .vendor        = "SST",
 +
        .name          = "SST25VF016B",
 +
        .bustype        = BUS_SPI,
 +
        .manufacture_id = SST_ID,
 +
        .model_id      = 0x41,
 +
        .total_size    = 2048,
 +
        .page_size      = 256,
 +
        .feature_bits  = FEATURE_WRSR_EITHER,
 +
        .tested        = TEST_OK_PREW,
 +
        .probe          = probe_spi_res2,
 +
        /*
 +
          unimportant code statements
 +
          in between, leave them alone
 +
        */
 +
        .write          = spi_chip_write_1,
 +
        .read          = spi_chip_read,
 +
        .voltage        = {2700, 3600},
 +
},}}
 +
 
 +
# Build <code>flashrom</code> using the <code>make</code> command.
 +
#: {{ic|make}}
 +
# Rename the <code>flashrom</code> binary to <code>flashrom_lenovobios_sst</code> .
 +
#: {{ic|mv flashrom flashrom_lenovobios_sst}}
 +
 
 +
=== Step 3: Build Macronix-patched Flashrom  ===
 +
 
 +
# Revert the changes previously made to flashchips.c
 +
# Use '''Ctrl-F''' to find the {{ic|MX25L1605D}} entry.
 +
# Modify the <code>.probe</code> , <code>.model_id</code> , and <code>.write</code> definitions with the following values.
 +
#* .probe - {{ic|probe_spi_res1}}
 +
#* .model_id - {{ic|0x14}}
 +
#* .write - {{ic|spi_chip_write_1}}
 +
# The result should look something like this:
 +
 
 +
{{bc|1={
 +
        .vendor        = "Macronix",
 +
        .name          = "MX25L1605D/MX25L1608D/MX25L1673E",
 +
        .bustype        = BUS_SPI,
 +
        .manufacture_id = MACRONIX_ID,
 +
        .model_id      = 0x14,
 +
        .total_size    = 2048,
 +
        .page_size      = 256,
 +
        .feature_bits  = FEATURE_WRSR_WREN,
 +
        .tested        = TEST_OK_PREW,
 +
        .probe          = probe_spi_res1,
 +
        /*
 +
          unimportant code statements
 +
          in between, leave them alone
 +
        */
 +
        .write          = spi_chip_write_1,
 +
        .read          = spi_chip_read, /* Fast read (0x0B), dual I/O supported */
 +
        .voltage        = {2700, 3600},
 +
},}}
 +
 
 +
# Build <code>flashrom</code> using the <code>make</code> command.
 +
#: {{ic|make}}
 +
# Rename the <code>flashrom</code> binary to <code>flashrom_lenovobios_macronix</code> .
 +
#: {{ic|mv flashrom flashrom_lenovobios_macronix}}
 +
# Revert the changes previously made to flashchips.c
 +
 
 +
=== Step 4: Rename the Vanilla Flashrom Binary ===
 +
 
 +
We renamed the untouched flashrom binary to {{ic|flashrom_orig}}, so that it wouldn't be overwritten. Now we need to restore the original name.
 +
 
 +
# Rename the <code>flashrom_orig</code> binary to <code>flashrom</code> .
 +
#: {{ic|mv flashrom_orig flashrom}}
 +
 
 +
== Back up Official Lenovo BIOS ==
 +
 
 +
{{Warning|It is ''STRONGLY RECOMMENDED'' to back up the vendor BIOS; each vendor BIOS image has a unique, unrecoverable ID. Do not use another laptop's vendor BIOS image.}}
 +
 +
# Enter the {{ic|flashrom/}} directory. 
 +
#: {{ic|cd flashrom}}
 +
# Run ''both'' of these commands to backup the BIOS to {{ic|factory.bin}} (don't panic, nothing is being installed):
 +
#: {{ic|sudo ./flashrom_lenovobios_sst -p internal -r factory.bin}}
 +
#: {{ic|sudo ./flashrom_lenovobios_macronix -p internal -r factory.bin  -c "MX25L1605"}}
 +
# If a <code>factory.bin</code> file was created in the <code>flashrom/</code> directory, the Lenovo BIOS has been backed up successfully. If not, try the commands again. Copy this dump to a safe place.
 +
# Return to the {{ic|libreboot_bin/}} directory. 
 +
#: {{ic|cd ..}}
 +
 
 +
* Source: [https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-X60#back-up-official-lenovo-bios BASLQC Libreboot ThinkPads - Backing up the Lenovo BIOS on the ThinkPad X60]
 +
 
 +
== Build the Coreboot ROM ==
 +
 
 +
{{Warning|The vast majority of ThinkPad T60/T60p laptops require [https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-T60p proprietary VGABIOS blobs] for the display to work. If you forget to install them, your machine will be BRICKED!}}
 +
 
 +
* See [http://www.coreboot.org/Build_HOWTO Build HOWTO] for how to build ROM images in coreboot.
 +
** ''(optional)'' If you need to obtain and embed the VGABIOS in Coreboot (e.g. T60 with ATI GPU, text in SeaBIOS), [https://github.com/bibanon/Coreboot-ThinkPads/wiki/T60p-Extract-VGABIOS follow this procedure.]
 +
** [https://github.com/bibanon/Coreboot-ThinkPads/wiki/T60p-Build-Coreboot Here is a clearer guide] which shows exactly how to build Coreboot, set up the {{ic|.config}} file, and embed the VGABIOS.
 +
 
 +
== Patch Coreboot ROM for bucts ==
 +
 
 +
The BUCTS switch provides a safety net in case Coreboot does not run the first time; just unplug the CMOS battery to return to the vendor BIOS.
 +
 
 +
This patch prevents the Coreboot ROM from overwriting the vendor BIOS (which would destroy the safety net). ''Choose one method:''
 +
 
 +
=== Method 1: One-line Patcher===
 +
 
 +
# Place the {{ic|coreboot.rom}} file in the current directory.
 +
# Run this one-liner to patch the ROM in one command:
 +
#: {{ic|<nowiki>dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k; dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump; dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k conv=notrunc</nowiki>}}
 +
 
 +
=== Method 2: Verbose Method ===
 +
 
 +
# Copy the built {{ic|coreboot.rom</code> to the <code>flashrom}} source code directory.
 +
# Run the {{ic|dd}} command below to shift the first 64K of data from <code>coreboot.rom</code>
 +
#: {{ic|<nowiki>dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k</nowiki>}}
 +
# Run the dd command below to display the first 64k of {{ic|coreboot.rom}}
 +
#: {{ic|<nowiki>dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump</nowiki>}}
 +
# Verify that the complete range is filled with {{ic|ff}} bytes before proceeding.
 +
#: The output of the {{ic|dd}} command above must EXACTLY match the text below. If not, the coreboot image needs to be rebuilt with the second-to-last 64kbyte block unused.
 +
#:: {{ic|0000000 ffff ffff ffff ffff ffff ffff ffff ffff *0010000}}
 +
# Run the {{ic|dd}} command below:
 +
#: {{ic|<nowiki>dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s
 +
coreboot.rom) - 0x20000] count=64k conv=notrunc</nowiki>}}
 +
 +
* Source: [http://comments.gmane.org/gmane.linux.bios/69354 gmane.linux.bios Mailing List - LinuxBIOS on T60] - Peter Stuge's Method of installing Coreboot on the X60.
 +
 
 +
== Install Coreboot (First Flash) ==
 +
 
 +
First, install Coreboot alongside the vendor BIOS.
 +
 
 +
# Copy the {{ic|coreboot.rom</code> to the <code>flashrom/}} directory.
 +
# Run {{ic|su}}  to become root.
 +
# Run {{ic|bucts 1}}
 +
# Flash Coreboot (run both of these commands, whichever works first):
 +
#: {{ic|sudo ./flashrom_lenovobios_sst -p internal -w coreboot.rom}} 
 +
#: {{ic|sudo ./flashrom_lenovobios_macronix -p internal -w coreboot.rom}}
 +
#* This will take a while, and will spit out a few errors (since half the flashchip is write protected).
 +
# Check to make sure that the errors match the following:
 +
 
 +
{{bc|    Reading old flash chip contents... done.
 +
    Erasing and writing flash chip... spi_block_erase_20 failed during command execution at address 0x0
 +
    Reading current flash chip contents... done. Looking for another erase function.
 +
    spi_block_erase_52 failed during command execution at address 0x0
 +
    Reading current flash chip contents... done. Looking for another erase function.
 +
    Transaction error!
 +
    spi_block_erase_d8 failed during command execution at address 0x1f0000
 +
    Reading current flash chip contents... done. Looking for another erase function.
 +
    spi_chip_erase_60 failed during command execution
 +
    Reading current flash chip contents... done. Looking for another erase function.
 +
    spi_chip_erase_c7 failed during command execution
 +
    Looking for another erase function.
 +
    No usable erase functions left.
 +
    FAILED!
 +
    Uh oh. Erase/write failed. Checking if anything has changed.
 +
    Reading current flash chip contents... done.
 +
    Apparently at least some data has changed.
 +
    Your flash chip is in an unknown state.}}
 +
 
 +
# If the errors are an exact match, the flash was successful.
 +
#* If they don't match, '''DO NOT TURN OFF YOUR LAPTOP'''. Flash again.
 +
# Power cycle the machine (i.e. a cold boot, not just a reboot). Your laptop will reboot into Coreboot.
 +
 
 +
{{Note|If you're using an Intel GPU, SeaBIOS will not display anything without a proprietary VGABIOS blob, but GNU/Linux should work fine after booting.}}
 +
 
 +
* Sources: [http://www.flashrom.org/pipermail/flashrom/2012-April/009124.html Peter's mail] - [http://thread.gmane.org/gmane.linux.bios/69354 Mailing List Thread 1] - [http://thread.gmane.org/gmane.linux.bios.flashrom/575 Mailing List Thread 2]
 +
 
 +
=== Recover from Failed Flash with Bucts ===
 +
 
 +
{{Note|If you forgot to set {{ic|bucts 1}} , forgot to install the proprietary VGABIOS blob on T60 systems with ATI GPUs or 1024x768 screens, or forgot to patch the Coreboot ROM; your laptop has been bricked, and requires hardware flashing for recovery.}}
 +
 
 +
bucts sets a register that lives on the RTC well, ie. it is powered by the same source that keeps the clock alive. Usually that's a CMOS battery on the mainboard.
 +
 
 +
# Unscrew the keyboard (check Lenovo Hardware Maintenence Manual for more info).
 +
# Remove the keyboard.
 +
# Unplug the CMOS battery (it's a yellow circle).  
 +
# Wait a few seconds, and plug it back in.
 +
# Reassemble the ThinkPad.
 +
# Turn the ThinkPad back on.
 +
#* On the ThinkPad x60 series, bucts issues might also be solved by "discarging RTC", which is done by pressing the power button 5 times for 10 seconds.
 +
 
 +
Afterwards, the register should be reset and the system should boot into the vendor BIOS.
 +
 
 +
== Install Coreboot (Second Flash) ==
 +
 
 +
Next, flash Coreboot a second time to overwrite the vendor BIOS.
 +
 
 +
# Run {{ic|su}}  to become root.
 +
# Enter the {{ic|flashrom}}  directory.
 +
# Run {{ic|./flashrom -p internal -w coreboot.rom}}
 +
#: This will successfully overwrite the entire flash chip with no errors, including the last 64k that were write protected with the factory BIOS.
 +
#: If it complains about 3 different flashchips (in the case of macronix chip), do this instead:
 +
#: Run {{ic|./flashrom -p internal -w coreboot.rom -c "MX25L1605D/MX25L1608D/MX25L1673E"}}
 +
# Run {{ic|bucts 0}}
 +
# Reboot the laptop. Coreboot has been successfully installed.
 +
 
 +
== Recovery with a Hardware Firmware Flasher ==
 +
 
 +
If you had a bad flash you will need to use a hardware flasher to reflash the BIOS.
 +
 
 +
{{Note|The BASLQC provides a more comprehensive guide to hardware-based firmware flashing below, with research on a Raspberry Pi-based hardware flasher: (Not a Coreboot project)
 +
* [https://github.com/bibanon/Coreboot-ThinkPads/wiki/X60-T60-Hardware-Flashing BASLQC Libreboot ThinkPads - Hardware-based Firmware Flashing]}}
  
On the x60x, bucts issues might also be solved by "discarging RTC", which is done by pressing the power button 5 times for 10 seconds.
 
 
=== Required/advised hardware and informations ===
 
=== Required/advised hardware and informations ===
 
* [http://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles_pdf/42x3550_04.pdf X60 Hardware Maintenance Manual] or [http://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles_pdf/42t7844_04.pdf T60 Hardware Maintenance Manual] for disassembling the laptop
 
* [http://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles_pdf/42x3550_04.pdf X60 Hardware Maintenance Manual] or [http://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles_pdf/42t7844_04.pdf T60 Hardware Maintenance Manual] for disassembling the laptop
Line 50: Line 345:
 
* An external flashrom programmer
 
* An external flashrom programmer
  
=== Howto ===
+
=== Disassembling the ThinkPad ===
 +
 
 +
Follow the [http://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles_pdf/42x3550_04.pdf X60 Hardware Maintenance Manual] or [http://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles_pdf/42t7844_04.pdf T60 Hardware Maintenance Manual] to disassemble the laptop, until you can access the flash chip.
 +
 
 +
(photos needed)
 +
 
 +
* On the X60, the flash chip is on the bottom of the motherboard, under a layer of protective black tape.
 +
* On the T60, the flash chip is just under the palmrest, but blocked by a magnesium frame (which you will have to remove).
 +
 
 +
=== Bus Pirate + SOIC Clip Configuration ===
 +
 +
Below is a diagram of how to plug the Bus Pirate into the SOIC Clip, with colors based on [http://dangerousprototypes.com/docs/Common_Bus_Pirate_cable_pinouts the Seeed Studio pinout.] Your cable colors may differ (such as the Sparkfun layout).
 +
 
 +
<pre>8765
 +
----
 +
|  |
 +
----
 +
1234</pre>
 +
 
 +
# CS (white)
 +
# MISO (black)
 +
# ''not used''
 +
# GND (brown)
 +
# MOSI (gray)
 +
# CLK (purple)
 +
# ''not used''
 +
# 3.3V (red) - Depends on chip
 +
 +
{{Note|Make sure the pinouts are correct; otherwise, Bus Pirate will fail to detect a chip, or it will "detect" an {{ic|0x0}}  chip.}}
 +
 
 +
Finally, make sure that the Pomona clip makes contact with the metal wires of the chip. It can be a challenge, but keep trying.
 +
 
 +
=== How to supply power to the flashchip ===
 +
 +
There are two ways to supply power to the chip: plugging in an AC adapter (without turning it on), and using the 8th 3.3v pin.
 +
 +
I have found that the SST chips work best with the 8th pin, while the Macronix chips require an AC Adapter to power up.
 +
 
 +
Your results may vary.
 +
 
 +
== Reading the Flashchip with Bus Pirate ==
 +
 +
# Visually inspect (with a magnifying glass) the type of flashchip on the motherboard.
 +
# Clip the Pomona SOIC-8 Clip onto the flashchip. Make sure that the Bus Pirate is connected to it as shown above.
 +
# download and extract the Libreboot binaries, and enter the {{ic|libreboot_bin/flashrom}}  directory.
 +
 
 +
{{bc|cd libreboot_bin/flashrom}}
 +
If it is an SST, run this command:
 +
 
 +
{{bc|1=sudo ./flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -r test.rom}}
 +
If it is a Macronix, run this command:
 +
 
 +
{{bc|1=sudo ./flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -r test.rom -c "MX25L1605D/MX25L1608D/MX25L1673E"}}
 +
Next, check the sha512sum of the dump:
 +
 
 +
{{bc|sha512sum test.rom}}
 +
Run the {{ic|flashrom}} command again to make a second dump. Then, check the sha512sum of the second dump:
 +
 
 +
{{bc|sha512sum test.rom}}
 +
If the sha512sums match after three tries, {{ic|flashrom}} has managed to read the flashchip precisely (but not always accurately). You may try and flash Libreboot now.
 +
 
 +
== Flashing Libreboot with Bus Pirate ==
 +
 
 +
{{Note|replace <code>/path/to/libreboot.rom</code> with the location of your chosen ROM, such as <code>../bin/x60/libreboot_usqwerty.rom</code>):}}
 +
 
 +
If your chip is SST, run this command:
 +
 
 +
{{bc|1=sudo ./flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -w /path/to/libreboot.rom}}
 +
 
 +
If your chip is Macronix, run this command:
 +
 
 +
{{bc|1=sudo ./flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -w /path/to/libreboot.rom -c "MX25L1605D/MX25L1608D/MX25L1673E" }}
 +
 
 +
Once that command outputs the following, the flash has completed successfully. If not, just flash again.
 +
 
 +
{{bc|Reading old flash chip contents... done.Erasing and writing flash chip... Erase/write done.Verifying flash... VERIFIED.}}
 +
 
 +
=== Howto (old) ===
 +
 
 +
{{Note|The libreboot project also has picture guides showing disassembly and external flashing instructions ('''these 3 links are to the libreboot project. Contact libreboot, *not* coreboot, for support'''):
 +
* [http://libreboot.org/docs/howtos/x60_unbrick.html X60/X60s unbricking guide]
 +
* [http://libreboot.org/docs/howtos/x60tablet_unbrick.html X60 Tablet unbricking guide]
 +
* [http://libreboot.org/docs/howtos/t60_unbrick.html T60 unbricking guide]
 +
 
 +
The libreboot guides linked above are based on the information below from the coreboot project.}}
 +
 
 
0.  wire the pomona clip to a programmer that way:
 
0.  wire the pomona clip to a programmer that way:
  
Line 73: Line 453:
 
In another hand I didn't follow that and wired it without powering the mainboard(mainboard disconnected from power plug, no battery in) and with all pins and it worked...
 
In another hand I didn't follow that and wired it without powering the mainboard(mainboard disconnected from power plug, no battery in) and with all pins and it worked...
 
# Disassemble carefully the laptop, the SO-8 chip is on the bottom of the mainboard...
 
# Disassemble carefully the laptop, the SO-8 chip is on the bottom of the mainboard...
# connect the pomona clip to the BIOS chip
+
# connect the pomona clip to the flash chip
 
# flash coreboot or the BIOS
 
# flash coreboot or the BIOS
 
# remount the laptop
 
# remount the laptop
 +
 +
See also [http://flashrom.org/ISP In-System Programming]
  
 
== Coreboot standard configuration ==
 
== Coreboot standard configuration ==
* It's advised to make SeaBios(instead of coreboot) run the VGA option rom by disabling CONFIG_VGA_ROM_RUN:
+
* It's now the default that when running SeaBios, that it (instead of coreboot) runs the VGA option rom.
[ ] Run VGA Option ROMs
+
in make menuconfig.
+
Note that you still need to include the option rom in coreboot:
+
[*] Add a VGA BIOS image
+
 
See [[VGA_support]] for details on how to include the VGA BIOS image.
 
See [[VGA_support]] for details on how to include the VGA BIOS image.
* Also disable CONFIG_S3_VGA_ROM_RUN which is for really old linux kernels(2.4) (which is disabled automatically if you don't select CONFIG_VGA_ROM_RUN).
 
  
From the #coreboot IRC Channel on FreeNode servers:
+
== VBIOS replacement (native graphics) ==
Oct 04 13:47:09 <patrickg>      that's about running vga init on s3 wakeup - required for some older linux kernels
+
The VGA option ROM (see above) is proprietary. Under devices in menuconfig, disable loading option ROM,s and enable 'Native graphics initialization'. '''Use the GRUB payload'''.
[...]
+
 
  Oct 04 13:47:25 <patrickg>      BIOSes call it "POST on wakeup" or sth like that
+
TODO: add notes here for how to patch coreboot for T60 native graphics (it's in libreboot already, or on 5345 on coreboot gerrit).
Oct 04 13:47:30 <patrickg>      older ~ 2.4 class ;)
+
 
 +
== Recently tested revisions on the X60 ==
 +
 
 +
See [http://review.coreboot.org/gitweb?p=board-status.git;a=tree;f=lenovo/x60;hb=HEAD the most recent board-status submissions]
 +
 
 +
[[Supported_Motherboards#2014W08 | 970ad7076388b3ef98988121170df86196d493b4 coreboot-4.0-5534-g970ad70 ]]
 +
 
 +
[[Supported_Motherboards#2013W50 | 8496c4dbec41b3a9284fc29b0dcd97fc8946223b coreboot-4.0-5045-g9bf05de ]]
 +
 
 +
== Recently tested revisions on the T60 ==
 +
 
 +
See [http://review.coreboot.org/gitweb?p=board-status.git;a=tree;f=lenovo/t60;hb=HEAD the most recent board-status submisssions]
 +
 
 +
[[Supported_Motherboards#2014W10 | a172ea546992c3f6f6a99b4dbaabbdae4c959707 4.0-5611-ga172ea5 ]]
  
== Last tested revision on the X60 ==
+
[[Supported_Motherboards#2013W50 | 9bf05de5ab2842fc83cea8da5e9058417fc4bc24 4.0-5045-g9bf05de ]]
4bd7b0cbadabb45f9131da03121a6ca284f24f35
+
  
 
== Status ==
 
== Status ==
* [[Thinkpad_X60s|Thinkpad X60s Status]]
+
* [[Board:lenovo/x60|Thinkpad X60 Status]]
 +
* [[Board:lenovo/t60|Thinkpad T60 Status]]

Latest revision as of 16:05, 20 October 2014

These Coreboot/Libreboot flashing instructions are designed for the Lenovo X60, X60s, X60 tablet, T60 and T60p.

Note: All ThinkPad X60 Series laptops work out of the box with Coreboot and Libreboot, no modifications necessary.
Note: If you plan to use Libreboot with the T60 (FSF-Certified, cannot use proprietary blobs), it requires a ThinkPad T60 with Intel GPU and a 15" Flexview 1400x1050 SXGA+ display (1600x1200, 2048x1536, and 14.1" 1400x1050 panels are also known to work).

The libreboot project lists compatible screens at the time of writing, using changeset 5345 from review.coreboot.org: list of known-working lcd panels

Thus, Libreboot users will have to make a custom FrankenPad; either by replacing the motherboard with an Intel board; or the screen and the inverter with an SXGA+ display, at great expense.
Warning: The vast majority of ThinkPad T60/T60p laptops require proprietary VGABIOS blobs for the display to work (see the links for more information). Do not forget to build Coreboot with these blobs, or your machine will be BRICKED!

Libreboot Flashing Procedure (Easy Method)

Note: Libreboot is not officially part of the coreboot project. Do not contact coreboot for support; instead, contact the libreboot community.

The Libreboot distribution distributes pre-compiled ROM images along with scripts and instructions for easy flashing. Choose between these two guides:

Back up Official Lenovo BIOS (Libreboot)

Warning: It is STRONGLY RECOMMENDED to back up the vendor BIOS; each vendor BIOS image has a unique, unrecoverable ID. Do not use another laptop's vendor BIOS image.
  1. Download, extract, and build the latest Libreboot binaries.
  2. From the libreboot_bin/ directory, enter the flashrom/ directory.
    cd flashrom
  3. Run both of these commands to backup the BIOS to factory.bin (don't panic, nothing is being installed):
    sudo ./flashrom_lenovobios_sst -p internal -r factory.bin
    sudo ./flashrom_lenovobios_macronix -p internal -r factory.bin
  4. If a factory.bin file was created in the flashrom/ directory, the Lenovo BIOS has been backed up successfully. If not, try the commands again. Copy this dump to a safe place.
  5. Return to the libreboot_bin/ directory.
    cd ..

Coreboot Flashing Procedure (Advanced)

Below is a procedure that describes all the steps needed to flash Coreboot, in fine detail.

The Libreboot scripts have fully automated this complicated process, so these instructions have been expanded for educational purposes.

Briefing

  • Some SPI Flash chips require special flashrom patches.
    • Flash chips can be identified by various commands (REMS*, RDID etc.). Some of them reply with an ID for the vendor and the exact chip model; others just reply with a single byte.
    • Unfortunately, the vendor BIOS forbids higher quality identification commands, so flashrom must be patched to use the lower quality opcodes.
    • This type of patch will never be merged upstream, so it must be applied manually.
  • The BUCTS register bit must be flipped before flashing Coreboot.
    • The bucts utility can be used to flip the bit.
    • This register bit doubles as a unique safety net that allows the vendor BIOS and Coreboot to coexist.
    • Just unplug the CMOS battery to return to the vendor BIOS, in case Coreboot doesn't boot.
  • The Coreboot ROM has to be specially patched to prevent it from overwriting the vendor BIOS.
    • If the vendor BIOS gets overwritten, it would defeat the purpose of the BUCTS safety net.
    • Just use this convenient little Bash one-liner to leave some free space at the beginning of the ROM.
    dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k; dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k
  • It is important to figure out what type of flashchip is on the motherboard..
    • Early Coreboot developers had to disassemble the entire laptop just to take a peek at the flashchip. A magnifying glass is needed to read the tiny text burned on top of the chip.
    • The Libreboot installation scripts have an ingenious new brute-force method of identifying the flashchip.
    • First, build two patched flashrom binaries, one for SST and one for Macronix. Then try both of the binaries until you find one that works.
    • Seems way too simple, but it's way better than ripping out the motherboard just to look at a chip.

Flashrom Patch Definitions

Source: BASQLC Libreboot ThinkPads - BIOS Flashchip Identification Method

Flashrom must be patched to use RES SPI identification and spi_chip_write_1 for your flash chip, and to set the flash chip model_id to the RES opcode.

Below are the definitions that must be patched into flashrom/flashchips.c :

  • SST25VF016B
    • .probe - probe_spi_res2
    • .model_id - 0x41
    • .write - spi_chip_write_1
  • MX25l1605D
    • .probe - probe_spi_res1
    • .model_id - 0x14
    • .write - spi_chip_write_1
  • Atmel ??? (T60 Only?)
    • Use -p internal:laptop=force_I_want_a_brick instead of -p internal, when running flashrom
    • No patches necessary. You still need to do 2 flashing rounds, with the bucts/dd trick outlined in this guide.

These definitions were painstakingly discovered from excessively long and hardly informative flashchip documentation, mailing lists, and the output of flashrom. These definitions been confirmed to work after rigorous testing, See this wiki page for more information.

What You Need

  • The flashrom source (at least r1613 to make sure the laptops are whitelisted to work with flashrom)
  • Flashrom patches for SST and Macronix flashchip support (provided in the next section).
  • The bucts utility.
  • Dependencies (Debian/Ubuntu/Trisquel):
    • Version Control - sudo apt-get install subversion git
    • Build Essentials - sudo apt-get -y install build-essential
    • flashrom - sudo apt-get install libpci-dev pciutils zlib1g-dev libftdi-dev
    • Coreboot - sudo apt-get install libncurses-dev iasl libc6-dev bison flex git
    • GRUB2 (optional) - sudo apt-get install bison libopts25 libselinux1-dev autogen m4 autoconf help2man libopts25-dev flex libfont-freetype-perl automake autotools-dev libfreetype6-dev texinfo ttf-unifont

Patch Flashrom

Source: BASQLC Libreboot ThinkPads - Flashrom Patches

This method uses the brute force flashchip identification method used in the Libreboot flashing scripts. The idea is, if the patched flashrom can't identify the chip, it won't do anything; so why not try both patches?

The most reliable method to identify the flashchip is to visually identify it; but flipping the motherboard requires complete disassembly.

First, build both the SST and Macronix patches of Flashrom.

Step 1: Build Normal Flashrom

  1. Obtain the latest flashrom source code with Subversion:
    svn co svn://flashrom.org/flashrom/trunk flashrom
  2. Build flashrom using the make command.
    make
  3. Rename the flashrom binary to flashrom_orig .
    mv flashrom flashrom_orig

Step 2: Build SST-patched Flashrom

  1. Open the flashchips.c file in the flashrom source code directory.
  2. Use Ctrl-F to find the SST25VF016B entry.
  3. Modify the .probe , .model_id , and .write definitions with the following values.
    • .probe - probe_spi_res2
    • .model_id - 0x41
    • .write - spi_chip_write_1
  4. The result should look something like this:
{
        .vendor         = "SST",
        .name           = "SST25VF016B",
        .bustype        = BUS_SPI,
        .manufacture_id = SST_ID,
        .model_id       = 0x41,
        .total_size     = 2048,
        .page_size      = 256,
        .feature_bits   = FEATURE_WRSR_EITHER,
        .tested         = TEST_OK_PREW,
        .probe          = probe_spi_res2,
        /*
          unimportant code statements
          in between, leave them alone
        */
        .write          = spi_chip_write_1,
        .read           = spi_chip_read,
        .voltage        = {2700, 3600},
},
  1. Build flashrom using the make command.
    make
  2. Rename the flashrom binary to flashrom_lenovobios_sst .
    mv flashrom flashrom_lenovobios_sst

Step 3: Build Macronix-patched Flashrom

  1. Revert the changes previously made to flashchips.c
  2. Use Ctrl-F to find the MX25L1605D entry.
  3. Modify the .probe , .model_id , and .write definitions with the following values.
    • .probe - probe_spi_res1
    • .model_id - 0x14
    • .write - spi_chip_write_1
  4. The result should look something like this:
{
        .vendor         = "Macronix",
        .name           = "MX25L1605D/MX25L1608D/MX25L1673E",
        .bustype        = BUS_SPI,
        .manufacture_id = MACRONIX_ID,
        .model_id       = 0x14,
        .total_size     = 2048,
        .page_size      = 256,
        .feature_bits   = FEATURE_WRSR_WREN,
        .tested         = TEST_OK_PREW,
        .probe          = probe_spi_res1,
        /*
          unimportant code statements
          in between, leave them alone
        */
        .write          = spi_chip_write_1,
        .read           = spi_chip_read, /* Fast read (0x0B), dual I/O supported */
        .voltage        = {2700, 3600},
},
  1. Build flashrom using the make command.
    make
  2. Rename the flashrom binary to flashrom_lenovobios_macronix .
    mv flashrom flashrom_lenovobios_macronix
  3. Revert the changes previously made to flashchips.c

Step 4: Rename the Vanilla Flashrom Binary

We renamed the untouched flashrom binary to flashrom_orig, so that it wouldn't be overwritten. Now we need to restore the original name.

  1. Rename the flashrom_orig binary to flashrom .
    mv flashrom_orig flashrom

Back up Official Lenovo BIOS

Warning: It is STRONGLY RECOMMENDED to back up the vendor BIOS; each vendor BIOS image has a unique, unrecoverable ID. Do not use another laptop's vendor BIOS image.
  1. Enter the flashrom/ directory.
    cd flashrom
  2. Run both of these commands to backup the BIOS to factory.bin (don't panic, nothing is being installed):
    sudo ./flashrom_lenovobios_sst -p internal -r factory.bin
    sudo ./flashrom_lenovobios_macronix -p internal -r factory.bin -c "MX25L1605"
  3. If a factory.bin file was created in the flashrom/ directory, the Lenovo BIOS has been backed up successfully. If not, try the commands again. Copy this dump to a safe place.
  4. Return to the libreboot_bin/ directory.
    cd ..

Build the Coreboot ROM

Warning: The vast majority of ThinkPad T60/T60p laptops require proprietary VGABIOS blobs for the display to work. If you forget to install them, your machine will be BRICKED!
  • See Build HOWTO for how to build ROM images in coreboot.
    • (optional) If you need to obtain and embed the VGABIOS in Coreboot (e.g. T60 with ATI GPU, text in SeaBIOS), follow this procedure.
    • Here is a clearer guide which shows exactly how to build Coreboot, set up the .config file, and embed the VGABIOS.

Patch Coreboot ROM for bucts

The BUCTS switch provides a safety net in case Coreboot does not run the first time; just unplug the CMOS battery to return to the vendor BIOS.

This patch prevents the Coreboot ROM from overwriting the vendor BIOS (which would destroy the safety net). Choose one method:

Method 1: One-line Patcher

  1. Place the coreboot.rom file in the current directory.
  2. Run this one-liner to patch the ROM in one command:
    dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k; dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump; dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k conv=notrunc

Method 2: Verbose Method

  1. Copy the built coreboot.rom to the flashrom source code directory.
  2. Run the dd command below to shift the first 64K of data from coreboot.rom
    dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k
  3. Run the dd command below to display the first 64k of coreboot.rom
    dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump
  4. Verify that the complete range is filled with ff bytes before proceeding.
    The output of the dd command above must EXACTLY match the text below. If not, the coreboot image needs to be rebuilt with the second-to-last 64kbyte block unused.
    0000000 ffff ffff ffff ffff ffff ffff ffff ffff *0010000
  5. Run the dd command below:
    dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k conv=notrunc

Install Coreboot (First Flash)

First, install Coreboot alongside the vendor BIOS.

  1. Copy the coreboot.rom to the flashrom/ directory.
  2. Run su to become root.
  3. Run bucts 1
  4. Flash Coreboot (run both of these commands, whichever works first):
    sudo ./flashrom_lenovobios_sst -p internal -w coreboot.rom
    sudo ./flashrom_lenovobios_macronix -p internal -w coreboot.rom
    • This will take a while, and will spit out a few errors (since half the flashchip is write protected).
  5. Check to make sure that the errors match the following:
    Reading old flash chip contents... done.
    Erasing and writing flash chip... spi_block_erase_20 failed during command execution at address 0x0
    Reading current flash chip contents... done. Looking for another erase function.
    spi_block_erase_52 failed during command execution at address 0x0
    Reading current flash chip contents... done. Looking for another erase function.
    Transaction error!
    spi_block_erase_d8 failed during command execution at address 0x1f0000
    Reading current flash chip contents... done. Looking for another erase function.
    spi_chip_erase_60 failed during command execution
    Reading current flash chip contents... done. Looking for another erase function.
    spi_chip_erase_c7 failed during command execution
    Looking for another erase function.
    No usable erase functions left.
    FAILED!
    Uh oh. Erase/write failed. Checking if anything has changed.
    Reading current flash chip contents... done.
    Apparently at least some data has changed.
    Your flash chip is in an unknown state.
  1. If the errors are an exact match, the flash was successful.
    • If they don't match, DO NOT TURN OFF YOUR LAPTOP. Flash again.
  2. Power cycle the machine (i.e. a cold boot, not just a reboot). Your laptop will reboot into Coreboot.
Note: If you're using an Intel GPU, SeaBIOS will not display anything without a proprietary VGABIOS blob, but GNU/Linux should work fine after booting.

Recover from Failed Flash with Bucts

Note: If you forgot to set bucts 1 , forgot to install the proprietary VGABIOS blob on T60 systems with ATI GPUs or 1024x768 screens, or forgot to patch the Coreboot ROM; your laptop has been bricked, and requires hardware flashing for recovery.

bucts sets a register that lives on the RTC well, ie. it is powered by the same source that keeps the clock alive. Usually that's a CMOS battery on the mainboard.

  1. Unscrew the keyboard (check Lenovo Hardware Maintenence Manual for more info).
  2. Remove the keyboard.
  3. Unplug the CMOS battery (it's a yellow circle).
  4. Wait a few seconds, and plug it back in.
  5. Reassemble the ThinkPad.
  6. Turn the ThinkPad back on.
    • On the ThinkPad x60 series, bucts issues might also be solved by "discarging RTC", which is done by pressing the power button 5 times for 10 seconds.

Afterwards, the register should be reset and the system should boot into the vendor BIOS.

Install Coreboot (Second Flash)

Next, flash Coreboot a second time to overwrite the vendor BIOS.

  1. Run su to become root.
  2. Enter the flashrom directory.
  3. Run ./flashrom -p internal -w coreboot.rom
    This will successfully overwrite the entire flash chip with no errors, including the last 64k that were write protected with the factory BIOS.
    If it complains about 3 different flashchips (in the case of macronix chip), do this instead:
    Run ./flashrom -p internal -w coreboot.rom -c "MX25L1605D/MX25L1608D/MX25L1673E"
  4. Run bucts 0
  5. Reboot the laptop. Coreboot has been successfully installed.

Recovery with a Hardware Firmware Flasher

If you had a bad flash you will need to use a hardware flasher to reflash the BIOS.

Note: The BASLQC provides a more comprehensive guide to hardware-based firmware flashing below, with research on a Raspberry Pi-based hardware flasher: (Not a Coreboot project)

Required/advised hardware and informations

Disassembling the ThinkPad

Follow the X60 Hardware Maintenance Manual or T60 Hardware Maintenance Manual to disassemble the laptop, until you can access the flash chip.

(photos needed)

  • On the X60, the flash chip is on the bottom of the motherboard, under a layer of protective black tape.
  • On the T60, the flash chip is just under the palmrest, but blocked by a magnesium frame (which you will have to remove).

Bus Pirate + SOIC Clip Configuration

Below is a diagram of how to plug the Bus Pirate into the SOIC Clip, with colors based on the Seeed Studio pinout. Your cable colors may differ (such as the Sparkfun layout).

8765
----
|   |
----
1234
  1. CS (white)
  2. MISO (black)
  3. not used
  4. GND (brown)
  5. MOSI (gray)
  6. CLK (purple)
  7. not used
  8. 3.3V (red) - Depends on chip
Note: Make sure the pinouts are correct; otherwise, Bus Pirate will fail to detect a chip, or it will "detect" an 0x0 chip.

Finally, make sure that the Pomona clip makes contact with the metal wires of the chip. It can be a challenge, but keep trying.

How to supply power to the flashchip

There are two ways to supply power to the chip: plugging in an AC adapter (without turning it on), and using the 8th 3.3v pin.

I have found that the SST chips work best with the 8th pin, while the Macronix chips require an AC Adapter to power up.

Your results may vary.

Reading the Flashchip with Bus Pirate

  1. Visually inspect (with a magnifying glass) the type of flashchip on the motherboard.
  2. Clip the Pomona SOIC-8 Clip onto the flashchip. Make sure that the Bus Pirate is connected to it as shown above.
  3. download and extract the Libreboot binaries, and enter the libreboot_bin/flashrom directory.
cd libreboot_bin/flashrom

If it is an SST, run this command:

sudo ./flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -r test.rom

If it is a Macronix, run this command:

sudo ./flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -r test.rom -c "MX25L1605D/MX25L1608D/MX25L1673E"

Next, check the sha512sum of the dump:

sha512sum test.rom

Run the flashrom command again to make a second dump. Then, check the sha512sum of the second dump:

sha512sum test.rom

If the sha512sums match after three tries, flashrom has managed to read the flashchip precisely (but not always accurately). You may try and flash Libreboot now.

Flashing Libreboot with Bus Pirate

Note: replace /path/to/libreboot.rom with the location of your chosen ROM, such as ../bin/x60/libreboot_usqwerty.rom):

If your chip is SST, run this command:

sudo ./flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -w /path/to/libreboot.rom

If your chip is Macronix, run this command:

sudo ./flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -w /path/to/libreboot.rom -c "MX25L1605D/MX25L1608D/MX25L1673E"

Once that command outputs the following, the flash has completed successfully. If not, just flash again.

Reading old flash chip contents... done.Erasing and writing flash chip... Erase/write done.Verifying flash... VERIFIED.

Howto (old)

Note: The libreboot project also has picture guides showing disassembly and external flashing instructions (these 3 links are to the libreboot project. Contact libreboot, *not* coreboot, for support): The libreboot guides linked above are based on the information below from the coreboot project.

0. wire the pomona clip to a programmer that way:

From the #coreboot IRC Channel on FreeNode servers:

Oct 01 15:35:48 <CareBear\>     one important thing is that when you connect the clip to the X60 you should not connect all pins
[...]
Oct 01 15:36:22 <CareBear\>     only connect these pins: 1, 2, 4, 5, 6
[...]
Oct 01 15:37:21 <CareBear\>     also important: first connect charger to laptop, then connect the clip
[...]
Oct 01 17:49:41 <CareBear\>     GNUtoo-desktop : the mainboard must be powered off, but with the charger connected
[...]
Oct 01 17:50:39 <CareBear\>     um, that way there is no way anything will break
[...]
Oct 01 17:51:00 <CareBear\>     it is important not to connect 3v3 from the outside
Oct 01 17:51:39 <CareBear\>     because the correct power sequencing is not known, and if any other rail must come on before the standby 3v3 then the machine may well break when 3v3 is applied from the outside
[...]
Oct 01 17:52:48 <CareBear\>     it may also be fine - but it is unknown what happens
[...]
Oct 01 17:53:47 <CareBear\>     not supplying 3v3 from the outside is safer
Oct 01 17:54:25 <CareBear\>     and because the machine is powered off, there is no risk of the chipset accessing the flash chip

In another hand I didn't follow that and wired it without powering the mainboard(mainboard disconnected from power plug, no battery in) and with all pins and it worked...

  1. Disassemble carefully the laptop, the SO-8 chip is on the bottom of the mainboard...
  2. connect the pomona clip to the flash chip
  3. flash coreboot or the BIOS
  4. remount the laptop

See also In-System Programming

Coreboot standard configuration

  • It's now the default that when running SeaBios, that it (instead of coreboot) runs the VGA option rom.

See VGA_support for details on how to include the VGA BIOS image.

VBIOS replacement (native graphics)

The VGA option ROM (see above) is proprietary. Under devices in menuconfig, disable loading option ROM,s and enable 'Native graphics initialization'. Use the GRUB payload.

TODO: add notes here for how to patch coreboot for T60 native graphics (it's in libreboot already, or on 5345 on coreboot gerrit).

Recently tested revisions on the X60

See the most recent board-status submissions

970ad7076388b3ef98988121170df86196d493b4 coreboot-4.0-5534-g970ad70

8496c4dbec41b3a9284fc29b0dcd97fc8946223b coreboot-4.0-5045-g9bf05de

Recently tested revisions on the T60

See the most recent board-status submisssions

a172ea546992c3f6f6a99b4dbaabbdae4c959707 4.0-5611-ga172ea5

9bf05de5ab2842fc83cea8da5e9058417fc4bc24 4.0-5045-g9bf05de

Status