Mitac 6513WU
From coreboot
This page describes how to use coreboot on the Mitac 6513WU board.
A sample boot log of the board running coreboot is available.
Status
| Device/functionality | Status | Comments | ||||||
|---|---|---|---|---|---|---|---|---|
| CPU | ||||||||
| CPU works | OK | |||||||
| L1 cache enabled | OK | |||||||
| L2 cache enabled | OK | |||||||
| L3 cache enabled | N/A | |||||||
| Multiple CPU support | N/A | |||||||
| Multi-core support | N/A | |||||||
| Hardware virtualization | N/A | |||||||
| RAM | ||||||||
| EDO | N/A | |||||||
| SDRAM | WIP | Works with a double-sided 256 MB DIMM (Infineon HYS64V32220GU-7-C2). Single-sided DIMMs in slot 0 should work fine. Other combinations may or may not work, this is WIP. | ||||||
| SO-DIMM | N/A | |||||||
| DDR | N/A | |||||||
| DDR2 | N/A | |||||||
| DDR3 | N/A | |||||||
| Dual channel support | ||||||||
| ECC support | ||||||||
| On-board Hardware | ||||||||
| On-board IDE 3.5" | OK | |||||||
| On-board IDE 2.5" | N/A | |||||||
| On-board SATA | N/A | |||||||
| On-board SCSI | N/A | |||||||
| On-board USB | OK | |||||||
| On-board VGA | Untested | Needs a small patch for now (?) | ||||||
| On-board ethernet | N/A | |||||||
| On-board audio | ||||||||
| On-board modem | N/A | |||||||
| On-board FireWire | N/A | |||||||
| On-board smartcard reader | N/A | |||||||
| On-board CompactFlash | N/A | |||||||
| On-board PCMCIA | N/A | |||||||
| Add-on slots/cards | ||||||||
| ISA add-on cards | N/A | |||||||
| Audio/Modem-Riser (AMR/CNR) cards | ||||||||
| PCI add-on cards | OK | Tested slots PCI2, PCI4 (numbered from edge of board) | ||||||
| Mini-PCI add-on cards | N/A | |||||||
| PCI-X add-on cards | N/A | |||||||
| AGP graphics cards | N/A | |||||||
| PCI Express x1 add-on cards | N/A | |||||||
| PCI Express x2 add-on cards | N/A | |||||||
| PCI Express x4 add-on cards | N/A | |||||||
| PCI Express x8 add-on cards | N/A | |||||||
| PCI Express x16 add-on cards | N/A | |||||||
| PCI Express x32 add-on cards | N/A | |||||||
| HTX add-on cards | N/A | |||||||
| Legacy / Super I/O | ||||||||
| Floppy | Untested | |||||||
| Serial port 1 (COM1) | OK | |||||||
| Serial port 2 (COM2) | Untested | |||||||
| Parallel port | ||||||||
| PS/2 keyboard | ||||||||
| PS/2 mouse | ||||||||
| Game port | ||||||||
| Infrared | N/A | |||||||
| PC speaker | N/A | |||||||
| DiskOnChip | N/A | |||||||
| Miscellaneous | ||||||||
| Sensors / fan control | ||||||||
| Hardware watchdog | ||||||||
| SMBus | N/A | |||||||
| CAN bus | N/A | |||||||
| CPU frequency scaling | Untested | |||||||
| Other powersaving features | N/A | |||||||
| ACPI | No | There is no ACPI implementation for this board, yet. | ||||||
| Reboot | OK | |||||||
| Poweroff | No | Probably needs ACPI in order to work. | ||||||
| Suspend | Unknown | |||||||
| Nonstandard LEDs | ||||||||
| High precision event timers (HPET) | ||||||||
| Random number generator (RNG) | ||||||||
| Wake on modem ring | Untested | |||||||
| Wake on LAN | Untested | |||||||
| Wake on keyboard | Untested | |||||||
| Wake on mouse | Untested | |||||||
| Flashrom | OK | |||||||
Hardware
lspci -tvnn
-[0000:00]-+-00.0 Intel Corporation 82810E DC-133 (GMCH) Graphics Memory Controller Hub
+-01.0 Intel Corporation 82810E DC-133 (CGC) Chipset Graphics Controller
+-1e.0-[0000:01]--+-05.0 ESS Technology ES1988 Allegro-1
| +-09.0 Advanced Micro Devices [AMD] 79c978 [HomePNA]
| \-0a.0 PCTel Inc HSP MicroModem 56
+-1f.0 Intel Corporation 82801AA ISA Bridge (LPC)
+-1f.1 Intel Corporation 82801AA IDE Controller
+-1f.2 Intel Corporation 82801AA USB Controller
\-1f.3 Intel Corporation 82801AA SMBus Controller
Building coreboot
$ svn co svn://coreboot.org/repos/trunk/coreboot-v2 $ cd coreboot-v2/targets $ ./buildtarget mitac/6513wu $ cd mitac/6513wu/6513wu
Now copy your desired payload into the current directory and name it payload.elf. Then:
$ make
Finally, prepend the VGA BIOS image (32 KB) to get your final coreboot image:
$ cat vga.bin coreboot.rom > coreboot_final.rom
(replace vga.bin with the file name of your VGA BIOS image)
You can now flash the resulting coreboot_final.rom on a ROM chip using Flashrom.
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