Shuttle SN25P: Difference between revisions

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This is just a work-in-progress status page, the port is not functional yet.
== Status ==


This is just a work-in-progress status page, the port is not fully functional yet.


Linux kernel hangs in tty_io.c console_init() and as VGA is not working...
<s>
Linux kernel hangs in tty_io.c console_init() and VGA is not working...


Tried various kernels:
* from 2.6.23 to 2.6.27-rc8-git
* 32 & 64 bit versions
* gcc-4.1.2 & gcc-4.3.1
* different configs (debug, etc...)
* -0s vs -O2
The hang is apparently a kernel panic (blinking leds at ~10s interval)
but there's no message on the serial console about it.
still locking up on spin_lock_irqsave()
If I start coreboot from poweroff, it hangs in running the vga bios under
emulation
</s>
October 5th 2008: Uwe had another big contribution to this port, he advised me to get the VGA board out of the box and try without.
It worked instantly ! I could even log on the console typing blindly on the keyboard.
== Background ==


[[User:Vince|I]] started my work on [http://global.shuttle.com/product_detail.jsp?PI=89 Shuttle SN25P] motherboard by looking at [[Supported_Motherboards|supported mainboards]] page, chose a supported one that has similar hardware ([[ASUS_A8N-E_Build_Tutorial|Asus A8N-E]])
[[User:Vince|I]] started my work on [http://global.shuttle.com/product_detail.jsp?PI=89 Shuttle SN25P] motherboard by looking at [[Supported_Motherboards|supported mainboards]] page, chose a supported one that has similar hardware ([[ASUS_A8N-E_Build_Tutorial|Asus A8N-E]])
Line 9: Line 30:
[[USER:Uwe|Uwe]] told me where to start modifiying the code to adapt it to motherboard specificities, and more importantly, where to find the information to put in place.
[[USER:Uwe|Uwe]] told me where to start modifiying the code to adapt it to motherboard specificities, and more importantly, where to find the information to put in place.


== Hardware ==


----
Hardware:
* AMD K8 Northbridge
* AMD K8 Northbridge
* NVIDIA CK804 Southbridge
* NVIDIA CK804 Southbridge
Line 19: Line 37:
* AMD Opteron 165 dual core Socket 939
* AMD Opteron 165 dual core Socket 939
* 2 * 1 GB PC-3200 DDR-SDRAM
* 2 * 1 GB PC-3200 DDR-SDRAM
* [http://www.ioss.com.tw/web/English/RD1BIOSSavior.html RD1 PMC4 BIOS Savior] on PLCC socket
* PMC Pm49FL004T-33JC - spare flash chips for work and backup (in case I flash the RD1 with a non working image)
* SST 49LF004B 33-4C-NH - spare, not tested


Additionally:
== OK ==
* [http://www.ioss.com.tw/web/English/RD1BIOSSavior.html RD1 PMC4 BIOS Savior]
* PMC Pm49FL004T-33JC spare flash chips for work and backup


----
OK:
* flashrom from linux over legacy BIOS
* flashrom from linux over legacy BIOS
* Serial console
* Serial console
* Coreboot runs
* Coreboot runs
* Load & run payload (tested OK: EtherBoot, coreinfo, filo & memtest86)
* Load & run payload (tested OK: coreinfo, filo & memtest86)
* PS2 Keyboard
* Filo loads a kernel & jump to its entry point
* Filo loads a kernel & jump to its entry point
* Kernel start to boot and hang at the console handling code, right after "Detected 1800.234 MHz processor.", trying to acquire_console_sem()
* Kernel boots to multi-user
 
 
----


== NOK ==


NOK:
* VGA (not in coreboot, not in filo, not in memtest86, not in linux kernel)
* VGA (not in coreboot, not in filo, not in memtest86, not in linux kernel)
* Keyboard (idem)
* Etherboot (onboard nvidia ethernet adapter not properly configured by coreboot)
* Etherboot (onboard nvidia ethernet adapter not properly configured by coreboot)
* Network
* Network


 
== Files ==
----
 
 
Files:
* Config.lb - should be OK
* Config.lb - should be OK
* irq_tables.c - should be OK
* irq_tables.c - should be OK
Line 56: Line 63:
* get_bus_conf.c - should be OK (be careful to look for PCI busses enumeration order differences between coreboot and legacy BIOS. Don't blindly try to replicate what lspci over BIOS is telling you, look at what coreboot debug info is showing for PCI busses enumeration)
* get_bus_conf.c - should be OK (be careful to look for PCI busses enumeration order differences between coreboot and legacy BIOS. Don't blindly try to replicate what lspci over BIOS is telling you, look at what coreboot debug info is showing for PCI busses enumeration)


== Information gathering ==


----
All output from these tools are on [[Shuttle SN25P Build Tutorial/Infos]].
 


Information gathering:
* /proc/interrupts
* /proc/interrupts
* dmidecode - Flash ROM chip size
* dmidecode - Flash ROM chip size
Line 73: Line 79:
* setpci -s 0:0:1.0 84.L - infos for "Initialize interrupt mapping" in mptable.c
* setpci -s 0:0:1.0 84.L - infos for "Initialize interrupt mapping" in mptable.c


== TODO ==


----
TODO:
* Make it boot to Xorg
* Make it boot to Xorg
* Test onboard HW: SATA, CDROM, USB, Firewire, mouse, keyboard, audio, fan & temperature control
* Test onboard HW: SATA, CDROM, USB, Firewire, mouse, keyboard, audio, fan & temperature control
Line 87: Line 90:
* Other payloads
* Other payloads


== Notes ==


----
Notes:
* Linux kernel command line options:
* Linux kernel command line options:
** Used ones:
** Used ones:
Line 112: Line 112:
*** disable_8254_timer
*** disable_8254_timer
*** enable_8254_timer
*** enable_8254_timer
* PCI bus numbering is dynamic:
** do not try to hardcode the numbers
** get_bus_conf() creates a bus number map for use in mptable.c & irq_tables.c
** isa_bus is just assigned a number after the last pci-style bus

Latest revision as of 15:00, 16 November 2008

Status

This is just a work-in-progress status page, the port is not fully functional yet.

Linux kernel hangs in tty_io.c console_init() and VGA is not working...

Tried various kernels:

  • from 2.6.23 to 2.6.27-rc8-git
  • 32 & 64 bit versions
  • gcc-4.1.2 & gcc-4.3.1
  • different configs (debug, etc...)
  • -0s vs -O2

The hang is apparently a kernel panic (blinking leds at ~10s interval) but there's no message on the serial console about it. still locking up on spin_lock_irqsave()

If I start coreboot from poweroff, it hangs in running the vga bios under emulation

October 5th 2008: Uwe had another big contribution to this port, he advised me to get the VGA board out of the box and try without. It worked instantly ! I could even log on the console typing blindly on the keyboard.

Background

I started my work on Shuttle SN25P motherboard by looking at supported mainboards page, chose a supported one that has similar hardware (Asus A8N-E)

Uwe told me where to start modifiying the code to adapt it to motherboard specificities, and more importantly, where to find the information to put in place.

Hardware

  • AMD K8 Northbridge
  • NVIDIA CK804 Southbridge
  • ITE IT8712F Super I/O
  • AMD Opteron 165 dual core Socket 939
  • 2 * 1 GB PC-3200 DDR-SDRAM
  • RD1 PMC4 BIOS Savior on PLCC socket
  • PMC Pm49FL004T-33JC - spare flash chips for work and backup (in case I flash the RD1 with a non working image)
  • SST 49LF004B 33-4C-NH - spare, not tested

OK

  • flashrom from linux over legacy BIOS
  • Serial console
  • Coreboot runs
  • Load & run payload (tested OK: coreinfo, filo & memtest86)
  • PS2 Keyboard
  • Filo loads a kernel & jump to its entry point
  • Kernel boots to multi-user

NOK

  • VGA (not in coreboot, not in filo, not in memtest86, not in linux kernel)
  • Etherboot (onboard nvidia ethernet adapter not properly configured by coreboot)
  • Network

Files

  • Config.lb - should be OK
  • irq_tables.c - should be OK
  • mptable.c - should be OK, linux kernel apic=debug output is identical as with legacy BIOS
  • get_bus_conf.c - should be OK (be careful to look for PCI busses enumeration order differences between coreboot and legacy BIOS. Don't blindly try to replicate what lspci over BIOS is telling you, look at what coreboot debug info is showing for PCI busses enumeration)

Information gathering

All output from these tools are on Shuttle SN25P Build Tutorial/Infos.

  • /proc/interrupts
  • dmidecode - Flash ROM chip size
  • getpir - infos for irq_tables.c & mptable.c
  • mptable - infos for mptable.c
  • superiotool -dV - infos for Config.lb device tree
  • flashrom -V - Is your motherboard flashrom capable (northbridge + super I/O + flash chip)
  • lspci -tnvv - PCI bus tree from legacy BIOS
  • lspci -vvvxx - PCI devices informations
  • setpci -s 0:0:1.0 7c.L - infos for "Initialize interrupt mapping" in mptable.c
  • setpci -s 0:0:1.0 80.L - infos for "Initialize interrupt mapping" in mptable.c
  • setpci -s 0:0:1.0 84.L - infos for "Initialize interrupt mapping" in mptable.c

TODO

  • Make it boot to Xorg
  • Test onboard HW: SATA, CDROM, USB, Firewire, mouse, keyboard, audio, fan & temperature control
  • PCIe-x16 GFX & ethernet
  • HPET
  • ACPI
  • Etherboot for BCM - TG3 PCIe 1x addon card
  • LAB ? (may need bigger flash)
  • Other payloads

Notes

  • Linux kernel command line options:
    • Used ones:
      • apic=debug
      • acpi=off
      • debug
      • irqpoll
      • hpet=force
      • maxcpus=1
      • mem=64M
      • loglevel=8
      • console=tty0
      • console=ttyS0,115200
      • earlycon=uart8250,io,0x3f8
      • earlyprintk=serial,ttyS0,115200
    • To test:
      • noapic
      • parport=0
      • lapic
      • disable_8254_timer
      • enable_8254_timer
  • PCI bus numbering is dynamic:
    • do not try to hardcode the numbers
    • get_bus_conf() creates a bus number map for use in mptable.c & irq_tables.c
    • isa_bus is just assigned a number after the last pci-style bus