Difference between revisions of "Shuttle SN25P"

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m (PCI enumeration warning)
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* mptable.c - should be OK, linux kernel apic=debug output is identical as with legacy BIOS
 
* mptable.c - should be OK, linux kernel apic=debug output is identical as with legacy BIOS
 
* irq_tables.c - should be OK too
 
* irq_tables.c - should be OK too
* get_bus_conf.c - should be OK too
+
* get_bus_conf.c - should be OK too (be careful to look for differences in PCI busses enumeration order differences between coreboot and legacy BIOS, don't blindly try to replicate what lspci over BIOS is telling you, look at what coreboot debug info is showing for PCI busses enumeration)
  
 
Information gathering:
 
Information gathering:

Revision as of 12:36, 5 September 2008

This is just a work-in-progress status page, the port is not functional yet.


Linux kernel hangs in tty_io.c console_init() and as VGA is not working...


I started my work on Shuttle SN25P motherboard by looking at supported mainboards page, chose a supported one that has similar hardware (Asus A8N-E)

Uwe told me where to start modifiying the code to adapt it to motherboard specificities, and more importantly, where to find the information to put in place.

Hardware:

  • AMD K8 Northbridge
  • NVIDIA CK804 Southbridge
  • ITE IT8712F Super I/O
  • AMD Opteron 165 dual core Socket 939

Additionally:

OK:

  • flashrom from linux over legacy BIOS
  • Serial console
  • Coreboot runs
  • Load & run payload (tested OK: filo & memtest86)
  • Filo loads a kernel & jump to its entry point
  • Kernel start to boot and hang at the console handling code, right after "Detected 1800.234 MHz processor."

NOK:

  • VGA (not in coreboot, not in filo, not in memtest86, not in linux kernel)
  • Keyboard (idem)
  • Etherboot (onboard nvidia ethernet adapter not properly configured by coreboot)
  • Network

Files:

  • Config.lb - should be OK too
  • mptable.c - should be OK, linux kernel apic=debug output is identical as with legacy BIOS
  • irq_tables.c - should be OK too
  • get_bus_conf.c - should be OK too (be careful to look for differences in PCI busses enumeration order differences between coreboot and legacy BIOS, don't blindly try to replicate what lspci over BIOS is telling you, look at what coreboot debug info is showing for PCI busses enumeration)

Information gathering:

  • getpir - infos for irq_tables.c & mptable.c
  • mptable - infos for mptable.c
  • superiotool - infos for Config.lb device tree
  • lspci -tnvv - PCI bus tree
  • lspci -vvvxx - PCI devices informations
  • setpci -s 0:0:1.0 7c.L - infos for "Initialize interrupt mapping" in mptable.c
  • setpci -s 0:0:1.0 80.L - infos for "Initialize interrupt mapping" in mptable.c
  • setpci -s 0:0:1.0 84.L - infos for "Initialize interrupt mapping" in mptable.c

TODO:

  • Make it boot to Xorg
  • Test onboard HW: SATA, CDROM, USB, Firewire, mouse, keyboard, audio, fan & temperature control
  • PCIe GFX & ethernet
  • HPET
  • ACPI
  • Etherboot for BCM - TG3 PCIe 1x addon card
  • LAB ? (may need bigger flash)
  • Other payloads

Notes:

  • Linux kernel command line options:
    • Used ones:
      • apic=debug
      • acpi=off
      • console=tty0
      • console=ttyS0,115200
      • earlycon=uart8250,io,0x3f8
      • debug
      • earlyprintk=serial,ttyS0,115200
      • loglevel=8
      • irqpoll
    • To test:
      • maxcpus=1
      • mem=256M
      • noapic
      • parport=0
      • hpet=
      • lapic
      • disable_8254_timer
      • enable_8254_timer