Difference between revisions of "Supermicro X7DB8+"

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(Add SPD Traffic */)
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−
== General Information ==
+
= General Information =
 
[http://supermicro.com/products/motherboard/Xeon1333/5000P/X7DB8+.cfm Supermicro Product Page]
 
[http://supermicro.com/products/motherboard/Xeon1333/5000P/X7DB8+.cfm Supermicro Product Page]
  
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'''Note''': There's no support code committed in coreboot yet. If you want help porting coreboot to this board, contact [mailto:svens-x7db8@stackframe.org Sven Schnelle]. You may download a patch to play with here: [http://eisenschwein.bitebene.org/x7db8.diff]
 
'''Note''': There's no support code committed in coreboot yet. If you want help porting coreboot to this board, contact [mailto:svens-x7db8@stackframe.org Sven Schnelle]. You may download a patch to play with here: [http://eisenschwein.bitebene.org/x7db8.diff]
  
−
== Status ==
+
= Status =
 
{{Status|
 
{{Status|
  
Line 85: Line 85:
  
 
}}
 
}}
 +
 +
= Information useful to coreboot Hackers =
 +
== SPD Traffic (captured from original Phoenix TrustedCore[TM] Bios ==
 +
S20XP
 +
S22XP
 +
S24XP
 +
S26XP
 +
SA0_02_SA1_09XP
 +
SA0_03_SA1_12XP
 +
SA0_51_SA1_02XP
 +
SA0_0B_SA1_0CXP
 +
SA0_0A_SA1_04XP
 +
SA2XP
 +
SA4XP
 +
SA6XP
 +
SA0_73_SA1_7FXP
 +
SA0_74_SA1_B3XP
 +
 +
/* Read AMB Vendor/Device ID */
 +
SB0_80_00_P
 +
SB0_00_00_P
 +
SB0_00_00_P
 +
SB0_40_00_P
 +
SB0_80_SB1_01XP
 +
SB0_00_SB1_04XP
 +
SB0_00_SB1_82XP
 +
SB0_00_SB1_11XP
 +
SB0_40_SB1_1DXP
 +
 +
/* Read AMB Revision */
 +
SB0_80_00_P
 +
SB0_00_00_P
 +
SB0_00_00_P
 +
SB0_40_08_P
 +
SB0_80_SB1_01XP
 +
SB0_00_SB1_05XP
 +
SB0_00_SB1_00XP
 +
SB0_00_SB1_00XP
 +
SB0_40_SB1_21XP
 +
 
 +
 +
SA0_04_SA1_44XP
 +
SA0_07_SA1_11XP
 +
SA0_1D_SA1_03XP
 +
SA0_1E_SA1_07XP
 +
SA0_4F_SA1_22XP
 +
SA0_4E_SA1_00XP
 +
SA0_4B_SA1_00XP
 +
SA0_4C_SA1_00XP
 +
SA0_4D_SA1_00XP
 +
 +
SB0_8C_00_P
 +
SB0_0C_01_P
 +
SB0_0C_00_P
 +
SB0_0C_54_P
 +
SB0_0C_00_P /* Reserverd */
 +
SB0_0C_02_P /* LINKPARNXT: FBD Link frequency: 667MHz */
 +
SB0_0C_09_P /* FBDNBCFGNXT: Regular current. Resync mode */
 +
SB0_4C_09_P /* FBDSBCFGNXT: Regular current, Resync mode */
 +
 +
SB0_88_00_P
 +
SB0_08_01_P
 +
SB0_08_00_P
 +
SB0_08_68_P /* Write FBDLOCKTO Register */
 +
SB0_08_16_P /* 14bit Northbound link */
 +
SB0_48_51_P
 +
 +
/* Read Personality Bytes */
 +
SA0_65_SA1_00XP
 +
SA0_66_SA1_E2XP
 +
SA0_67_SA1_62XP
 +
SA0_68_SA1_20XP
 +
SA0_69_SA1_80XP
 +
SA0_6A_SA1_9CXP
 +
SA0_6B_SA1_00XP
 +
SA0_6C_SA1_00XP
 +
SA0_6D_SA1_F0XP
 +
SA0_6E_SA1_70XP
 +
SA0_6F_SA1_60XP
 +
SA0_70_SA1_60XP
 +
SA0_71_SA1_60XP
 +
SA0_72_SA1_60XP
 +
 +
/* Write AMB Personality */
 +
SB0_8C_00_P
 +
SB0_0C_01_P
 +
SB0_0C_00_P
 +
SB0_0C_B0_P
 +
SB0_0C_20_P
 +
SB0_0C_62_P
 +
SB0_0C_E2_P
 +
SB0_4C_00_P
 +
 +
SB0_88_00_P
 +
SB0_08_01_P
 +
SB0_08_00_P
 +
SB0_08_B4_P
 +
SB0_08_9C_P
 +
SB0_48_80_P
 +
 +
SA0_55_SA1_34XP /* CMD2DATANXT? */
 +
SA0_0D_SA1_33XP /* CAS Latencies supported */
 +
SA0_0E_SA1_3CXP /* TCASMIN? */
 +
SA0_13_SA1_3CXP /* FBDIMM TRCD */
 +
 +
/* Write CMD2DATANXT */
 +
SB0_84_00_P
 +
SB0_04_01_P
 +
SB0_04_00_P
 +
SB0_04_E8_P
 +
SB0_44_34_P
 +
 +
/* Write DRC (Dram Controller Register) */
 +
SB0_84_00_P
 +
SB0_04_03_P
 +
SB0_04_00_P
 +
SB0_04_7C_P
 +
SB0_44_45_P
 +
 +
/* Write FBDSBCFGNXT (FBD SB Link Electrical Configuration) */
 +
 +
SB0_8C_00_P
 +
SB0_0C_01_P
 +
SB0_0C_00_P
 +
SB0_0C_54_P
 +
SB0_0C_00_P /* Reserved */
 +
SB0_0C_02_P /* LINKPARNXT: FBD Link frequency: 667MHz */
 +
SB0_0C_0B_P /* FBDNBCFGNXT: FBD NB Link Electrical Configuration: Regular drive, 3.5db DEEMP, Resync mode */
 +
SB0_4C_1B_P /* FBDSBCFGNXT: FBD SB Link Electrical Configuration: Small drive, 3.5db DEEMP, Resync mode */
 +
 +
SA0_0F_SA1_42XP
 +
SA0_10_SA1_3CXP
 +
SA0_14_SA1_1EXP
 +
SA0_15_SA1_3CXP
 +
SA0_16_SA1_00XP
 +
SA0_17_SA1_B4XP
 +
SA0_18_SA1_F0XP
 +
SA0_19_SA1_A4XP
 +
SA0_1A_SA1_01XP
 +
SA0_1B_SA1_1EXP
 +
SA0_1C_SA1_1EXP
 +
SA0_53_SA1_10XP
 +
SA0_62_SA1_1FXP
 +
SA0_20_SA1_C2XP
 +
SA0_57_SA1_2AXP
 +
SA0_58_SA1_56XP
 +
SA0_59_SA1_6BXP
 +
SA0_5B_SA1_91XP
 +
SA0_5C_SA1_76XP
 +
SA0_22_SA1_49XP
 +
SA0_23_SA1_1EXP
 +
SA0_24_SA1_0EXP
 +
SA0_26_SA1_17XP
 +
SA0_27_SA1_3BXP
 +
SA0_28_SA1_1CXP
 +
SA0_21_SA1_5FXP
 +
SA0_63_SA1_0AXP
 +
SA0_5E_SA1_00XP
 +
SA0_5F_SA1_00XP
 +
SA0_60_SA1_00XP
 +
SA0_61_SA1_00XP

Revision as of 17:16, 8 February 2009

Contents

General Information

Supermicro Product Page


Note: There's no support code committed in coreboot yet. If you want help porting coreboot to this board, contact Sven Schnelle. You may download a patch to play with here: [1]

Status

Device/functionality Status Comments
CPU
CPU works OK
L1 cache enabled OK
L2 cache enabled OK
L3 cache enabled N/A
Multiple CPU support TODO
Multi-core support TODO
Hardware virtualization TODO
RAM
EDO N/A
SDRAM N/A
SO-DIMM N/A
DDR N/A
DDR2 WIP Uses DDR2 FBDIMM
DDR3 N/A
Dual channel support WIP
ECC support WIP
On-board Hardware
On-board IDE 3.5" TODO
On-board IDE 2.5" TODO
On-board SATA TODO
On-board SCSI TODO
On-board USB TODO
On-board VGA TODO
On-board ethernet TODO
On-board audio N/A
On-board modem N/A
On-board FireWire N/A
On-board smartcard reader N/A
On-board CompactFlash N/A
On-board PCMCIA N/A
Add-on slots/cards
ISA add-on cards N/A
Audio/Modem-Riser (AMR/CNR) cards N/A
PCI add-on cards TODO
Mini-PCI add-on cards N/A
PCI-X add-on cards Unknown
AGP graphics cards N/A
PCI Express x1 add-on cards N/A
PCI Express x2 add-on cards N/A
PCI Express x4 add-on cards N/A
PCI Express x8 add-on cards TODO
PCI Express x16 add-on cards N/A
PCI Express x32 add-on cards N/A
HTX add-on cards N/A
Legacy / Super I/O
Floppy Untested
Serial port 1 (COM1) OK
Serial port 2 (COM2) N/A
Parallel port Untested
PS/2 keyboard TODO
PS/2 mouse TODO
Game port N/A
Infrared N/A
PC speaker Untested
DiskOnChip N/A
Miscellaneous
Sensors / fan control TODO
Hardware watchdog TODO
SMBus Unknown
CAN bus N/A
CPU frequency scaling TODO
Other powersaving features N/A
ACPI TODO
Reboot TODO
Poweroff TODO
Suspend Unknown
Nonstandard LEDs N/A
High precision event timers (HPET) Untested
Random number generator (RNG) N/A
Wake on modem ring TODO
Wake on LAN TODO
Wake on keyboard TODO
Wake on mouse TODO
Flashrom OK

Information useful to coreboot Hackers

SPD Traffic (captured from original Phoenix TrustedCore[TM] Bios 

S20XP
S22XP
S24XP
S26XP
SA0_02_SA1_09XP
SA0_03_SA1_12XP
SA0_51_SA1_02XP
SA0_0B_SA1_0CXP
SA0_0A_SA1_04XP
SA2XP
SA4XP
SA6XP
SA0_73_SA1_7FXP
SA0_74_SA1_B3XP

/* Read AMB Vendor/Device ID */
SB0_80_00_P
SB0_00_00_P
SB0_00_00_P
SB0_40_00_P
SB0_80_SB1_01XP
SB0_00_SB1_04XP
SB0_00_SB1_82XP
SB0_00_SB1_11XP
SB0_40_SB1_1DXP

/* Read AMB Revision */
SB0_80_00_P
SB0_00_00_P
SB0_00_00_P
SB0_40_08_P
SB0_80_SB1_01XP
SB0_00_SB1_05XP
SB0_00_SB1_00XP
SB0_00_SB1_00XP
SB0_40_SB1_21XP
 

SA0_04_SA1_44XP
SA0_07_SA1_11XP
SA0_1D_SA1_03XP
SA0_1E_SA1_07XP
SA0_4F_SA1_22XP
SA0_4E_SA1_00XP
SA0_4B_SA1_00XP
SA0_4C_SA1_00XP
SA0_4D_SA1_00XP

SB0_8C_00_P
SB0_0C_01_P
SB0_0C_00_P
SB0_0C_54_P
SB0_0C_00_P /* Reserverd */
SB0_0C_02_P /* LINKPARNXT: FBD Link frequency: 667MHz */
SB0_0C_09_P /* FBDNBCFGNXT: Regular current. Resync mode */
SB0_4C_09_P /* FBDSBCFGNXT: Regular current, Resync mode */

SB0_88_00_P
SB0_08_01_P
SB0_08_00_P
SB0_08_68_P /* Write FBDLOCKTO Register */
SB0_08_16_P /* 14bit Northbound link */
SB0_48_51_P

/* Read Personality Bytes */
SA0_65_SA1_00XP
SA0_66_SA1_E2XP
SA0_67_SA1_62XP
SA0_68_SA1_20XP
SA0_69_SA1_80XP
SA0_6A_SA1_9CXP
SA0_6B_SA1_00XP
SA0_6C_SA1_00XP
SA0_6D_SA1_F0XP
SA0_6E_SA1_70XP
SA0_6F_SA1_60XP
SA0_70_SA1_60XP
SA0_71_SA1_60XP
SA0_72_SA1_60XP

/* Write AMB Personality */
SB0_8C_00_P
SB0_0C_01_P
SB0_0C_00_P
SB0_0C_B0_P
SB0_0C_20_P
SB0_0C_62_P
SB0_0C_E2_P
SB0_4C_00_P

SB0_88_00_P
SB0_08_01_P
SB0_08_00_P
SB0_08_B4_P
SB0_08_9C_P
SB0_48_80_P

SA0_55_SA1_34XP /* CMD2DATANXT? */
SA0_0D_SA1_33XP /* CAS Latencies supported */
SA0_0E_SA1_3CXP /* TCASMIN? */
SA0_13_SA1_3CXP /* FBDIMM TRCD */

/* Write CMD2DATANXT */
SB0_84_00_P
SB0_04_01_P
SB0_04_00_P
SB0_04_E8_P
SB0_44_34_P

/* Write DRC (Dram Controller Register) */
SB0_84_00_P
SB0_04_03_P
SB0_04_00_P
SB0_04_7C_P
SB0_44_45_P

/* Write FBDSBCFGNXT (FBD SB Link Electrical Configuration) */

SB0_8C_00_P
SB0_0C_01_P
SB0_0C_00_P
SB0_0C_54_P
SB0_0C_00_P /* Reserved */
SB0_0C_02_P /* LINKPARNXT: FBD Link frequency: 667MHz */
SB0_0C_0B_P /* FBDNBCFGNXT: FBD NB Link Electrical Configuration: Regular drive, 3.5db DEEMP, Resync mode */
SB0_4C_1B_P /* FBDSBCFGNXT: FBD SB Link Electrical Configuration: Small drive, 3.5db DEEMP, Resync mode */

SA0_0F_SA1_42XP
SA0_10_SA1_3CXP
SA0_14_SA1_1EXP
SA0_15_SA1_3CXP
SA0_16_SA1_00XP
SA0_17_SA1_B4XP
SA0_18_SA1_F0XP
SA0_19_SA1_A4XP
SA0_1A_SA1_01XP
SA0_1B_SA1_1EXP
SA0_1C_SA1_1EXP
SA0_53_SA1_10XP
SA0_62_SA1_1FXP
SA0_20_SA1_C2XP
SA0_57_SA1_2AXP
SA0_58_SA1_56XP
SA0_59_SA1_6BXP
SA0_5B_SA1_91XP
SA0_5C_SA1_76XP
SA0_22_SA1_49XP
SA0_23_SA1_1EXP
SA0_24_SA1_0EXP
SA0_26_SA1_17XP
SA0_27_SA1_3BXP
SA0_28_SA1_1CXP
SA0_21_SA1_5FXP
SA0_63_SA1_0AXP
SA0_5E_SA1_00XP
SA0_5F_SA1_00XP
SA0_60_SA1_00XP
SA0_61_SA1_00XP
Retrieved from "http://www.coreboot.org/index.php?title=Supermicro_X7DB8%2B&oldid=7967"
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