Supported Chipsets and Devices: Difference between revisions
(Correct me if I'm wrong, but the "iW-RainboW-G6" board uses the Intel US15W, so it's supported, right??) |
|||
(27 intermediate revisions by 10 users not shown) | |||
Line 1: | Line 1: | ||
'''coreboot | '''coreboot v4''' is the current stable coreboot tree recommended for productive use and for porting new boards. | ||
* If a device is not supported by coreboot | * If a device is not supported by coreboot v4, try [[Supported_Chipsets_and_Devices#Devices_supported_in_coreboot_v1|checking coreboot v1]] or [[Supported_Chipsets_and_Devices#Devices_supported_in_coreboot_v3|coreboot v3]] for support. | ||
* | * In general it is '''not''' recommended to use coreboot v3 — this was an experimental development tree which is gradually being merged into v4. | ||
* Also, coreboot v1 should be avoided (if | * Also, coreboot v1 should be avoided (if v4 can be used instead for your board), as it has been unmaintained for a long time. However, it is definitely desirable to port boards from v1 to v4 whereever possible. | ||
See also [[Supported Motherboards]]. | See also [[Supported Motherboards]]. | ||
== Devices supported in coreboot | == Devices supported in coreboot v4 == | ||
{| border="0" valign="top" | {| border="0" valign="top" | ||
Line 21: | Line 21: | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| AMD | | AMD | ||
| | | Fam14h - G-Series | ||
| style="background:lime" | OK | |||
|- bgcolor="#eeeeee" valign="top" | |||
| AMD | |||
| Fam12h - Llano | |||
| style="background:lime" | OK | |||
|- bgcolor="#eeeeee" valign="top" | |||
| AMD | |||
| Fam10h | |||
| style="background:lime" | OK<sup>16</sup> | | style="background:lime" | OK<sup>16</sup> | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
Line 41: | Line 49: | ||
|- bgcolor="#dddddd" valign="top" | |- bgcolor="#dddddd" valign="top" | ||
| Intel® | | Intel® | ||
| E7501 | | E7501 | ||
| style="background:#eeeeee" | ? | | style="background:#eeeeee" | ? | ||
|- bgcolor="# | |- bgcolor="#dddddd" valign="top" | ||
| Intel® | | Intel® | ||
| E7520 | | E7520 | ||
| style="background:#eeeeee" | ? | | style="background:#eeeeee" | ? | ||
|- bgcolor="# | |- bgcolor="#dddddd" valign="top" | ||
| Intel® | | Intel® | ||
| E7525 | | E7525 | ||
| style="background:#eeeeee" | ? | | style="background:#eeeeee" | ? | ||
|- bgcolor="# | |- bgcolor="#dddddd" valign="top" | ||
| Intel® | | Intel® | ||
| 3100 | | 3100 | ||
| style="background:lime" | OK | | style="background:lime" | OK | ||
|- bgcolor="# | |- bgcolor="#dddddd" valign="top" | ||
| Intel® | |||
| 5000P | |||
| style="background:lime" | OK | |||
|- bgcolor="#dddddd" valign="top" | |||
| Intel® | | Intel® | ||
| 82443BX (440BX) | | 82443BX (440BX) | ||
| style="background: | | style="background:lime" | OK | ||
|- bgcolor="# | |- bgcolor="#dddddd" valign="top" | ||
| Intel® | | Intel® | ||
| 82810 | | 82810 | ||
| style="background:yellow" | WIP<sup>9</sup> | | style="background:yellow" | WIP<sup>9</sup> | ||
|- bgcolor="# | |- bgcolor="#dddddd" valign="top" | ||
| Intel® | | Intel® | ||
| 82830 | | 82830 | ||
| style="background:lime" | OK | | style="background:lime" | OK | ||
|- bgcolor="# | |- bgcolor="#dddddd" valign="top" | ||
| Intel® | | Intel® | ||
| | | 82855 | ||
| style="background:yellow | | style="background:yellow" | WIP | ||
|- bgcolor="#dddddd" valign="top" | |||
|- bgcolor="# | |||
| Intel® | | Intel® | ||
| EP80579 (Tolapai) | | EP80579 (Tolapai) | ||
| style="background:lime" | OK | | style="background:lime" | OK | ||
|- bgcolor="# | |- bgcolor="#dddddd" valign="top" | ||
| Intel® | | Intel® | ||
| 945 | | 945 | ||
| style="background:lime" | OK | | style="background:lime" | OK | ||
|- bgcolor="#dddddd" valign="top" | |- bgcolor="#dddddd" valign="top" | ||
| | | Intel® | ||
| | | SCH US15W (Poulsbo) | ||
| style="background: | | style="background:lime" | OK | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
Line 123: | Line 121: | ||
| VIA | | VIA | ||
| CN400 | | CN400 | ||
| ? | |||
|- bgcolor="#dddddd" valign="top" | |- bgcolor="#dddddd" valign="top" | ||
| VIA | | VIA | ||
Line 185: | Line 183: | ||
| SB600 | | SB600 | ||
| style="background: lime " | OK | | style="background: lime " | OK | ||
|- bgcolor="#eeeeee" valign="top" | |||
| AMD | |||
| RS780/RS785 | |||
| style="background: lime " | OK | |||
|- bgcolor="#eeeeee" valign="top" | |||
| AMD | |||
| SB700/SB7x0 | |||
| style="background: lime " | OK | |||
|- bgcolor="#eeeeee" valign="top" | |||
| AMD | |||
| SR56x0 | |||
| style="background: lime " | OK | |||
|- bgcolor="#eeeeee" valign="top" | |||
| AMD | |||
| SB5100 | |||
| style="background: lime " | OK | |||
|- bgcolor="#eeeeee" valign="top" | |||
| AMD | |||
| SB800 | |||
| style="background: lime " | OK | |||
|- bgcolor="#dddddd" valign="top" | |- bgcolor="#dddddd" valign="top" | ||
| Broadcom | | Broadcom | ||
Line 210: | Line 227: | ||
| Intel® | | Intel® | ||
| 82371EB (PIIX4E) | | 82371EB (PIIX4E) | ||
| style="background: | | style="background:lime" | OK | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| Intel® | | Intel® | ||
| 82801AA/AB (ICH/ICH0) | | 82801AA/AB (ICH/ICH0) | ||
| style="background:lime" | OK | | style="background:lime" | OK | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| Intel® | | Intel® | ||
| 82801BA/BAM (ICH2/ICH2-M) | | 82801BA/BAM (ICH2/ICH2-M) | ||
| style="background:lime" | OK | | style="background:lime" | OK | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| Intel® | | Intel® | ||
| 82801CA/CAM (ICH3-S/ICH3-M) | | 82801CA/CAM (ICH3-S/ICH3-M) | ||
| style="background:lime" | OK | | style="background:lime" | OK | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| Intel® | | Intel® | ||
| 82801DB/DBL/DBM<br/>(ICH4/ICH4-L/ICH4-M) | | 82801DB/DBL/DBM<br/>(ICH4/ICH4-L/ICH4-M) | ||
| style="background:lime" | OK | | style="background:lime" | OK | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| Intel® | | Intel® | ||
| 82801EB/ER (ICH5/ICH5R) | | 82801EB/ER (ICH5/ICH5R) | ||
| style="background:lime" | OK | | style="background:lime" | OK | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| Intel® | | Intel® | ||
Line 246: | Line 263: | ||
| Intel® | | Intel® | ||
| EP80579 (Tolapai) | | EP80579 (Tolapai) | ||
| style="background:lime" | OK | |||
|- bgcolor="#eeeeee" valign="top" | |||
| Intel® | |||
| SCH US15W (Poulsbo) | |||
| style="background:lime" | OK | | style="background:lime" | OK | ||
Line 282: | Line 303: | ||
| VIA | | VIA | ||
| VT8237A | | VT8237A | ||
| style="background: | | style="background:lime" | OK | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| VIA | | VIA | ||
Line 290: | Line 311: | ||
| VIA | | VIA | ||
| VT82C686 | | VT82C686 | ||
| style="background: | | style="background:yellow" | WIP | ||
|} | |} | ||
Line 312: | Line 328: | ||
| ASUS | | ASUS | ||
| A8000 | | A8000 | ||
| style="background:lime" | <sup>12</sup>, <sup>13</sup> | | style="background:lime" | OK<sup>12</sup>, <sup>13</sup> | ||
|- bgcolor="#dddddd" valign="top" | |- bgcolor="#dddddd" valign="top" | ||
Line 318: | Line 334: | ||
| F71805F/FG | | F71805F/FG | ||
| style="background:lime" | OK | | style="background:lime" | OK | ||
|- bgcolor="#dddddd" valign="top" | |||
| Fintek | |||
| F71859 | |||
| style="background:yellow" | OK<sup>19</sup> | |||
|- bgcolor="#dddddd" valign="top" | |||
| Fintek | |||
| F71863F/FG | |||
| style="background:lime" | OK | |||
|- bgcolor="#dddddd" valign="top" | |||
| Fintek | |||
| F71872F/FG | |||
| style="background:lime" | OK | |||
|- bgcolor="#dddddd" valign="top" | |||
| Fintek | |||
| F71889 | |||
| style="background:lime" | OK | |||
|- bgcolor="#dddddd" valign="top" | |||
| Fintek | |||
| F81865F | |||
| style="background:yellow" | WIP | |||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| ITE | | ITE | ||
| IT8661F | | IT8661F | ||
| style="background:yellow" | OK <sup> | | style="background:yellow" | OK<sup>5</sup> | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| ITE | | ITE | ||
| IT8671F | | IT8671F | ||
| style="background: | | style="background:lime" | OK | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| ITE | | ITE | ||
| IT8673F | | IT8673F | ||
| style="background:yellow" | OK <sup> | | style="background:yellow" | OK<sup>5</sup> | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| ITE | | ITE | ||
| IT8705F | | IT8705F | ||
| style="background:yellow" | OK <sup> | | style="background:yellow" | OK<sup>5</sup> | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| ITE | | ITE | ||
| IT8712F | | IT8712F | ||
| style="background:lime" | OK | | style="background:lime" | OK | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| ITE | | ITE | ||
Line 346: | Line 382: | ||
| ITE | | ITE | ||
| IT8718F | | IT8718F | ||
| style="background:yellow" | OK <sup> | | style="background:yellow" | OK<sup>5</sup> | ||
|- bgcolor="#dddddd" valign="top" | |- bgcolor="#dddddd" valign="top" | ||
| Intel® | | Intel® | ||
| 3100 | | 3100 | ||
| style="background:lime" | OK <sup>15</sup> | | style="background:lime" | OK<sup>15</sup> | ||
|- bgcolor="#dddddd" valign="top" | |- bgcolor="#dddddd" valign="top" | ||
| Intel® | | Intel® | ||
| EP80579 (Tolapai) | | EP80579 (Tolapai) | ||
| style="background:lime" | OK <sup>15</sup> | | style="background:lime" | OK<sup>15</sup> | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
Line 364: | Line 400: | ||
| NSC | | NSC | ||
| PC87309 | | PC87309 | ||
| style="background:yellow" | OK <sup>5</sup> | | style="background:yellow" | OK<sup>5</sup> | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| NSC | | NSC | ||
Line 377: | Line 413: | ||
| PC87366 | | PC87366 | ||
| style="background:#eeeeee" | ? | | style="background:#eeeeee" | ? | ||
|- bgcolor="#eeeeee" valign="top" | |||
| NSC | |||
| PC87382 | |||
| style="background:lime" | OK | |||
|- bgcolor="#eeeeee" valign="top" | |||
| NSC | |||
| PC87384 | |||
| style="background:lime" | OK | |||
|- bgcolor="#eeeeee" valign="top" | |||
| NSC | |||
| PC87392 | |||
| style="background:lime" | OK | |||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| NSC | | NSC | ||
Line 422: | Line 470: | ||
| SMSC® | | SMSC® | ||
| FDC37M60x | | FDC37M60x | ||
| style="background:lime" | OK | | style="background:lime" | OK<sup>12</sup> | ||
|- bgcolor="#dddddd" valign="top" | |- bgcolor="#dddddd" valign="top" | ||
| SMSC® | | SMSC® | ||
| LPC47B27x | | LPC47B27x | ||
| style="background:lime" | OK | | style="background:lime" | OK<sup>12</sup> | ||
|- bgcolor="#dddddd" valign="top" | |- bgcolor="#dddddd" valign="top" | ||
| SMSC® | | SMSC® | ||
Line 484: | Line 532: | ||
| Winbond™ | | Winbond™ | ||
| W83627EHG/HF/EHF/THF | | W83627EHG/HF/EHF/THF | ||
| style="background: | | style="background:lime" | OK | ||
|- bgcolor="#dddddd" valign="top" | |- bgcolor="#dddddd" valign="top" | ||
| Winbond™ | | Winbond™ | ||
| W83697HF/HG | | W83697HF/HG | ||
| | | style="background:lime" | OK | ||
|- bgcolor="#dddddd" valign="top" | |- bgcolor="#dddddd" valign="top" | ||
| Winbond™ | | Winbond™ | ||
| W83627THF | | W83627THF/THG | ||
| style="background: | | style="background:lime" | OK | ||
|- bgcolor="#dddddd" valign="top" | |- bgcolor="#dddddd" valign="top" | ||
| Winbond™ | | Winbond™ | ||
Line 533: | Line 577: | ||
| VIA | | VIA | ||
| style="background:lime" | OK | | style="background:lime" | OK | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| Emulated | | Emulated | ||
Line 570: | Line 598: | ||
| Intel® | | Intel® | ||
| EP80579 (Tolapai) | | EP80579 (Tolapai) | ||
| style="background: | | style="background: yellow" | OK<sup>20</sup> | ||
|} | |} | ||
Line 576: | Line 604: | ||
<small> | <small> | ||
<sup>4</sup> The W83977EF works fine with the W83977TF code (the pre-RAM serial part at least).<br /> | <sup>4</sup> The W83977EF works fine with the W83977TF code (the pre-RAM serial part at least).<br /> | ||
<sup>5</sup> Pre-RAM serial output works fine, but nothing else, yet.<br /> | <sup>5</sup> Pre-RAM serial output works fine, but nothing else, yet.<br /> | ||
<sup>9</sup> Works mostly, but currently there are some limitations as to which RAM DIMMs can be used.<br /> | <sup>9</sup> Works mostly, but currently there are some limitations as to which RAM DIMMs can be used.<br /> | ||
<sup>12</sup> All these Super I/O chips should be supported by the "smscsuperio" driver. Only the ASUS A8000 is tested, though. The floppy disk controller, the parallel port, the serial ports (COM1 + COM2), and the keyboard should work for all chips. More advanced stuff may need more work, though.<br /> | <sup>12</sup> All these Super I/O chips should be supported by the "smscsuperio" driver. Only the ASUS A8000 is tested, though. The floppy disk controller, the parallel port, the serial ports (COM1 + COM2), and the keyboard should work for all chips. More advanced stuff may need more work, though.<br /> | ||
<sup>13</sup> The ASUS A8000 Super I/O seems to be a rebranded SMSC DME1737.<br /> | <sup>13</sup> The ASUS A8000 Super I/O seems to be a rebranded SMSC DME1737.<br /> | ||
<sup>14</sup> Working, but not widely tested, yet. Works with single DIMM DDR2.<br /> | <sup>14</sup> Working, but not widely tested, yet. Works with single DIMM DDR2.<br /> | ||
<sup>15</sup> The Intel 3100/EP80579 UARTs and watchdog timer are integrated as a Super I/O-like device; only the UARTs have been tested so far.<br /> | <sup>15</sup> The Intel 3100/EP80579 UARTs and watchdog timer are integrated as a Super I/O-like device; only the UARTs have been tested so far.<br /> | ||
<sup>16</sup> | <sup>16</sup> Two implementations: Rev B-C supported in coreboot, Rev D-E support via AGESA<br /> | ||
<sup>17</sup> MCP55 and CK804 are supported, but no open documents are available from NVIDIA.<br /> | <sup>17</sup> MCP55 and CK804 are supported, but no open documents are available from NVIDIA.<br /> | ||
<sup>18</sup> Partially supported, but not all features implemented. | <sup>18</sup> Partially supported, but not all features implemented.<br /> | ||
<sup>19</sup> Only support for serial port 1 implemented, everything else is unsupported so far due to lack of datasheet.<br /> | |||
<sup>20</sup> Working, but not widely tested, yet. Works with single DIMM DDR2.<br /> | |||
</small> | </small> | ||
== Devices supported in coreboot v3 == | == Devices supported in coreboot v3 == | ||
<div style="color: #ff0000">coreboot v3 was an experimental development tree of coreboot which should not be used anymore (there are only very few exceptions)! Most features from v3 are gradually being merged | <div style="color: #ff0000">coreboot v3 was an experimental development tree of coreboot which should not be used anymore (there are only very few exceptions)! Most features from v3 are gradually being merged into v4.</div> | ||
{| border="0" valign="top" | {| border="0" valign="top" | ||
Line 776: | Line 798: | ||
== Devices supported in coreboot v1 == | == Devices supported in coreboot v1 == | ||
Not all devices have been ported from coreboot v1 to coreboot | Not all devices have been ported from coreboot v1 to coreboot v4, yet (check "v4?" field). If you want to work on such a port contact us on the [[Mailinglist|mailing list]]. | ||
{| border="0" valign="top" | {| border="0" valign="top" | ||
Line 788: | Line 810: | ||
! align="left" | Northbridge | ! align="left" | Northbridge | ||
! align="left" | Status | ! align="left" | Status | ||
! align="left" | | ! align="left" | v4? | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
Line 799: | Line 821: | ||
| Tsunami | | Tsunami | ||
| style="background:#dddddd" | ? | | style="background:#dddddd" | ? | ||
| style="background: | | style="background:#dddddd" | —<sup>3</sup> | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| AMD | | AMD | ||
Line 814: | Line 836: | ||
| 440BX | | 440BX | ||
| style="background:#dddddd" | ? | | style="background:#dddddd" | ? | ||
| style="background: | | style="background:lime" | Yes | ||
|- bgcolor="#dddddd" valign="top" | |- bgcolor="#dddddd" valign="top" | ||
| Intel® | | Intel® | ||
Line 829: | Line 851: | ||
| 82830 | | 82830 | ||
| style="background:#dddddd" | ? | | style="background:#dddddd" | ? | ||
| style="background: | | style="background:lime" | Yes | ||
|- bgcolor="#dddddd" valign="top" | |- bgcolor="#dddddd" valign="top" | ||
| Intel® | | Intel® | ||
Line 859: | Line 881: | ||
| MPC107 | | MPC107 | ||
| style="background:#dddddd" | ? | | style="background:#dddddd" | ? | ||
| style="background: | | style="background:#dddddd" | —<sup>3</sup> | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| NSC/AMD | | NSC/AMD | ||
Line 891: | Line 913: | ||
! align="left" | Southbridge | ! align="left" | Southbridge | ||
! align="left" | Status | ! align="left" | Status | ||
! align="left" | | ! align="left" | v4? | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
Line 962: | Line 984: | ||
| VT82C686 | | VT82C686 | ||
| style="background:#eeeeee" | ? | | style="background:#eeeeee" | ? | ||
| style="background: | | style="background:yellow" | WIP<sup>2</sup> | ||
|- bgcolor="#dddddd" valign="top" | |- bgcolor="#dddddd" valign="top" | ||
| Winbond™ | | Winbond™ | ||
| W83C553 | | W83C553 | ||
| style="background:#dddddd" | ? | | style="background:#dddddd" | ? | ||
| style="background: | | style="background:#dddddd" | —<sup>3</sup> | ||
|} | |} | ||
Line 979: | Line 1,001: | ||
! align="left" | Super I/O | ! align="left" | Super I/O | ||
! align="left" | Status | ! align="left" | Status | ||
! align="left" | | ! align="left" | v4? | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
Line 1,060: | Line 1,082: | ||
| VT82C686 | | VT82C686 | ||
| style="background:#dddddd" | ? | | style="background:#dddddd" | ? | ||
| style="background:yellow" | | | style="background:yellow" | WIP<sup>2</sup> | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| Winbond™ | | Winbond™ | ||
Line 1,087: | Line 1,109: | ||
! align="left" | North/South | ! align="left" | North/South | ||
! align="left" | Status | ! align="left" | Status | ||
! align="left" | | ! align="left" | v4? | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
Line 1,138: | Line 1,160: | ||
! align="left" | CPU | ! align="left" | CPU | ||
! align="left" | Status | ! align="left" | Status | ||
! align="left" | | ! align="left" | v4? | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
Line 1,144: | Line 1,166: | ||
| EV6 | | EV6 | ||
| style="background:#eeeeee" | ? | | style="background:#eeeeee" | ? | ||
| style="background: | | style="background:#eeeeee" | —<sup>3</sup> | ||
|- bgcolor="#dddddd" valign="top" | |- bgcolor="#dddddd" valign="top" | ||
| PowerPC | | PowerPC | ||
| ? | | ? | ||
| style="background:#dddddd" | ? | | style="background:#dddddd" | ? | ||
| style="background: | | style="background:#dddddd" | —<sup>3</sup> | ||
|- bgcolor="#eeeeee" valign="top" | |- bgcolor="#eeeeee" valign="top" | ||
| x86 | | x86 | ||
Line 1,170: | Line 1,192: | ||
<small> | <small> | ||
<sup>1</sup> The W83977EF works fine with the W83977TF code in coreboot | <sup>1</sup> The W83977EF works fine with the W83977TF code in coreboot v4 (the pre-RAM serial part at least).<br /> | ||
<sup>2</sup> Pre-RAM serial output works in coreboot | <sup>2</sup> Pre-RAM serial output works in coreboot v4, but the rest is not supported, yet.<br /> | ||
<sup>3</sup> | <sup>3</sup> Will not be ported anytime soon, we focus on x86 in coreboot v4.<br /> | ||
</small> | </small> | ||
__FORCETOC__ | __FORCETOC__ |
Revision as of 10:14, 28 September 2012
coreboot v4 is the current stable coreboot tree recommended for productive use and for porting new boards.
- If a device is not supported by coreboot v4, try checking coreboot v1 or coreboot v3 for support.
- In general it is not recommended to use coreboot v3 — this was an experimental development tree which is gradually being merged into v4.
- Also, coreboot v1 should be avoided (if v4 can be used instead for your board), as it has been unmaintained for a long time. However, it is definitely desirable to port boards from v1 to v4 whereever possible.
See also Supported Motherboards.
Devices supported in coreboot v4
Northbridges
|
Southbridges
|
Super I/Os
|
CPUs
SOCs
|
4 The W83977EF works fine with the W83977TF code (the pre-RAM serial part at least).
5 Pre-RAM serial output works fine, but nothing else, yet.
9 Works mostly, but currently there are some limitations as to which RAM DIMMs can be used.
12 All these Super I/O chips should be supported by the "smscsuperio" driver. Only the ASUS A8000 is tested, though. The floppy disk controller, the parallel port, the serial ports (COM1 + COM2), and the keyboard should work for all chips. More advanced stuff may need more work, though.
13 The ASUS A8000 Super I/O seems to be a rebranded SMSC DME1737.
14 Working, but not widely tested, yet. Works with single DIMM DDR2.
15 The Intel 3100/EP80579 UARTs and watchdog timer are integrated as a Super I/O-like device; only the UARTs have been tested so far.
16 Two implementations: Rev B-C supported in coreboot, Rev D-E support via AGESA
17 MCP55 and CK804 are supported, but no open documents are available from NVIDIA.
18 Partially supported, but not all features implemented.
19 Only support for serial port 1 implemented, everything else is unsupported so far due to lack of datasheet.
20 Working, but not widely tested, yet. Works with single DIMM DDR2.
Devices supported in coreboot v3
Northbridges
|
Southbridges
|
Super I/Os
|
CPUs
|
1 MCP55 and CK804 are supported, but no open documents are available from NVIDIA.
Devices supported in coreboot v1
Not all devices have been ported from coreboot v1 to coreboot v4, yet (check "v4?" field). If you want to work on such a port contact us on the mailing list.
Northbridges
|
Southbridges
|
Super I/Os
|
North-/Southbridges
CPUs
|
1 The W83977EF works fine with the W83977TF code in coreboot v4 (the pre-RAM serial part at least).
2 Pre-RAM serial output works in coreboot v4, but the rest is not supported, yet.
3 Will not be ported anytime soon, we focus on x86 in coreboot v4.