Talk:ASUS F2A85-M - Revision history

DavidHubbard: Linux complains about prefetchable memory regions

2012-12-28T03:47:42Z

Linux complains about prefetchable memory regions

DavidHubbard: Linux complains about prefetchable memory regions

2012-12-28T03:46:42Z

Linux complains about prefetchable memory regions

DavidHubbard: Linux complains about prefetchable memory regions

2012-12-28T03:02:42Z

Linux complains about prefetchable memory regions

New page

Linux complains about prefetchable memory regions: http://www.coreboot.org/pipermail/coreboot/2012-December/073133.html
<pre><nowiki>
[ 0.648901] pci 0000:00:02.0: no compatible bridge window for [mem 0xb0000000-0xbfffffff 64bit pref]
[ 0.658001] pci 0000:00:15.1: no compatible bridge window for [mem 0xc0000000-0xc00fffff 64bit pref]
[ 0.667124] pci 0000:01:00.0: no compatible bridge window for [mem 0xb0000000-0xbfffffff 64bit pref]
[ 0.676229] pci 0000:04:00.0: no compatible bridge window for [mem 0xc0004000-0xc0004fff 64bit pref]
[ 0.685332] pci 0000:04:00.0: no compatible bridge window for [mem 0xc0000000-0xc0003fff 64bit pref]
</nowiki></pre>
In drivers/pci/setup-res.c pci_claim_resource() this message means these PCI devices claim those memory regions but the PCI-PCI bridge between the device and the CPU – maybe just the host bridge – are not set large enough to include that memory.

That it mentions prefetchable memory is kind of minor: it's an address that requires 64-bit decoding, and it's an address that can be prefetched, but that's just the way the PCI device BAR is set.

TODO: put a PCI device list here

I think the fix is to either set up the PCI-PCI bridges so the memory can be accessed, or remap the PCI device so the memory is within what the bridge will forward.

@@ Line 9: / Line 9: @@
 In drivers/pci/setup-res.c pci_claim_resource() this message means these PCI devices claim those memory regions but the PCI-PCI bridge between the device and the CPU – maybe just the host bridge – are not set large enough to include that memory.
-That it mentions prefetchable memory is kind of minor: it's an address that requires 64-bit decoding, and it's an address that can be prefetched, but that's just the way the PCI device BAR is set. If the memory is prefetchable, it must also use 64-bit decoding. Prefetchable memory is the most efficient, so unless there are memory-mapped registers of a particular kind, it makes sense to always use 64-bit prefetchable memory.
+That it mentions prefetchable memory is kind of minor: it's an address that requires 64-bit decoding, and it's an address that can be prefetched, but that's just the way the PCI device BAR is set. If the memory is prefetchable, it must also use 64-bit decoding. Prefetchable memory is the most efficient, so unless there are memory-mapped registers of a particular kind, it makes sense to always use 64-bit prefetchable memory. In fact, none of the regions in these error messages use more than 32 bits anyway.
 Here's a really bad PCI Device Listing:<pre><nowiki>