Difference between revisions of "User:Hailfinger"

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My LinuxBIOS/coreboot-related interests and contributions are
 
My LinuxBIOS/coreboot-related interests and contributions are
* flashrom SPI support (I wrote all SPI support code) and generic flash chip support
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* flashrom. I'm the de facto release engineer and organizer. My specialties are architecture, SPI support (I wrote all SPI support code), external flasher infrastructure, verification and generic flash chip support.
 
* superiotool support
 
* superiotool support
* coreboot v3 design and restructuring work as well as board support.
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* coreboot v3 design and restructuring work as well as board support
 +
* porting coreboot v3 code to v2.
  
I consider coreboot v2 to be a legacy codebase and hope we can one day support all boards in v3 which are working under v2.
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I consider coreboot v2 to be a legacy codebase and hope we can one day support all boards in v3 which are working under v2. Updating v2 to use as much v3 code as possible is one of the ways to achieve this goal.
  
Legal disclaimer: My opinions do not necessarily represent the opinions of the coreboot project.
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Legal disclaimer: My opinions do not represent the opinions of the coreboot project.

Latest revision as of 10:02, 23 July 2009

I'm Carl-Daniel Hailfinger.

My LinuxBIOS/coreboot-related interests and contributions are

  • flashrom. I'm the de facto release engineer and organizer. My specialties are architecture, SPI support (I wrote all SPI support code), external flasher infrastructure, verification and generic flash chip support.
  • superiotool support
  • coreboot v3 design and restructuring work as well as board support
  • porting coreboot v3 code to v2.

I consider coreboot v2 to be a legacy codebase and hope we can one day support all boards in v3 which are working under v2. Updating v2 to use as much v3 code as possible is one of the ways to achieve this goal.

Legal disclaimer: My opinions do not represent the opinions of the coreboot project.