[coreboot-gerrit] New patch to review for coreboot: dc34f4a Revert "siemens/sitemp_g1p1: Make ACPI report the right mmconf region"

Nico Huber (nico.huber@secunet.com) gerrit at coreboot.org
Wed Apr 10 19:27:39 CEST 2013


Nico Huber (nico.huber at secunet.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3063

-gerrit

commit dc34f4adfceba32e7099c07aa5dcb855765edba7
Author: Nico Huber <nico.h at gmx.de>
Date:   Wed Apr 10 19:14:41 2013 +0200

    Revert "siemens/sitemp_g1p1: Make ACPI report the right mmconf region"
    
    This reverts commit 1fde22c54cacb15493bbde8835ec9e20f1d39bf5:
    
        commit 1fde22c54cacb15493bbde8835ec9e20f1d39bf5
        Author: Patrick Georgi <patrick.georgi at secunet.com>
        Date:   Tue Apr 9 15:41:23 2013 +0200
    
            siemens/sitemp_g1p1: Make ACPI report the right mmconf region
    
            ACPI reported the entire space between top-of-memory and some
            (relatively) arbitrary limit as useful for MMIO. Unfortunately
            the HyperTransport configuration disagreed. Make them match up.
    
            Other boards are not affected since they don't report any region
            for that purpose at all (it seems).
    
            Change-Id: I432a679481fd1c271f14ecd6fe74f0b7a15a698e
            Signed-off-by: Patrick Georgi <patrick.georgi at secunet.com>
            Reviewed-on: http://review.coreboot.org/3047
            Tested-by: build bot (Jenkins)
            Reviewed-by: Ronald G. Minnich <rminnich at gmail.com>
    
    It sneaked in without it's dependencies and, therefore, broke the build for
    all amdk8 targets. Paul Menzel already commented on the issue in [1]. It
    also doesn't look like the dependencies would be pulled soon [2].
    
    [1] http://review.coreboot.org/#/c/3047/
    [2] http://review.coreboot.org/#/c/2662/
    
    Change-Id: Ica89563aae4af3f0f35cacfe37fb608782329523
    Signed-off-by: Nico Huber <nico.h at gmx.de>
---
 src/include/cpu/amd/amdk8_sysconf.h        |  2 --
 src/mainboard/siemens/sitemp_g1p1/dsdt.asl | 10 +++++-----
 src/northbridge/amd/amdk8/acpi.c           |  4 ----
 src/northbridge/amd/amdk8/northbridge.c    |  3 ---
 4 files changed, 5 insertions(+), 14 deletions(-)

diff --git a/src/include/cpu/amd/amdk8_sysconf.h b/src/include/cpu/amd/amdk8_sysconf.h
index b367ac0..3ae35fd 100644
--- a/src/include/cpu/amd/amdk8_sysconf.h
+++ b/src/include/cpu/amd/amdk8_sysconf.h
@@ -21,8 +21,6 @@ struct amdk8_sysconf_t {
 
 	void *mb; // pointer for mb releated struct
 
-	unsigned mmconf_start;
-	unsigned mmconf_end;
 };
 
 extern struct amdk8_sysconf_t sysconf;
diff --git a/src/mainboard/siemens/sitemp_g1p1/dsdt.asl b/src/mainboard/siemens/sitemp_g1p1/dsdt.asl
index a48a6de..9d64e89 100644
--- a/src/mainboard/siemens/sitemp_g1p1/dsdt.asl
+++ b/src/mainboard/siemens/sitemp_g1p1/dsdt.asl
@@ -255,6 +255,8 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "SIEMENS", "SITEMP ", 0x20101005)
 		MPEN,	8
 	}
 
+	Name (IOLM,0xe0000000)
+
 #include "acpi/platform.asl"
 
 	Scope(\_SB) {
@@ -383,8 +385,6 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "SIEMENS", "SITEMP ", 0x20101005)
 			External (MMIO)
 			External (TOM1)
 			External (TOM2)
-			External (MMCB) /* MMConf Begin */
-			External (MMCE) /* MMConf End */
 
 			Name(_HID, EISAID("PNP0A03"))
 			Name(_ADR, 0x00180000)	/* Dev# = BSP Dev#, Func# = 0 */
@@ -1186,9 +1186,9 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "SIEMENS", "SITEMP ", 0x20101005)
 				CreateDWordField(CRES, ^EMM2._MAX, EM2E)
 				CreateDWordField(CRES, ^EMM2._LEN, EM2L)
 
-				Store(MMCB, EM2B)
-				Subtract(MMCE, 1, EM2E)
-				Subtract(MMCE, MMCB, EM2L)
+				Store(TOM1, EM2B)
+				Subtract(IOLM, 1, EM2E)
+				Subtract(IOLM, TOM1, EM2L)
 
 				If(LGreater(LOMH, 0xC0000)){
 					Store(0xC0000, EM1B)	/* Hole above C0000 and below E0000 */
diff --git a/src/northbridge/amd/amdk8/acpi.c b/src/northbridge/amd/amdk8/acpi.c
index 0a6fbba..2eb39c0 100644
--- a/src/northbridge/amd/amdk8/acpi.c
+++ b/src/northbridge/amd/amdk8/acpi.c
@@ -280,10 +280,6 @@ int k8acpi_write_vars(void)
 	 */
 	lens += acpigen_write_name_dword("TOM2", (msr.hi << 12) | msr.lo >> 20);
 
-	/* MMConf area for PCI0, begin and end */
-	lens += acpigen_write_name_dword("MMCB", sysconf.mmconf_start);
-	lens += acpigen_write_name_dword("MMCE", sysconf.mmconf_end);
-
 	lens += k8acpi_write_HT();
 	//minus opcode
 	acpigen_patch_len(lens - 1);
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index d0d65ff..5c1d97a 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -561,9 +561,6 @@ static void amdk8_set_resources(device_t dev)
 		amdk8_set_resource(dev, res, nodeid);
 	}
 
-	sysconf.mmconf_start = mem_lowest_start;
-	sysconf.mmconf_end = mem_highest_end;
-
 	compact_resources(dev);
 
 	for(bus = dev->link_list; bus; bus = bus->next) {



More information about the coreboot-gerrit mailing list