[coreboot-gerrit] New patch to review for coreboot: 9bf0cf6 google/snow: enable 32KHz sleep clock

David Hendricks (dhendrix@chromium.org) gerrit at coreboot.org
Fri Apr 12 21:57:46 CEST 2013

David Hendricks (dhendrix at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3075


commit 9bf0cf62bd52d8a55403161570f0753db1d7a21a
Author: David Hendricks <dhendrix at chromium.org>
Date:   Thu Apr 11 12:58:25 2013 -0700

    google/snow: enable 32KHz sleep clock
    Change-Id: I9db91826e4534b8a6eea2b13bcf7c6abd848b4e4
    Signed-off-by: David Hendricks <dhendrix at chromium.org>
 src/mainboard/google/snow/romstage.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c
index d34c379..2b3620e 100644
--- a/src/mainboard/google/snow/romstage.c
+++ b/src/mainboard/google/snow/romstage.c
@@ -90,6 +90,8 @@ static int setup_pmic(void)
 	error |= max77686_volsetting(PMIC_BUS, PMIC_LDO10, CONFIG_VDD_LDO10_MV,
 						REG_ENABLE, MAX77686_MV);
+	error |= max77686_enable_32khz_cp(PMIC_BUS);
 	if (error)
 		printk(BIOS_CRIT, "%s: Error during PMIC setup\n", __func__);

More information about the coreboot-gerrit mailing list