[coreboot-gerrit] Patch set updated for coreboot: ed567cf AMD AGESA: Remove INVD instruction when transitioning from CAR

Bruce Griffith (Bruce.Griffith@se-eng.com) gerrit at coreboot.org
Wed Aug 14 10:56:21 CEST 2013

Bruce Griffith (Bruce.Griffith at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3852


commit ed567cfc0d50dd12d9f7e401d204db0f21117bf6
Author: Bruce Griffith <bruce.griffith at se-eng.com>
Date:   Mon Aug 12 01:53:13 2013 -0600

    AMD AGESA: Remove INVD instruction when transitioning from CAR
    The AMD AGESA function to move the stack from cache-as-ram to
    actual RAM doesn't need any help.  The current implementation has
    an INVD instruction just before cache-as-RAM is torn down. It isn't
    needed for Trinity processors and makes Kabini boot unreliable.
    Change-Id: Ibe9e4105eee032471ccbb2d537471d5fa5847d22
    Signed-off-by: Bruce Griffith <bruce.griffith at se-eng.com>
 src/cpu/amd/agesa/cache_as_ram.inc | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/cpu/amd/agesa/cache_as_ram.inc b/src/cpu/amd/agesa/cache_as_ram.inc
index c645a1e..449cf69 100755
--- a/src/cpu/amd/agesa/cache_as_ram.inc
+++ b/src/cpu/amd/agesa/cache_as_ram.inc
@@ -85,6 +85,7 @@ stop:
   /* Save return stack */
+  movd 0(%esp), %xmm1
   movd %esp, %xmm0
   /* Disable cache */
@@ -92,8 +93,6 @@ disable_cache_as_ram:
   orl	$CR0_CacheDisable, %eax
   movl	%eax, %cr0
-  invd
   /* enable cache */
@@ -103,7 +102,9 @@ disable_cache_as_ram:
   xorl %eax, %eax
   /* Restore the return stack */
+  wbinvd
   movd %xmm0, %esp
+  movd %xmm1, (%esp)

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