[coreboot-gerrit] New patch to review for coreboot: f292a3e Declare recovery and developer modes without ChromeOS

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Tue Dec 3 13:13:29 CET 2013


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4308

-gerrit

commit f292a3e037c4f00fdfb20b6ccef8b43ae2a51a50
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Thu Nov 28 18:11:49 2013 +0200

    Declare recovery and developer modes without ChromeOS
    
    Change-Id: I33335fb282de2c7bc613dc58d6912c47f3b5c06c
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/Kconfig                                 |  5 ++++
 src/console/Makefile.inc                    |  4 +++
 src/console/bootmode.c                      | 40 +++++++++++++++++++++++++++++
 src/ec/google/chromeec/ec.c                 |  2 +-
 src/include/console/bootmode.h              | 33 ++++++++++++++++++++++++
 src/northbridge/intel/haswell/raminit.c     |  7 +----
 src/northbridge/intel/sandybridge/raminit.c |  6 +----
 src/vendorcode/google/chromeos/chromeos.h   |  7 +----
 8 files changed, 86 insertions(+), 18 deletions(-)

diff --git a/src/Kconfig b/src/Kconfig
index 1c80b8c..4e0c92a 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -286,6 +286,11 @@ config MMCONF_SUPPORT
 	bool
 	default n
 
+config BOOTMODE_STRAPS
+	bool
+	default y if CHROMEOS
+	default n
+
 source src/console/Kconfig
 
 # This should default to N and be set by SuperI/O drivers that have an UART
diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc
index 62be1d2..325335b 100644
--- a/src/console/Makefile.inc
+++ b/src/console/Makefile.inc
@@ -26,6 +26,10 @@ ramstage-$(CONFIG_CONSOLE_NE2K) += ne2k_console.c
 ramstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
 ramstage-$(CONFIG_CONSOLE_QEMU_DEBUGCON) += qemu_debugcon_console.c
 
+ifneq ($(CONFIG_CHROMEOS),y)
+romstage-$(CONFIG_BOOTMODE_STRAPS) += bootmode.c
+ramstage-$(CONFIG_BOOTMODE_STRAPS) += bootmode.c
+endif
 
 $(obj)/console/console.ramstage.o : $(obj)/build.h
 $(obj)/console/console.romstage.o : $(obj)/build.h
diff --git a/src/console/bootmode.c b/src/console/bootmode.c
new file mode 100644
index 0000000..e155853
--- /dev/null
+++ b/src/console/bootmode.c
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 The ChromiumOS Authors.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <console/bootmode.h>
+
+int __attribute__((__weak__)) developer_mode_switch(void)
+{
+	return 0;
+}
+
+int __attribute__((__weak__)) recovery_mode_switch(void)
+{
+	return 0;
+}
+
+int developer_mode_enabled(void)
+{
+	return developer_mode_switch();
+}
+
+int recovery_mode_enabled(void)
+{
+	return recovery_mode_switch();
+}
diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c
index 7546a82..d3d795a 100644
--- a/src/ec/google/chromeec/ec.c
+++ b/src/ec/google/chromeec/ec.c
@@ -19,6 +19,7 @@
 
 #include <stdint.h>
 #include <console/console.h>
+#include <console/bootmode.h>
 #include <arch/io.h>
 #include <delay.h>
 #include <arch/hlt.h>
@@ -31,7 +32,6 @@
 #endif
 #include "ec.h"
 #include "ec_commands.h"
-#include <vendorcode/google/chromeos/chromeos.h>
 
 uint8_t google_chromeec_calc_checksum(const uint8_t *data, int size)
 {
diff --git a/src/include/console/bootmode.h b/src/include/console/bootmode.h
new file mode 100644
index 0000000..674a281
--- /dev/null
+++ b/src/include/console/bootmode.h
@@ -0,0 +1,33 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 The ChromiumOS Authors.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef __BOOTMODE_H__
+#define __BOOTMODE_H__
+
+#if CONFIG_BOOTMODE_STRAPS
+int get_developer_mode_switch(void);
+int get_recovery_mode_switch(void);
+int developer_mode_enabled(void);
+int recovery_mode_enabled(void);
+#else
+#define recovery_mode_enabled() 0
+#define developer_mode_enabled() 0
+#endif
+
+#endif /* __BOOTMODE_H__ */
diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c
index a90b360..dba0f0c 100644
--- a/src/northbridge/intel/haswell/raminit.c
+++ b/src/northbridge/intel/haswell/raminit.c
@@ -18,6 +18,7 @@
  */
 
 #include <console/console.h>
+#include <console/bootmode.h>
 #include <string.h>
 #include <arch/hlt.h>
 #include <arch/io.h>
@@ -31,12 +32,6 @@
 #include "pei_data.h"
 #include "haswell.h"
 
-#if CONFIG_CHROMEOS
-#include <vendorcode/google/chromeos/chromeos.h>
-#else
-#define recovery_mode_enabled(x) 0
-#endif
-
 void save_mrc_data(struct pei_data *pei_data)
 {
 	struct mrc_data_container *mrcdata;
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 3b321d7..5cf9a83 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -18,6 +18,7 @@
  */
 
 #include <console/console.h>
+#include <console/bootmode.h>
 #include <string.h>
 #include <arch/hlt.h>
 #include <arch/io.h>
@@ -33,11 +34,6 @@
 
 /* Management Engine is in the southbridge */
 #include "southbridge/intel/bd82x6x/me.h"
-#if CONFIG_CHROMEOS
-#include <vendorcode/google/chromeos/chromeos.h>
-#else
-#define recovery_mode_enabled(x) 0
-#endif
 
 /*
  * MRC scrambler seed offsets should be reserved in
diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h
index d241085..5b1c317 100644
--- a/src/vendorcode/google/chromeos/chromeos.h
+++ b/src/vendorcode/google/chromeos/chromeos.h
@@ -21,10 +21,9 @@
 #define __CHROMEOS_H__
 
 #include <stdint.h>
+#include <console/bootmode.h>
 
 /* functions implemented per mainboard: */
-int get_developer_mode_switch(void);
-int get_recovery_mode_switch(void);
 int get_write_protect_state(void);
 #ifdef __PRE_RAM__
 void save_chromeos_gpios(void);
@@ -38,10 +37,6 @@ extern int oprom_is_loaded;
 void read_vbnv(uint8_t *vbnv_copy);
 void save_vbnv(const uint8_t *vbnv_copy);
 
-/* functions implemented in chromeos.c: */
-int developer_mode_enabled(void);
-int recovery_mode_enabled(void);
-
 /* functions implemented in vboot.c */
 void init_chromeos(int bootmode);
 



More information about the coreboot-gerrit mailing list