[coreboot-gerrit] New patch to review for coreboot: c342c25 NOTFORMERGE: Revert "cpu: Add CPU microcode file to cbfs with 16-byte alignment"

[Alexandru Gagniuc (mr.nuke.me@gmail.com)]

Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4477

-gerrit

commit c342c2504bb595c4584d7d15034bb0bbd05556bc
Author: Alexandru Gagniuc <mr.nuke.me at gmail.com>
Date:   Wed Dec 4 14:58:16 2013 -0600

    NOTFORMERGE: Revert "cpu: Add CPU microcode file to cbfs with 16-byte alignment"
    
    Commit 32ab283b1086ef53fadcd4be92df6e41c5d06438 changed the way microcode
    is included in cbfs by dropping the use of the 'cbfs-files' target, opting
    instead to call a script. This had the side-effect of messing up the make
    dependencies, and now causes build issues with UPDATE-FIT.
    
    DO NOT MERGE: this patch also reverts the 16-byte alignment which may have
    its own set of unintended side-effects.
    
    Change-Id: I4b3e63cbcde7635b842894f776373f7946bd0df8
    Signed-off-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
---
 src/arch/armv7/Makefile.inc |  3 +--
 src/arch/x86/Makefile.inc   |  3 +--
 src/cpu/Makefile.inc        | 26 ++++++--------------------
 3 files changed, 8 insertions(+), 24 deletions(-)

diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc
index dfd5164..0b692ec 100644
--- a/src/arch/armv7/Makefile.inc
+++ b/src/arch/armv7/Makefile.inc
@@ -46,7 +46,7 @@ prebuild-files = \
 prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file)))
 
 # TODO Change -b to Kconfig variable.
-$(obj)/coreboot.pre: $(objcbfs)/bootblock.bin $(objcbfs)/romstage.elf $$(prebuilt-files) $(CBFSTOOL) $$(cpu_ucode_cbfs_file)
+$(obj)/coreboot.pre: $(objcbfs)/bootblock.bin $(objcbfs)/romstage.elf $$(prebuilt-files) $(CBFSTOOL)
 	$(CBFSTOOL) $@.tmp create -m armv7 -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \
 		-B $(objcbfs)/bootblock.bin -a 64 \
 		-b $(CONFIG_BOOTBLOCK_ROM_OFFSET) \
@@ -57,7 +57,6 @@ $(obj)/coreboot.pre: $(objcbfs)/bootblock.bin $(objcbfs)/romstage.elf $$(prebuil
 		-f $(objcbfs)/romstage.elf -b 0 \
 		-n $(CONFIG_CBFS_PREFIX)/romstage -c none
 	$(prebuild-files) true
-	$(call add-cpu-microcode-to-cbfs,$@.tmp)
 	mv $@.tmp $@
 else
 .PHONY: $(obj)/coreboot.pre
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 2e54645..d890d47 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -64,12 +64,11 @@ prebuild-files = \
 	$(if $(call extract_nth,4,$(file)),-b $(call extract_nth,4,$(file))) &&)
 prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file)))
 
-$(obj)/coreboot.pre1: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) $$(cpu_ucode_cbfs_file)
+$(obj)/coreboot.pre1: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL)
 	$(CBFSTOOL) $@.tmp create -m x86 -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \
 		-B $(objcbfs)/bootblock.bin -a 64 \
 		-o $$(( $(CONFIG_ROM_SIZE) - $(CONFIG_CBFS_SIZE) ))
 	$(prebuild-files) true
-	$(call add-cpu-microcode-to-cbfs,$@.tmp)
 	mv $@.tmp $@
 else
 .PHONY: $(obj)/coreboot.pre1
diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc
index 34ae53e..09d36ec 100644
--- a/src/cpu/Makefile.inc
+++ b/src/cpu/Makefile.inc
@@ -15,23 +15,17 @@ subdirs-$(CONFIG_CPU_QEMU_X86) += qemu-x86
 ## Rules for building the microcode blob in CBFS
 ################################################################################
 
-cpu_ucode_cbfs_name = cpu_microcode_blob.bin
-
 # External microcode file, or are we generating one ?
 ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL), y)
-cpu_ucode_cbfs_file = $(call strip_quotes,$(CONFIG_CPU_MICROCODE_FILE))
-cbfs_include_ucode = y
+cbfs-files-y += cpu_microcode_blob.bin
+cpu_microcode_blob.bin-type = 0x53
+cpu_microcode_blob.bin-file = $(call strip_quotes,$(CONFIG_CPU_MICROCODE_FILE))
 endif
 
 ifeq ($(CONFIG_CPU_MICROCODE_CBFS_GENERATE), y)
-cpu_ucode_cbfs_file = $(obj)/cpu_microcode_blob.bin
-cbfs_include_ucode = y
-endif
-
-ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC), 0)
-cpu_ucode_cbfs_offset = "-b $(CONFIG_CPU_MICROCODE_CBFS_LOC)"
-else
-cpu_ucode_cbfs_offset = "-b"
+cbfs-files-y += cpu_microcode_blob.bin
+cpu_microcode_blob.bin-type = 0x53
+cpu_microcode_blob.bin-file = $(obj)/cpu_microcode_blob.bin
 endif
 
 # In case we have more than one "source" (cough) files containing microcode, we
@@ -48,11 +42,3 @@ $(obj)/cpu_microcode_blob.o: $$(cpu_microcode-objs)
 $(obj)/cpu_microcode_blob.bin: $(obj)/cpu_microcode_blob.o
 	@printf "  MICROCODE    $(subst $(obj)/,,$(@))\n"
 	$(OBJCOPY) -j .data -O binary $< $@
-
-ifeq ($(cbfs_include_ucode),y)
-# Add CPU microcode to specified rom image $(1)
-add-cpu-microcode-to-cbfs = \
-	$(CBFSTOOL) $(1) locate -f $(cpu_ucode_cbfs_file) -n $(cpu_ucode_cbfs_name) -a 16 | xargs $(CBFSTOOL) $(1) add -n $(cpu_ucode_cbfs_name) -f $(cpu_ucode_cbfs_file) -t 0x53 $(cpu_ucode_cbfs_offset)
-else
-add-cpu-microcode-to-cbfs = true
-endif