[coreboot-gerrit] Patch set updated for coreboot: 666e8c2 PIT: remove a comment that is incorrect.

[Stefan Reinauer (stefan.reinauer@coreboot.org)]

Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4342

-gerrit

commit 666e8c24bdf61fe04a1ea205cf1d1807a0fd12aa
Author: Ronald G. Minnich <rminnich at google.com>
Date:   Wed Jun 26 10:29:02 2013 -0700

    PIT: remove a comment that is incorrect.
    
    The is_resume comment is wrong for this board. It only applies
    to the older 5250 cpu. In fact, the is_resume parameter
    is not needed for ddr init and will likely be removed soon.
    
    Change-Id: I4e3c92fcaaa75d3c9223d90acccf053f61406307
    Signed-off-by: Ronald G. Minnich <rminnich at google.com>
    Reviewed-on: https://gerrit.chromium.org/gerrit/60103
    Reviewed-by: David Hendricks <dhendrix at chromium.org>
    Commit-Queue: Ronald G. Minnich <rminnich at chromium.org>
    Tested-by: Ronald G. Minnich <rminnich at chromium.org>
---
 src/mainboard/google/pit/romstage.c | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/src/mainboard/google/pit/romstage.c b/src/mainboard/google/pit/romstage.c
index a757615..765ff82 100644
--- a/src/mainboard/google/pit/romstage.c
+++ b/src/mainboard/google/pit/romstage.c
@@ -158,13 +158,6 @@ static void setup_memory(struct mem_timings *mem, int is_resume)
 	       mem->mpll_mdiv,
 	       mem->frequency_mhz);
 
-	/* FIXME Currently memory initialization with mem_reset on normal boot
-	 * will cause resume to fail (even if we don't do mem_reset on resume),
-	 * and the workaround is to temporarily always enable "is_resume".
-	 * This should be removed when the root cause of resume issue is found.
-	 */
-	is_resume = 1;
-
 	if (ddr3_mem_ctrl_init(mem, DMC_INTERLEAVE_SIZE, !is_resume)) {
 		die("Failed to initialize memory controller.\n");
 	}