[coreboot-gerrit] Patch set updated for coreboot: e29912c slippy/falco/peppy: update ACPI C-state settings
Stefan Reinauer (stefan.reinauer@coreboot.org)
gerrit at coreboot.org
Thu Dec 12 22:15:19 CET 2013
Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4377
-gerrit
commit e29912c1c8716c86fefb1b21404ab611de2b236d
Author: Duncan Laurie <dlaurie at chromium.org>
Date: Mon Jul 22 15:33:10 2013 -0700
slippy/falco/peppy: update ACPI C-state settings
Since these boards do not support C10 we should not bother
advertising that state in the ACPI _CST.
Instead use this map:
ACPI(C1) = MWAIT(C1E)
ACPI(C2) = MWAIT(C3)
ACPI(C3) = MWAIT(C7S)
Change-Id: I37eb02bf9555c74e957316a1ba9778eb2b6ee128
Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/62898
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Reviewed-by: Marc Jones <marc.jones at se-eng.com>
---
src/mainboard/google/falco/devicetree.cb | 8 ++++----
src/mainboard/google/peppy/devicetree.cb | 8 ++++----
src/mainboard/google/slippy/devicetree.cb | 8 ++++----
3 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/src/mainboard/google/falco/devicetree.cb b/src/mainboard/google/falco/devicetree.cb
index f5a40e1..b490d12 100644
--- a/src/mainboard/google/falco/devicetree.cb
+++ b/src/mainboard/google/falco/devicetree.cb
@@ -30,12 +30,12 @@ chip northbridge/intel/haswell
device lapic 0xACAC off end
register "c1_battery" = "2" # ACPI(C1) = MWAIT(C1E)
- register "c2_battery" = "9" # ACPI(C2) = MWAIT(C7S)
- register "c3_battery" = "12" # ACPI(C3) = MWAIT(C10)
+ register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3)
+ register "c3_battery" = "9" # ACPI(C3) = MWAIT(C7S)
register "c1_acpower" = "2" # ACPI(C1) = MWAIT(C1E)
- register "c2_acpower" = "9" # ACPI(C2) = MWAIT(C7S)
- register "c3_acpower" = "12" # ACPI(C3) = MWAIT(C10)
+ register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
+ register "c3_acpower" = "9" # ACPI(C3) = MWAIT(C7S)
end
end
diff --git a/src/mainboard/google/peppy/devicetree.cb b/src/mainboard/google/peppy/devicetree.cb
index 909a347..06ca93c 100644
--- a/src/mainboard/google/peppy/devicetree.cb
+++ b/src/mainboard/google/peppy/devicetree.cb
@@ -30,12 +30,12 @@ chip northbridge/intel/haswell
device lapic 0xACAC off end
register "c1_battery" = "2" # ACPI(C1) = MWAIT(C1E)
- register "c2_battery" = "9" # ACPI(C2) = MWAIT(C7S)
- register "c3_battery" = "12" # ACPI(C3) = MWAIT(C10)
+ register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3)
+ register "c3_battery" = "9" # ACPI(C3) = MWAIT(C7S)
register "c1_acpower" = "2" # ACPI(C1) = MWAIT(C1E)
- register "c2_acpower" = "9" # ACPI(C2) = MWAIT(C7S)
- register "c3_acpower" = "12" # ACPI(C3) = MWAIT(C10)
+ register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
+ register "c3_acpower" = "9" # ACPI(C3) = MWAIT(C7S)
end
end
diff --git a/src/mainboard/google/slippy/devicetree.cb b/src/mainboard/google/slippy/devicetree.cb
index 909a347..06ca93c 100644
--- a/src/mainboard/google/slippy/devicetree.cb
+++ b/src/mainboard/google/slippy/devicetree.cb
@@ -30,12 +30,12 @@ chip northbridge/intel/haswell
device lapic 0xACAC off end
register "c1_battery" = "2" # ACPI(C1) = MWAIT(C1E)
- register "c2_battery" = "9" # ACPI(C2) = MWAIT(C7S)
- register "c3_battery" = "12" # ACPI(C3) = MWAIT(C10)
+ register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3)
+ register "c3_battery" = "9" # ACPI(C3) = MWAIT(C7S)
register "c1_acpower" = "2" # ACPI(C1) = MWAIT(C1E)
- register "c2_acpower" = "9" # ACPI(C2) = MWAIT(C7S)
- register "c3_acpower" = "12" # ACPI(C3) = MWAIT(C10)
+ register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
+ register "c3_acpower" = "9" # ACPI(C3) = MWAIT(C7S)
end
end
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