[coreboot-gerrit] New patch to review for coreboot: b4d28a0 Add a lib function to read SPD from a file

Dave Frodin (dave.frodin@se-eng.com) gerrit at coreboot.org
Sun Dec 15 19:07:35 CET 2013


Dave Frodin (dave.frodin at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4533

-gerrit

commit b4d28a0f3b696e02c9c7f94ecbee3fee53e14617
Author: Dave Frodin <dave.frodin at se-eng.com>
Date:   Sat Dec 14 11:21:26 2013 -0700

    Add a lib function to read SPD from a file
    
    This allows mainboards with solder-down memory and without
    a solder-down SPD EEPROM to have their SPD settings read
    from a file.
    
    Change-Id: I3fb351f4b84cf290e3f4374bcee8a038bccf7eed
    Signed-off-by: Dave Frodin <dave.frodin at se-eng.com>
---
 src/include/lib.h       |  3 ++
 src/lib/Makefile.inc    |  1 +
 src/lib/spd_from_file.c | 73 +++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 77 insertions(+)

diff --git a/src/include/lib.h b/src/include/lib.h
index 2f27149..0a4a2a6 100644
--- a/src/include/lib.h
+++ b/src/include/lib.h
@@ -55,4 +55,7 @@ void cache_as_ram_main(void);
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
 #endif
 
+/* Defined in src/lib/spd_from_file.c */
+int Read_SPD_from_file(void *infoptr);
+
 #endif /* __LIB_H__ */
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index 92ec663..0148326 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -50,6 +50,7 @@ romstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c
 romstage-$(CONFIG_CONSOLE_NE2K) += ne2k.c
 romstage-$(CONFIG_SPKMODEM) += spkmodem.c
 romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += usbdebug.c
+romstage-$(CONFIG_READ_SPD_FROM_FILE) += spd_from_file.c
 
 ifeq ($(CONFIG_EARLY_CBMEM_INIT),y)
 romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
diff --git a/src/lib/spd_from_file.c b/src/lib/spd_from_file.c
new file mode 100755
index 0000000..bebe1c0
--- /dev/null
+++ b/src/lib/spd_from_file.c
@@ -0,0 +1,73 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Sage Electronic Engineering, LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include "agesawrapper.h"
+#include <lib.h>
+
+static void calc_fake_spd_crc(unsigned char *SPDPtr, unsigned short *crc);
+
+int Read_SPD_from_file(void *infoptr)
+{
+	unsigned char *spd_ptr;
+	unsigned short index, crc;
+	#include CONFIG_PATH_TO_SPD_FILE
+	AGESA_READ_SPD_PARAMS *info = infoptr;
+
+	if (info->MemChannelId > CONFIG_DDR3_CHANNEL_MAX)
+		return 1;
+	if (info->SocketId != 0)
+		return 1;
+	if (info->DimmId != 0)
+		return 1;
+
+	/* read the bytes from the table */
+	spd_ptr = (unsigned char *)info->Buffer;
+	for (index = 0; index < 128; index++)
+		spd_ptr[index] = ddr3_fake_spd[index];
+
+	/* If CRC bytes are zeroes, calculate and store the CRC of the fake table */
+	if ((spd_ptr[126] == 0) && (spd_ptr[127] == 0)) {
+		calc_fake_spd_crc(spd_ptr, &crc);
+		spd_ptr[126] = (unsigned char)(crc & 0xFF);
+		spd_ptr[127] = (unsigned char)(crc >> 8);
+	}
+	return 0;
+}
+
+static void calc_fake_spd_crc(unsigned char *SPDPtr, unsigned short *crc)
+{
+	int i, j, jmax;
+
+	/* should the CRC be done on bytes 0-116 or 0-125 ? */
+	if (SPDPtr[0] & 0x80)
+		 jmax = 117;
+	else
+		jmax = 126;
+
+	*crc = 0;
+	for (j = 0; j < jmax; j++) {
+		*crc = *crc ^ ((unsigned short)SPDPtr[j] << 8);
+		for (i = 0; i < 8; i++) {
+			if (*crc & 0x8000)
+				*crc = (*crc << 1) ^ 0x1021;
+			else
+				*crc = (*crc << 1);
+		}
+	}
+}



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