[coreboot-gerrit] Patch set updated for coreboot: af5ee8d arm: libpayload: Include stdint.h in cache.h
Patrick Georgi (patrick@georgi-clan.de)
gerrit at coreboot.org
Fri Dec 20 23:31:50 CET 2013
Patrick Georgi (patrick at georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4387
-gerrit
commit af5ee8d9bce5bfbcf152c1268454b018a4890017
Author: Gabe Black <gabeblack at google.com>
Date: Wed Jul 24 03:50:18 2013 -0700
arm: libpayload: Include stdint.h in cache.h
The cache.h header uses standard int types but doesn't include stdint.h itself.
Change-Id: If470978164b0cd1f05c27c2c8eda365133cc47ff
Signed-off-by: Gabe Black <gabeblack at google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/63190
Reviewed-by: Hung-Te Lin <hungte at chromium.org>
Commit-Queue: Gabe Black <gabeblack at chromium.org>
Tested-by: Gabe Black <gabeblack at chromium.org>
---
payloads/libpayload/include/armv7/arch/cache.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/payloads/libpayload/include/armv7/arch/cache.h b/payloads/libpayload/include/armv7/arch/cache.h
index 2571e81..2928d10 100644
--- a/payloads/libpayload/include/armv7/arch/cache.h
+++ b/payloads/libpayload/include/armv7/arch/cache.h
@@ -32,6 +32,8 @@
#ifndef ARMV7_CACHE_H
#define ARMV7_CACHE_H
+#include <stdint.h>
+
/* SCTLR bits */
#define SCTLR_M (1 << 0) /* MMU enable */
#define SCTLR_A (1 << 1) /* Alignment check enable */
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