[coreboot-gerrit] Patch merged into coreboot/master: f0aa01a exynos5420: re-factor the SDMMC GPIO config routines
gerrit at coreboot.org
gerrit at coreboot.org
Sat Dec 21 22:46:07 CET 2013
the following patch was just integrated into master:
commit f0aa01a5ca5fb445af736741176aeb1ff291f41e
Author: David Hendricks <dhendrix at chromium.org>
Date: Thu Aug 8 14:09:46 2013 -0700
exynos5420: re-factor the SDMMC GPIO config routines
The existing GPIO config routines for SDMMC0-2 are over-generalized
and somewhat confusing as a result. It would work nicely if all SDMMC
ports were configured in the same fashion, but there are a few
exceptions.
For example, the inner function runs differently if we're using 8 bits
of data instead of 4, so a big chunk is skipped for SDMMC2. SDMMC0
requires SD_0_CDn to be an output rather than alternate function and
must have a value set.
This patch trades some verbosity for simplicy. Now the SDMMC GPIO
configuration a straight-forward sequence of GPIO operations
without any exceptions.
Signed-off-by: David Hendricks <dhendrix at chromium.org>
Change-Id: If75075b24c6588c4c1b3be3fb9b1aa95e2fac2d1
Reviewed-on: https://gerrit.chromium.org/gerrit/65248
Reviewed-by: Gabe Black <gabeblack at chromium.org>
Commit-Queue: David Hendricks <dhendrix at chromium.org>
Tested-by: David Hendricks <dhendrix at chromium.org>
See http://review.coreboot.org/4446 for details.
-gerrit
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