[coreboot-gerrit] Patch merged into coreboot/master: 568a2b0 exynos5420: add a peripheral clock select --> PLL decoder

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 568a2b0f9800e31e28465191801b9f36194b1e3a
Author: David Hendricks <dhendrix at chromium.org>
Date:   Thu Aug 8 19:03:03 2013 -0700

    exynos5420: add a peripheral clock select --> PLL decoder
    
    This adds a helper function to translate between peripheral clock
    select fields in clock source registers and PLLs. Some of this was
    already done to handle a few special cases, this generalizes the
    earlier work so that follow-up patches can do further clean-up.
    
    Unfortunately, the PLLs represented by clock select fields in
    various modules are not uniformly ordered. So for now we focus on
    peripheral clock sources only.
    
    Signed-off-by: David Hendricks <dhendrix at chromium.org>
    
    Change-Id: Id58a3e488650d09e6a35c22d5394fcbf0ee9ddff
    Reviewed-on: https://gerrit.chromium.org/gerrit/65283
    Commit-Queue: David Hendricks <dhendrix at chromium.org>
    Tested-by: David Hendricks <dhendrix at chromium.org>
    Reviewed-by: Gabe Black <gabeblack at chromium.org>


See http://review.coreboot.org/4462 for details.

-gerrit