[coreboot-gerrit] Patch set updated for coreboot: 8cdd963 libpayload: reintroduce optional PCI in XHCI driver

Patrick Georgi (patrick@georgi-clan.de) gerrit at coreboot.org
Sat Dec 21 23:59:46 CET 2013


Patrick Georgi (patrick at georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4547

-gerrit

commit 8cdd963aa3be926a3a73097fd6c1ce292e0254b5
Author: Patrick Georgi <patrick at georgi-clan.de>
Date:   Sat Dec 21 11:41:22 2013 +0100

    libpayload: reintroduce optional PCI in XHCI driver
    
    being a good citizen on the box, libpayload tries to return to EHCI
    mode on shutdown, so a non-XHCI capable USB driver after it (eg. in
    the OS) finds something to work with.
    
    Change-Id: Id227d646e08a258b841c644263112f0815dd486c
    Signed-off-by: Patrick Georgi <patrick at georgi-clan.de>
---
 payloads/libpayload/drivers/usb/xhci.c | 8 ++++----
 payloads/libpayload/drivers/usb/xhci.h | 2 +-
 payloads/libpayload/include/usb/usb.h  | 1 +
 3 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/payloads/libpayload/drivers/usb/xhci.c b/payloads/libpayload/drivers/usb/xhci.c
index aa2fe57..6106342 100644
--- a/payloads/libpayload/drivers/usb/xhci.c
+++ b/payloads/libpayload/drivers/usb/xhci.c
@@ -303,16 +303,15 @@ hci_t *
 xhci_pci_init (pcidev_t addr)
 {
 	u32 reg_addr;
-	hci_t controller;
+	hci_t *controller;
 
 	reg_addr = (u32)phys_to_virt(pci_read_config32 (addr, 0x10) & ~0xf);
-	//controller->reg_base = pci_read_config32 (addr, 0x14) & ~0xf;
 	if (pci_read_config32 (addr, 0x14) > 0) {
 		fatal("We don't do 64bit addressing.\n");
 	}
 
 	controller = xhci_init((void *)(unsigned long)reg_addr);
-	controller->bus_address = addr;
+	controller->pcidev = addr;
 
 	xhci_switch_ppt_ports(addr);
 
@@ -414,7 +413,8 @@ xhci_shutdown(hci_t *const controller)
 
 	xhci_stop(controller);
 
-	xhci_switchback_ppt_ports(controller->bus_address);
+        if (controller->pcidev)
+		xhci_switchback_ppt_ports(controller->pcidev);
 
 	if (xhci->sp_ptrs) {
 		const size_t max_sp_bufs = xhci->capreg->Max_Scratchpad_Bufs;
diff --git a/payloads/libpayload/drivers/usb/xhci.h b/payloads/libpayload/drivers/usb/xhci.h
index b76c982..ddc9297 100644
--- a/payloads/libpayload/drivers/usb/xhci.h
+++ b/payloads/libpayload/drivers/usb/xhci.h
@@ -34,7 +34,7 @@
 #include <usb/usb.h>
 
 hci_t *xhci_pci_init (pcidev_t addr);
-hci_t *xhci_init (void *bar);
+hci_t *xhci_init (const void *bar);
 
 void xhci_rh_init (usbdev_t *dev);
 
diff --git a/payloads/libpayload/include/usb/usb.h b/payloads/libpayload/include/usb/usb.h
index a351690..0bfbc20 100644
--- a/payloads/libpayload/include/usb/usb.h
+++ b/payloads/libpayload/include/usb/usb.h
@@ -119,6 +119,7 @@ typedef enum { OHCI = 0, UHCI = 1, EHCI = 2, XHCI = 3} hc_type;
 struct usbdev_hc {
 	hci_t *next;
 	u32 reg_base;
+	pcidev_t pcidev; // 0 if not used (eg on ARM)
 	hc_type type;
 	usbdev_t *devices[128];	// dev 0 is root hub, 127 is last addressable
 



More information about the coreboot-gerrit mailing list