[coreboot-gerrit] Patch set updated for coreboot: f335419 Rename hardwaremain() to main()
Gabe Black (gabeblack@chromium.org)
gerrit at coreboot.org
Tue Jul 9 22:43:51 CEST 2013
Gabe Black (gabeblack at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3639
-gerrit
commit f33541992cd4d8568dcce978ecc318bfb50db0aa
Author: Stefan Reinauer <reinauer at chromium.org>
Date: Thu May 9 16:30:06 2013 -0700
Rename hardwaremain() to main()
... and drop the wrapper on ARMv7
Change-Id: If3ffe953cee9e61d4dcbb38f4e5e2ca74b628ccc
Signed-off-by: Stefan Reinauer <reinauer at google.com>
Signed-off-by: Gabe Black <gabeblack at chromium.org>
---
src/arch/armv7/Makefile.inc | 2 +-
src/arch/x86/lib/c_start.S | 2 +-
src/include/bootstate.h | 2 +-
src/include/console/post_codes.h | 8 ++++----
src/lib/hardwaremain.c | 2 +-
src/lib/timestamp.c | 2 +-
src/mainboard/amd/dinar/get_bus_conf.c | 2 +-
src/mainboard/amd/inagua/get_bus_conf.c | 2 +-
src/mainboard/amd/parmer/get_bus_conf.c | 2 +-
src/mainboard/amd/persimmon/get_bus_conf.c | 2 +-
src/mainboard/amd/south_station/get_bus_conf.c | 2 +-
src/mainboard/amd/thatcher/get_bus_conf.c | 2 +-
src/mainboard/amd/torpedo/get_bus_conf.c | 2 +-
src/mainboard/amd/union_station/get_bus_conf.c | 2 +-
src/mainboard/asrock/e350m1/get_bus_conf.c | 2 +-
src/mainboard/asus/f2a85-m/get_bus_conf.c | 2 +-
src/mainboard/emulation/qemu-armv7/Makefile.inc | 1 -
src/mainboard/emulation/qemu-armv7/ramstage.c | 20 ------------------
src/mainboard/google/snow/Makefile.inc | 1 -
src/mainboard/google/snow/ramstage.c | 24 ----------------------
.../lippert/frontrunner-af/get_bus_conf.c | 2 +-
src/mainboard/lippert/toucan-af/get_bus_conf.c | 2 +-
src/mainboard/supermicro/h8qgi/get_bus_conf.c | 2 +-
src/mainboard/supermicro/h8scm/get_bus_conf.c | 2 +-
src/mainboard/ti/beaglebone/mainboard.c | 23 ---------------------
src/mainboard/tyan/s8226/get_bus_conf.c | 2 +-
src/northbridge/via/vx800/examples/chipset_init.c | 2 +-
27 files changed, 25 insertions(+), 94 deletions(-)
diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc
index 1045774..8637ef4 100644
--- a/src/arch/armv7/Makefile.inc
+++ b/src/arch/armv7/Makefile.inc
@@ -162,7 +162,7 @@ ramstage-y += exception.c
ramstage-y += exception_asm.S
romstage-srcs += $(objgenerated)/crt0.s
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mainboard.c
+ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c)
ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y)
ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c
endif
diff --git a/src/arch/x86/lib/c_start.S b/src/arch/x86/lib/c_start.S
index c725f82..01ffa7c 100644
--- a/src/arch/x86/lib/c_start.S
+++ b/src/arch/x86/lib/c_start.S
@@ -86,7 +86,7 @@ _start:
#if CONFIG_GDB_WAIT
call gdb_stub_breakpoint
#endif
- call hardwaremain
+ call main
/* NOTREACHED */
.Lhlt:
post_code(POST_DEAD_CODE) /* post ee */
diff --git a/src/include/bootstate.h b/src/include/bootstate.h
index 40822a7..af18989 100644
--- a/src/include/bootstate.h
+++ b/src/include/bootstate.h
@@ -165,7 +165,7 @@ void boot_state_current_block(void);
void boot_state_current_unblock(void);
/* Entry into the boot state machine. */
-void hardwaremain(void);
+void main(void);
/* In order to schedule boot state callbacks at compile-time specify the
* entries in an array using the BOOT_STATE_INIT_ENTRIES and
diff --git a/src/include/console/post_codes.h b/src/include/console/post_codes.h
index f66d276..ba6c916 100644
--- a/src/include/console/post_codes.h
+++ b/src/include/console/post_codes.h
@@ -83,16 +83,16 @@
#define POST_ENTRY_C_START 0x13
/**
- * \brief Pre call to hardwaremain()
+ * \brief Pre call to ram stage main()
*
- * POSTed right before hardwaremain is called from c_start.S
+ * POSTed right before ram stage main() is called from c_start.S
*/
#define POST_PRE_HARDWAREMAIN 0x79
/**
- * \brief Entry into coreboot in hardwaremain (RAM)
+ * \brief Entry into coreboot in ram stage main()
*
- * This is the first call in hardwaremain.c. If this code is POSTed, then
+ * This is the first call in ram stage main(). If this code is POSTed, then
* ramstage has succesfully loaded and started executing.
*/
#define POST_ENTRY_RAMSTAGE 0x80
diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c
index 56539cb..a1803ed 100644
--- a/src/lib/hardwaremain.c
+++ b/src/lib/hardwaremain.c
@@ -445,7 +445,7 @@ static void boot_state_schedule_static_entries(void)
}
}
-void hardwaremain(void)
+void main(void)
{
timestamp_stash(TS_START_RAMSTAGE);
post_code(POST_ENTRY_RAMSTAGE);
diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c
index 2f53c50..3f8a7bd 100644
--- a/src/lib/timestamp.c
+++ b/src/lib/timestamp.c
@@ -92,7 +92,7 @@ static int timestamp_entries CAR_GLOBAL = 0;
* This is needed when time stamping before the CBMEM area
* is initialized. The function timestamp_sync() is used to
* write the time stamps to the CBMEM area. This is done in
- * hardwaremain()
+ * ram stage main()
*/
void timestamp_stash(enum timestamp_id id)
diff --git a/src/mainboard/amd/dinar/get_bus_conf.c b/src/mainboard/amd/dinar/get_bus_conf.c
index 128a677..a59bc43 100644
--- a/src/mainboard/amd/dinar/get_bus_conf.c
+++ b/src/mainboard/amd/dinar/get_bus_conf.c
@@ -83,7 +83,7 @@ void get_bus_conf(void)
* call. The logically correct place to call AmdInitLate is after PCI scan is done,
* after the decision about S3 resume is made, and before the system tables are
* written into RAM. The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain". There is no platform
+ * "write_tables", called near the end of "main". There is no platform
* specific entry point between the S3 resume decision point and the call to
* "write_tables", and the next platform specific entry points are the calls to
* the ACPI table write functions. The first of ose would seem to be the right
diff --git a/src/mainboard/amd/inagua/get_bus_conf.c b/src/mainboard/amd/inagua/get_bus_conf.c
index d2c0b81..09e3b4c 100644
--- a/src/mainboard/amd/inagua/get_bus_conf.c
+++ b/src/mainboard/amd/inagua/get_bus_conf.c
@@ -71,7 +71,7 @@ void get_bus_conf(void)
* call. The logically correct place to call AmdInitLate is after PCI scan is done,
* after the decision about S3 resume is made, and before the system tables are
* written into RAM. The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain". There is no platform
+ * "write_tables", called near the end of "main". There is no platform
* specific entry point between the S3 resume decision point and the call to
* "write_tables", and the next platform specific entry points are the calls to
* the ACPI table write functions. The first of ose would seem to be the right
diff --git a/src/mainboard/amd/parmer/get_bus_conf.c b/src/mainboard/amd/parmer/get_bus_conf.c
index 3ae4c18..d1be8b6 100644
--- a/src/mainboard/amd/parmer/get_bus_conf.c
+++ b/src/mainboard/amd/parmer/get_bus_conf.c
@@ -69,7 +69,7 @@ void get_bus_conf(void)
* call. The logically correct place to call AmdInitLate is after PCI scan is done,
* after the decision about S3 resume is made, and before the system tables are
* written into RAM. The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain". There is no platform
+ * "write_tables", called near the end of "main". There is no platform
* specific entry point between the S3 resume decision point and the call to
* "write_tables", and the next platform specific entry points are the calls to
* the ACPI table write functions. The first of ose would seem to be the right
diff --git a/src/mainboard/amd/persimmon/get_bus_conf.c b/src/mainboard/amd/persimmon/get_bus_conf.c
index 11ec26e..8872bb5 100644
--- a/src/mainboard/amd/persimmon/get_bus_conf.c
+++ b/src/mainboard/amd/persimmon/get_bus_conf.c
@@ -74,7 +74,7 @@ void get_bus_conf(void)
* call. The logically correct place to call AmdInitLate is after PCI scan is done,
* after the decision about S3 resume is made, and before the system tables are
* written into RAM. The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain". There is no platform
+ * "write_tables", called near the end of "main". There is no platform
* specific entry point between the S3 resume decision point and the call to
* "write_tables", and the next platform specific entry points are the calls to
* the ACPI table write functions. The first of ose would seem to be the right
diff --git a/src/mainboard/amd/south_station/get_bus_conf.c b/src/mainboard/amd/south_station/get_bus_conf.c
index cbe19d8..165c683 100644
--- a/src/mainboard/amd/south_station/get_bus_conf.c
+++ b/src/mainboard/amd/south_station/get_bus_conf.c
@@ -71,7 +71,7 @@ void get_bus_conf(void)
* call. The logically correct place to call AmdInitLate is after PCI scan is done,
* after the decision about S3 resume is made, and before the system tables are
* written into RAM. The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain". There is no platform
+ * "write_tables", called near the end of "main". There is no platform
* specific entry point between the S3 resume decision point and the call to
* "write_tables", and the next platform specific entry points are the calls to
* the ACPI table write functions. The first of ose would seem to be the right
diff --git a/src/mainboard/amd/thatcher/get_bus_conf.c b/src/mainboard/amd/thatcher/get_bus_conf.c
index 3ae4c18..d1be8b6 100644
--- a/src/mainboard/amd/thatcher/get_bus_conf.c
+++ b/src/mainboard/amd/thatcher/get_bus_conf.c
@@ -69,7 +69,7 @@ void get_bus_conf(void)
* call. The logically correct place to call AmdInitLate is after PCI scan is done,
* after the decision about S3 resume is made, and before the system tables are
* written into RAM. The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain". There is no platform
+ * "write_tables", called near the end of "main". There is no platform
* specific entry point between the S3 resume decision point and the call to
* "write_tables", and the next platform specific entry points are the calls to
* the ACPI table write functions. The first of ose would seem to be the right
diff --git a/src/mainboard/amd/torpedo/get_bus_conf.c b/src/mainboard/amd/torpedo/get_bus_conf.c
index e2bd54e..4444937 100644
--- a/src/mainboard/amd/torpedo/get_bus_conf.c
+++ b/src/mainboard/amd/torpedo/get_bus_conf.c
@@ -76,7 +76,7 @@ void get_bus_conf(void)
* call. The logically correct place to call AmdInitLate is after PCI scan is done,
* after the decision about S3 resume is made, and before the system tables are
* written into RAM. The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain". There is no platform
+ * "write_tables", called near the end of "main". There is no platform
* specific entry point between the S3 resume decision point and the call to
* "write_tables", and the next platform specific entry points are the calls to
* the ACPI table write functions. The first of ose would seem to be the right
diff --git a/src/mainboard/amd/union_station/get_bus_conf.c b/src/mainboard/amd/union_station/get_bus_conf.c
index cbe19d8..165c683 100644
--- a/src/mainboard/amd/union_station/get_bus_conf.c
+++ b/src/mainboard/amd/union_station/get_bus_conf.c
@@ -71,7 +71,7 @@ void get_bus_conf(void)
* call. The logically correct place to call AmdInitLate is after PCI scan is done,
* after the decision about S3 resume is made, and before the system tables are
* written into RAM. The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain". There is no platform
+ * "write_tables", called near the end of "main". There is no platform
* specific entry point between the S3 resume decision point and the call to
* "write_tables", and the next platform specific entry points are the calls to
* the ACPI table write functions. The first of ose would seem to be the right
diff --git a/src/mainboard/asrock/e350m1/get_bus_conf.c b/src/mainboard/asrock/e350m1/get_bus_conf.c
index cbe19d8..165c683 100644
--- a/src/mainboard/asrock/e350m1/get_bus_conf.c
+++ b/src/mainboard/asrock/e350m1/get_bus_conf.c
@@ -71,7 +71,7 @@ void get_bus_conf(void)
* call. The logically correct place to call AmdInitLate is after PCI scan is done,
* after the decision about S3 resume is made, and before the system tables are
* written into RAM. The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain". There is no platform
+ * "write_tables", called near the end of "main". There is no platform
* specific entry point between the S3 resume decision point and the call to
* "write_tables", and the next platform specific entry points are the calls to
* the ACPI table write functions. The first of ose would seem to be the right
diff --git a/src/mainboard/asus/f2a85-m/get_bus_conf.c b/src/mainboard/asus/f2a85-m/get_bus_conf.c
index 3ae4c18..d1be8b6 100644
--- a/src/mainboard/asus/f2a85-m/get_bus_conf.c
+++ b/src/mainboard/asus/f2a85-m/get_bus_conf.c
@@ -69,7 +69,7 @@ void get_bus_conf(void)
* call. The logically correct place to call AmdInitLate is after PCI scan is done,
* after the decision about S3 resume is made, and before the system tables are
* written into RAM. The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain". There is no platform
+ * "write_tables", called near the end of "main". There is no platform
* specific entry point between the S3 resume decision point and the call to
* "write_tables", and the next platform specific entry points are the calls to
* the ACPI table write functions. The first of ose would seem to be the right
diff --git a/src/mainboard/emulation/qemu-armv7/Makefile.inc b/src/mainboard/emulation/qemu-armv7/Makefile.inc
index 80b392b..46ecfed 100644
--- a/src/mainboard/emulation/qemu-armv7/Makefile.inc
+++ b/src/mainboard/emulation/qemu-armv7/Makefile.inc
@@ -13,7 +13,6 @@
## GNU General Public License for more details.
romstage-y += romstage.c
-ramstage-y += ramstage.c
bootblock-y += media.c
romstage-y += media.c
diff --git a/src/mainboard/emulation/qemu-armv7/ramstage.c b/src/mainboard/emulation/qemu-armv7/ramstage.c
deleted file mode 100644
index 32e6cab..0000000
--- a/src/mainboard/emulation/qemu-armv7/ramstage.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Google, Inc.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-void hardwaremain(void);
-void main(void)
-{
- hardwaremain();
-}
diff --git a/src/mainboard/google/snow/Makefile.inc b/src/mainboard/google/snow/Makefile.inc
index 190bb36..69bc9ba 100644
--- a/src/mainboard/google/snow/Makefile.inc
+++ b/src/mainboard/google/snow/Makefile.inc
@@ -25,5 +25,4 @@ romstage-y += wakeup.c
# ramstage-y += ec.c
ramstage-y += mainboard.c
-ramstage-y += ramstage.c
ramstage-y += chromeos.c
diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c
deleted file mode 100644
index 6aa6082..0000000
--- a/src/mainboard/google/snow/ramstage.c
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Copyright (C) 2013 The ChromeOS Authors
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-void hardwaremain(void);
-void main(void)
-{
- hardwaremain();
-}
diff --git a/src/mainboard/lippert/frontrunner-af/get_bus_conf.c b/src/mainboard/lippert/frontrunner-af/get_bus_conf.c
index 11ec26e..8872bb5 100644
--- a/src/mainboard/lippert/frontrunner-af/get_bus_conf.c
+++ b/src/mainboard/lippert/frontrunner-af/get_bus_conf.c
@@ -74,7 +74,7 @@ void get_bus_conf(void)
* call. The logically correct place to call AmdInitLate is after PCI scan is done,
* after the decision about S3 resume is made, and before the system tables are
* written into RAM. The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain". There is no platform
+ * "write_tables", called near the end of "main". There is no platform
* specific entry point between the S3 resume decision point and the call to
* "write_tables", and the next platform specific entry points are the calls to
* the ACPI table write functions. The first of ose would seem to be the right
diff --git a/src/mainboard/lippert/toucan-af/get_bus_conf.c b/src/mainboard/lippert/toucan-af/get_bus_conf.c
index 11ec26e..8872bb5 100644
--- a/src/mainboard/lippert/toucan-af/get_bus_conf.c
+++ b/src/mainboard/lippert/toucan-af/get_bus_conf.c
@@ -74,7 +74,7 @@ void get_bus_conf(void)
* call. The logically correct place to call AmdInitLate is after PCI scan is done,
* after the decision about S3 resume is made, and before the system tables are
* written into RAM. The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain". There is no platform
+ * "write_tables", called near the end of "main". There is no platform
* specific entry point between the S3 resume decision point and the call to
* "write_tables", and the next platform specific entry points are the calls to
* the ACPI table write functions. The first of ose would seem to be the right
diff --git a/src/mainboard/supermicro/h8qgi/get_bus_conf.c b/src/mainboard/supermicro/h8qgi/get_bus_conf.c
index ffaa81b..25dc2a2 100644
--- a/src/mainboard/supermicro/h8qgi/get_bus_conf.c
+++ b/src/mainboard/supermicro/h8qgi/get_bus_conf.c
@@ -64,7 +64,7 @@ void get_bus_conf(void)
* call. The logically correct place to call AmdInitLate is after PCI scan is done,
* after the decision about S3 resume is made, and before the system tables are
* written into RAM. The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain". There is no platform
+ * "write_tables", called near the end of "main". There is no platform
* specific entry point between the S3 resume decision point and the call to
* "write_tables", and the next platform specific entry points are the calls to
* the ACPI table write functions. The first of ose would seem to be the right
diff --git a/src/mainboard/supermicro/h8scm/get_bus_conf.c b/src/mainboard/supermicro/h8scm/get_bus_conf.c
index eff9504..4b2cb32 100644
--- a/src/mainboard/supermicro/h8scm/get_bus_conf.c
+++ b/src/mainboard/supermicro/h8scm/get_bus_conf.c
@@ -64,7 +64,7 @@ void get_bus_conf(void)
* call. The logically correct place to call AmdInitLate is after PCI scan is done,
* after the decision about S3 resume is made, and before the system tables are
* written into RAM. The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain". There is no platform
+ * "write_tables", called near the end of "main". There is no platform
* specific entry point between the S3 resume decision point and the call to
* "write_tables", and the next platform specific entry points are the calls to
* the ACPI table write functions. The first of ose would seem to be the right
diff --git a/src/mainboard/ti/beaglebone/mainboard.c b/src/mainboard/ti/beaglebone/mainboard.c
deleted file mode 100644
index 1717be4..0000000
--- a/src/mainboard/ti/beaglebone/mainboard.c
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * Copyright (C) 2012 Google Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* FIXME: this is a stub */
-void main(void)
-{
-}
diff --git a/src/mainboard/tyan/s8226/get_bus_conf.c b/src/mainboard/tyan/s8226/get_bus_conf.c
index 5c119f2..d45e1ad 100644
--- a/src/mainboard/tyan/s8226/get_bus_conf.c
+++ b/src/mainboard/tyan/s8226/get_bus_conf.c
@@ -63,7 +63,7 @@ void get_bus_conf(void)
* call. The logically correct place to call AmdInitLate is after PCI scan is done,
* after the decision about S3 resume is made, and before the system tables are
* written into RAM. The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain". There is no platform
+ * "write_tables", called near the end of "main". There is no platform
* specific entry point between the S3 resume decision point and the call to
* "write_tables", and the next platform specific entry points are the calls to
* the ACPI table write functions. The first of ose would seem to be the right
diff --git a/src/northbridge/via/vx800/examples/chipset_init.c b/src/northbridge/via/vx800/examples/chipset_init.c
index d9b85e4..3f9c70f 100644
--- a/src/northbridge/via/vx800/examples/chipset_init.c
+++ b/src/northbridge/via/vx800/examples/chipset_init.c
@@ -604,7 +604,7 @@ void init_VIA_chipset(void)
* In the dev_enumerate() phase,
*/
-void hardwaremain(void)
+void main(void)
{
struct lb_memory *lb_mem;
#if CONFIG_HAVE_ACPI_RESUME
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