New patch to review for coreboot: 4d37f27 Correct spelling of »*setting« in output

[Paul Menzel (paulepanter@users.sourceforge.net)]

Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3769

-gerrit

commit 4d37f27be9fad804cefe8c77c38e27c915a24198
Author: Paul Menzel <paulepanter at users.sourceforge.net>
Date:   Sun Jul 14 09:28:24 2013 +0200

    Correct spelling of »*setting« in output
    
    The following command was used to fix the spelling.
    
        $ git grep -i -l seting | xargs sed -i 's/eting/etting/'
    
    Change-Id: I59ceaa1b370d0ddc1397d855ff6c5e53aa5a0895
    Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
 src/northbridge/via/vx800/examples/romstage.c | 2 +-
 src/southbridge/amd/amd8111/nic.c             | 2 +-
 src/vendorcode/google/chromeos/vboot_loader.c | 2 +-
 util/cbfstool/cbfs_image.c                    | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/northbridge/via/vx800/examples/romstage.c b/src/northbridge/via/vx800/examples/romstage.c
index 7c3fb7a..2814cb3 100644
--- a/src/northbridge/via/vx800/examples/romstage.c
+++ b/src/northbridge/via/vx800/examples/romstage.c
@@ -431,7 +431,7 @@ g)      Rx73h = 32h
 	if (boot_mode == 3) {
 		/*   some idea of Libo.Feng at amd.com in  http://www.coreboot.org/pipermail/coreboot/2008-December/043111.html
 		   I want move the 1M data, I have to set some MTRRs myself. */
-		/* seting mtrr before back memoy save s3 resume time about 0.14 seconds */
+		/* setting mtrr before back memoy save s3 resume time about 0.14 seconds */
 		/*because CAR stack use cache, and here to use cache , must be careful,
 		   1 during these mtrr code, must no function call, (after this mtrr, I think it should be ok to use function)
 		   2 before stack switch, no use variable that have value set before this
diff --git a/src/southbridge/amd/amd8111/nic.c b/src/southbridge/amd/amd8111/nic.c
index 4ab7212..5352705 100644
--- a/src/southbridge/amd/amd8111/nic.c
+++ b/src/southbridge/amd/amd8111/nic.c
@@ -52,7 +52,7 @@ static void nic_init(struct device *dev)
 	mmio = resource->base;
 
 	/* Hard Reset PHY */
-	printk(BIOS_DEBUG, "Reseting PHY... ");
+	printk(BIOS_DEBUG, "Resetting PHY... ");
 	if (conf->phy_lowreset) {
 		write32((mmio + CMD3), VAL0 | PHY_RST_POL | RESET_PHY);
 	} else {
diff --git a/src/vendorcode/google/chromeos/vboot_loader.c b/src/vendorcode/google/chromeos/vboot_loader.c
index 10fa52d..cb3b486 100644
--- a/src/vendorcode/google/chromeos/vboot_loader.c
+++ b/src/vendorcode/google/chromeos/vboot_loader.c
@@ -101,7 +101,7 @@ static void log_msg(const char *fmt, va_list args)
 
 static void fatal_error(void)
 {
-	printk(BIOS_ERR, "vboot encountered fatal error. Reseting.\n");
+	printk(BIOS_ERR, "vboot encountered fatal error. Resetting.\n");
 	hard_reset();
 }
 
diff --git a/util/cbfstool/cbfs_image.c b/util/cbfstool/cbfs_image.c
index 44a9fe8..eb9d574 100644
--- a/util/cbfstool/cbfs_image.c
+++ b/util/cbfstool/cbfs_image.c
@@ -395,7 +395,7 @@ int cbfs_add_entry(struct cbfs_image *image, struct buffer *buffer,
 				cbfs_print_entry_info(image, entry, stderr);
 
 			// setup new entry
-			DEBUG("Seting new empty entry.\n");
+			DEBUG("Setting new empty entry.\n");
 			entry = cbfs_find_next_entry(image, entry);
 			new_size = (cbfs_get_entry_addr(image, next) -
 				    cbfs_get_entry_addr(image, entry));