[coreboot-gerrit] Patch set updated for coreboot: 3292750 intel/lynxpoint/usb_debug.c: Only build `enable_usbdebug()` in `PRE_RAM`

Paul Menzel (paulepanter@users.sourceforge.net) gerrit at coreboot.org
Tue Jun 11 10:00:57 CEST 2013

Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3427


commit 3292750049b011284a4766a010aad591cd0ef881
Author: Paul Menzel <paulepanter at users.sourceforge.net>
Date:   Mon Jun 10 10:47:04 2013 +0200

    intel/lynxpoint/usb_debug.c: Only build `enable_usbdebug()` in `PRE_RAM`
    Building the board Intel White Tip Mountain which has the Intel
    Lynx Point platform controller hub (PCH) and enabling the USB
    debug console, the build fails with the following error.
        $ LANG=C make
            CC         southbridge/intel/lynxpoint/usb_debug.ramstage.o
        /src/southbridge/intel/lynxpoint/usb_debug.c: In function 'enable_usbdebug':
        /src/southbridge/intel/lynxpoint/usb_debug.c:35:2: error: unknown type name 'device_t'
        /src/southbridge/intel/lynxpoint/usb_debug.c:35:2: error: implicit declaration of function 'PCI_DEV' [-Werror=implicit-function-declaration]
        /src/southbridge/intel/lynxpoint/usb_debug.c:38:2: error: implicit declaration of function 'pci_write_config32' [-Werror=implicit-function-declaration]
        /src/southbridge/intel/lynxpoint/usb_debug.c:41:2: error: implicit declaration of function 'pci_write_config8' [-Werror=implicit-function-declaration]
        cc1: all warnings being treated as errors
        make: *** [build/southbridge/intel/lynxpoint/usb_debug.ramstage.o] Error 1
    Guarding the function `enable_usbdebug()` with
        ifdef __PRE_RAM__
    the build of Intel White Tip Mountain succeeds.
    Change-Id: I1bc7965bb422110595840bba7d3dec2a30a8a7f6
    Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
 src/southbridge/intel/lynxpoint/usb_debug.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/southbridge/intel/lynxpoint/usb_debug.c b/src/southbridge/intel/lynxpoint/usb_debug.c
index d8da7b5..785465b 100644
--- a/src/southbridge/intel/lynxpoint/usb_debug.c
+++ b/src/southbridge/intel/lynxpoint/usb_debug.c
@@ -30,6 +30,7 @@ void set_debug_port(unsigned int port)
 	/* Not needed, the ICH* southbridges hardcode physical USB port 1. */
+#ifdef __PRE_RAM__
 void enable_usbdebug(unsigned int port)
 	u32 dbgctl;
@@ -47,4 +48,4 @@ void enable_usbdebug(unsigned int port)
 	dbgctl |= (1 << 30);
+#endif				/* __PRE_RAM__ */

More information about the coreboot-gerrit mailing list