[coreboot-gerrit] New patch to review for coreboot: 2bb1900 sandybridge: mark graphics memory write-combining
Aaron Durbin (adurbin@google.com)
gerrit at coreboot.org
Sat Mar 23 06:44:49 CET 2013
Aaron Durbin (adurbin at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2894
-gerrit
commit 2bb1900de285c84f029f9ce3831689bea5b9a0f7
Author: Aaron Durbin <adurbin at chromium.org>
Date: Fri Mar 22 22:25:37 2013 -0500
sandybridge: mark graphics memory write-combining
The graphics memory can be accessed in a faster manner by
setting it to write-combing mode.
Change-Id: I7d37fd78906262aabef92c2b4f4cab0e3f7e4f6d
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
src/northbridge/intel/sandybridge/gma.c | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c
index b9a07a2..0d4eb11 100644
--- a/src/northbridge/intel/sandybridge/gma.c
+++ b/src/northbridge/intel/sandybridge/gma.c
@@ -664,12 +664,27 @@ static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
}
}
+static void gma_read_resources(struct device *dev)
+{
+ struct resource *res;
+
+ pci_dev_read_resources(dev);
+
+ /* Set the graphics memory to write combining. */
+ res = find_resource(dev, PCI_BASE_ADDRESS_2);
+ if (res == NULL) {
+ printk(BIOS_DEBUG, "gma: memory resource not found.\n");
+ return;
+ }
+ res->flags |= IORESOURCE_WRCOMB;
+}
+
static struct pci_operations gma_pci_ops = {
.set_subsystem = gma_set_subsystem,
};
static struct device_operations gma_func0_ops = {
- .read_resources = pci_dev_read_resources,
+ .read_resources = gma_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = gma_func0_init,
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