[coreboot-gerrit] Patch merged into coreboot/master: bebf669 x86: use boot state callbacks to disable rom cache
gerrit at coreboot.org
gerrit at coreboot.org
Wed May 1 07:12:18 CEST 2013
the following patch was just integrated into master:
commit bebf66909a11201a1bbfbdf7f1af40285d76a457
Author: Aaron Durbin <adurbin at chromium.org>
Date: Wed Apr 24 20:59:43 2013 -0500
x86: use boot state callbacks to disable rom cache
On x86 systems there is a concept of cachings the ROM. However,
the typical policy is that the boot cpu is the only one with
it enabled. In order to ensure the MTRRs are the same across cores
the rom cache needs to be disabled prior to OS resume or boot handoff.
Therefore, utilize the boot state callbacks to schedule the disabling
of the ROM cache at the ramstage exit points.
Change-Id: I4da5886d9f1cf4c6af2f09bb909f0d0f0faa4e62
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
Reviewed-on: http://review.coreboot.org/3138
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich at gmail.com>
Build-Tested: build bot (Jenkins) at Tue Apr 30 01:13:51 2013, giving +1
Reviewed-By: Ronald G. Minnich <rminnich at gmail.com> at Wed May 1 07:12:14 2013, giving +2
See http://review.coreboot.org/3138 for details.
-gerrit
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