[coreboot-gerrit] Patch merged into coreboot/master: 8e73b5d x86: add TSC_CONSTANT_RATE option

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 8e73b5d9528401a50254eb968080b814b5418152
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Wed May 1 15:27:09 2013 -0500

    x86: add TSC_CONSTANT_RATE option
    
    Some boards use the local apic for udelay(), but they also provide
    their own implementation of udelay() for SMM. The reason for using
    the local apic for udelay() in ramstage is to not have to pay the
    penalty of calibrating the TSC frequency. Therefore provide a
    TSC_CONSTANT_RATE option to indicate that TSC calibration is not
    needed. Instead rely on the presence of a tsc_freq_mhz() function
    provided by the cpu/board.  Additionally, assume that if
    TSC_CONSTANT_RATE is selected the udelay() function in SMM will
    be the tsc.
    
    Change-Id: I1629c2fbe3431772b4e80495160584fb6f599e9e
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: http://review.coreboot.org/3168
    Tested-by: build bot (Jenkins)
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Reviewed-by: Ronald G. Minnich <rminnich at gmail.com>

Build-Tested: build bot (Jenkins) at Tue May  7 12:51:00 2013, giving +1
Reviewed-By: Ronald G. Minnich <rminnich at gmail.com> at Tue May  7 18:35:04 2013, giving +2
See http://review.coreboot.org/3168 for details.

-gerrit