[coreboot-gerrit] Patch set updated for coreboot: d9d9ffb Asus F2A85-M: Fix the _CRS PCI0 bus info

Paul Menzel (paulepanter@users.sourceforge.net) gerrit at coreboot.org
Tue May 28 10:30:48 CEST 2013


Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3320

-gerrit

commit d9d9ffb3809096bb791326bf42e4df9f3db509c3
Author: Rudolf Marek <r.marek at assembler.cz>
Date:   Mon May 27 20:39:18 2013 +0200

    Asus F2A85-M: Fix the _CRS PCI0 bus info
    
    On Asus F2A85-M, the Linux kernel complains that the _CRS method does not
    specify the number of PCI busses.
    
        [FIRMWARE BUG]: ACPI: no secondary bus range in _CRS
    
    Just put there 256. This should be part of re-factoring of the whole ACPI
    stuff.
    
    The same change was done for the AMD Brazos (SB800) boards, based on commit »Persimmon DSDT: Add secondary bus range to PCI0« (4733c647) [1].
    
    [1] Reviewed-on: http://review.coreboot.org/2592
    
    Change-Id: I06f90ec353df9198a20b2165741ea0fe94071266
    Signed-off-by: Rudolf Marek <r.marek at assembler.cz>
---
 src/mainboard/asus/f2a85-m/dsdt.asl | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/src/mainboard/asus/f2a85-m/dsdt.asl b/src/mainboard/asus/f2a85-m/dsdt.asl
index d9f8fa4..e98b6b3 100644
--- a/src/mainboard/asus/f2a85-m/dsdt.asl
+++ b/src/mainboard/asus/f2a85-m/dsdt.asl
@@ -1307,6 +1307,22 @@ DefinitionBlock (
 			} /* end Ac97modem */
 
 			Name(CRES, ResourceTemplate() {
+				/* Set the Bus number and Secondary Bus number for the PCI0 device
+				 * The Secondary bus range for PCI0 lets the system
+				 * know what bus values are allowed on the downstream
+				 * side of this PCI bus if there is a PCI-PCI bridge.
+				 * PCI busses can have 256 secondary busses which
+				 * range from [0-0xFF] but they do not need to be
+				 * sequential.
+				*/
+				WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
+					0x0000,		/* address granularity */
+					0x0000,		/* range minimum */
+					0x00FF,		/* range maximum */
+					0x0000,		/* translation */
+					0x0100,		/* length */
+					,, PSB0)	/* ResourceSourceIndex, ResourceSource, DescriptorName */
+
 				IO(Decode16, 0x0CF8, 0x0CF8, 1,	8)
 
 				WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,



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