[coreboot-gerrit] Patch set updated for coreboot: 93af69a qemu: fix IRQ routing setup
Paul Menzel (paulepanter@users.sourceforge.net)
gerrit at coreboot.org
Thu May 30 10:59:16 CEST 2013
Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3334
-gerrit
commit 93af69a8e914df96ca9af42f3f33f3876d6ebd86
Author: Gerd Hoffmann <kraxel at redhat.com>
Date: Wed May 29 14:59:36 2013 +0200
qemu: fix IRQ routing setup
Do the setup for all PCI slots, not only the third.
Also remove the bogus message, as slot 3 may carry
any device, not only NICs.
This makes IRQ setup simliar to SeaBIOS.
SeaBIOS assignments (with patch for logging added,
and a bunch of pci devices for testing purposes):
PCI IRQ [piix]: bdf=00:01.3 pin=1 line=10
PCI IRQ [piix]: bdf=00:03.0 pin=1 line=11
PCI IRQ [piix]: bdf=00:04.0 pin=1 line=11
PCI IRQ [piix]: bdf=00:05.0 pin=1 line=10
PCI IRQ [piix]: bdf=00:06.0 pin=1 line=10
PCI IRQ [piix]: bdf=00:1d.0 pin=1 line=10
PCI IRQ [piix]: bdf=00:1d.1 pin=2 line=10
PCI IRQ [piix]: bdf=00:1d.2 pin=3 line=11
PCI IRQ [piix]: bdf=00:1d.7 pin=4 line=11
Coreboot assignments without this patch:
Assigning IRQ 11 to 0:3.0
Coreboot assignments with this patch:
Assigning IRQ 10 to 0:1.3
Assigning IRQ 11 to 0:3.0
Assigning IRQ 11 to 0:4.0
Assigning IRQ 10 to 0:5.0
Assigning IRQ 10 to 0:6.0
Assigning IRQ 10 to 0:1d.0
Assigning IRQ 10 to 0:1d.1
Assigning IRQ 11 to 0:1d.2
Assigning IRQ 11 to 0:1d.7
Change-Id: Ie96be39185f2f1cbde3c9fc50e29faff59c28493
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
---
src/mainboard/emulation/qemu-x86/mainboard.c | 15 +++++++--------
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/src/mainboard/emulation/qemu-x86/mainboard.c b/src/mainboard/emulation/qemu-x86/mainboard.c
index ae92654..f651b99 100644
--- a/src/mainboard/emulation/qemu-x86/mainboard.c
+++ b/src/mainboard/emulation/qemu-x86/mainboard.c
@@ -18,7 +18,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
@@ -26,8 +25,10 @@
#include <pc80/keyboard.h>
#include <arch/io.h>
-/* not sure how these are routed in qemu */
-static const unsigned char enetIrqs[4] = { 11, 0, 0, 0 };
+static const unsigned char qemu_i440fx_irqs[] = {
+ 11, 10, 10, 11,
+ 11, 10, 10, 11,
+};
static void qemu_nb_init(device_t dev)
{
@@ -44,11 +45,9 @@ static void qemu_nb_init(device_t dev)
*/
pc_keyboard_init(0);
- /* The PIRQ table is not working well for interrupt routing purposes.
- * so we'll just set the IRQ directly.
- */
- printk(BIOS_INFO, "Setting up ethernet...\n");
- pci_assign_irqs(0, 3, enetIrqs);
+ /* setup IRQ routing */
+ for (i = 0; i < 32; i++)
+ pci_assign_irqs(0, i, qemu_i440fx_irqs + (i % 4));
}
static struct device_operations nb_operations = {
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