[coreboot-gerrit] New patch to review for coreboot: 52ef0f3 make reset_system() public

Marc Jones (marc.jones@se-eng.com) gerrit at coreboot.org
Sat Nov 2 07:03:26 CET 2013


Marc Jones (marc.jones at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4022

-gerrit

commit 52ef0f34956f094e76bbfa104b78710412fbfd45
Author: Marc Jones <marc.jones at se-eng.com>
Date:   Fri Nov 1 23:55:16 2013 -0600

    make reset_system() public
    
    Move reset_system() into reset.h. It will by used by other
    chipsets in the future.
    
    Change-Id: I87964b77ce64fbff97423fb51170d1b439ef722e
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
---
 src/cpu/intel/haswell/romstage.c | 2 +-
 src/include/reset.h              | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index 757cc34..89edf84 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -48,7 +48,7 @@
 #include "southbridge/intel/lynxpoint/me.h"
 
 
-static inline void reset_system(void)
+void reset_system(void)
 {
 	hard_reset();
 	while (1) {
diff --git a/src/include/reset.h b/src/include/reset.h
index 9f117db..ba5401d 100644
--- a/src/include/reset.h
+++ b/src/include/reset.h
@@ -3,8 +3,10 @@
 
 #if CONFIG_HAVE_HARD_RESET
 void hard_reset(void);
+void reset_system(void);
 #else
 #define hard_reset() do {} while(0)
+#define reset_system() do {} while(0)
 #endif
 void soft_reset(void);
 



More information about the coreboot-gerrit mailing list