[coreboot-gerrit] Patch merged into coreboot/master: d8cfd23 intel/2065x: Use TSC for udelay()

gerrit at coreboot.org gerrit at coreboot.org
Wed Nov 13 00:38:46 CET 2013

the following patch was just integrated into master:
commit d8cfd23f6ab37ae68366625e144136392384638f
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date:   Tue Nov 12 21:59:10 2013 +0100

    intel/2065x: Use TSC for udelay()
    For the ram init of Intel Nehalem ram init we need a udelay implementation.
    Use common TSC framework for it as Intel Haswell already does.
    Change-Id: I360a6db1ec1ba32c92698a7d6f6968c93ead5c52
    Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
    Reviewed-on: http://review.coreboot.org/4043
    Reviewed-by: Aaron Durbin <adurbin at google.com>
    Tested-by: build bot (Jenkins)
    Reviewed-by: Marc Jones <marc.jones at se-eng.com>

See http://review.coreboot.org/4043 for details.


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